CGH0S7
5956a952a0
- Add TOOLCHAIN=aocc option with flang/clang++/mpicxx compilers - Replace Intel flags (-xHost/-fma/-ipo/-qopenmp) with AOCC flags (-march=znver5/-ffast-math/-flto/-fopenmp) targeting EPYC 9755 - Replace Intel oneMKL with AMD AOCL (BLIS + libFLAME + amdlibm) - Replace Intel TBBMALLOC with system jemalloc - Change MKL-specific headers to standard CBLAS/LAPACKE (TwoPunctures.C, gaussj.C) - Guard TBBMALLOC to Intel toolchain only Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
109 lines
3.8 KiB
PHP
Executable File
109 lines
3.8 KiB
PHP
Executable File
## Toolchain selection
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## nvhpc : NVIDIA HPC SDK + CUDA-aware MPI
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## intel : Intel oneAPI toolchain (legacy path)
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## aocc : AMD AOCC + AOCL + OpenMPI (for AMD EPYC Zen 5, with CUDA)
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TOOLCHAIN ?= intel
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## PGO build mode switch (ABE only; TwoPunctureABE always uses opt flags)
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## opt : (default) maximum performance with PGO profile-guided optimization
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## instrument : PGO Phase 1 instrumentation to collect fresh profile data
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PGO_MODE ?= opt
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## Interp_Points load balance profiling mode
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## off : (default) no load balance instrumentation
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## profile : Pass 1 — instrument Interp_Points to collect timing profile
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## optimize : Pass 2 — read profile and apply block rebalancing
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INTERP_LB_MODE ?= off
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ifeq ($(INTERP_LB_MODE),profile)
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INTERP_LB_FLAGS = -DINTERP_LB_PROFILE
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else ifeq ($(INTERP_LB_MODE),optimize)
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INTERP_LB_FLAGS = -DINTERP_LB_OPTIMIZE
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else
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INTERP_LB_FLAGS =
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endif
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MKLROOT ?= /home/intel/oneapi/mkl/latest
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MKL_LIBDIR ?= $(MKLROOT)/lib/intel64
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MKL_INC ?= -I$(MKLROOT)/include
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## AMD AOCC toolchain paths (used when TOOLCHAIN=aocc)
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AOCL_ROOT ?= /home/aocc/aocl/5.2.0/aocc
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OMPI_PREFIX ?= /home/aocc/aocc-openmpi
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NVHPC_ROOT ?= /home/nvidia/hpc_sdk/Linux_x86_64/25.11
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CUDA_HOME ?= $(NVHPC_ROOT)/cuda
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CUDA_ARCH ?= sm_80
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## Kernel implementation switch
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## 1 (default) : use C++ rewrite of bssn_rhs and helper kernels (faster)
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## 0 : fall back to original Fortran kernels
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USE_CXX_KERNELS ?= 1
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## Z4C Cartesian RHS kernel switch
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## 1 (default) : use C++ rewrite of Z4c_rhs (main Cartesian path faster)
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## 0 : use original Fortran Z4c_rhs.o
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USE_CXX_Z4C_KERNELS ?= 1
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## RK4 kernel implementation switch
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## 1 (default) : use C/C++ rewrite of rungekutta4_rout (for optimization experiments)
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## 0 : use original Fortran rungekutta4_rout.o
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USE_CXX_RK4 ?= 1
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## Memory allocator switch
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## 1 (default) : link Intel oneTBB allocator (libtbbmalloc)
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## 0 : use system default allocator (ptmalloc)
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USE_TBBMALLOC ?= 1
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TBBMALLOC_SO ?= /home/intel/oneapi/2025.3/lib/libtbbmalloc.so
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ifneq ($(wildcard $(TBBMALLOC_SO)),)
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TBBMALLOC_LIBS = -Wl,--no-as-needed $(TBBMALLOC_SO) -Wl,--as-needed
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else
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TBBMALLOC_LIBS = -Wl,--no-as-needed -ltbbmalloc -Wl,--as-needed
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endif
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ifeq ($(TOOLCHAIN),intel)
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f90 = ifx
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f77 = ifx
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CXX = icpx
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CC = icx
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CLINKER = mpiicpx
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filein = -I/usr/include/ $(MKL_INC) -I$(CUDA_HOME)/include
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LDLIBS = -L$(MKL_LIBDIR) -Wl,-rpath,$(MKL_LIBDIR) \
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-lmkl_intel_lp64 -lmkl_sequential -lmkl_core \
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-lifcore -limf -liomp5 -lpthread -lm -ldl \
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-L$(CUDA_HOME)/lib64 -Wl,-rpath,$(CUDA_HOME)/lib64 -lcuda -lcudart
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else ifeq ($(TOOLCHAIN),aocc)
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f90 = flang
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f77 = flang
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CXX = clang++
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CC = clang
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CLINKER = $(OMPI_PREFIX)/bin/mpicxx
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filein = -I/usr/include/ -I$(AOCL_ROOT)/include -I$(CUDA_HOME)/include
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LDLIBS = -L$(AOCL_ROOT)/lib -lblis -lflame -lamdlibm -lflang -lpgmath \
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-ljemalloc -lpthread -lm -ldl -lomp \
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-L$(CUDA_HOME)/lib64 -Wl,-rpath,$(CUDA_HOME)/lib64 -lcuda -lcudart
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else ifeq ($(TOOLCHAIN),nvhpc)
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f90 = mpifort
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f77 = mpifort
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CXX = mpicxx
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CC = mpicc
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CLINKER = mpicxx
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filein = -I/usr/include/ $(MKL_INC) -I$(CUDA_HOME)/include
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LDLIBS = -L$(MKL_LIBDIR) -Wl,-rpath,$(MKL_LIBDIR) \
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-lmkl_intel_lp64 -lmkl_sequential -lmkl_core \
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-lpthread -lm -ldl \
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-L$(CUDA_HOME)/lib64 -Wl,-rpath,$(CUDA_HOME)/lib64 -lcuda -lcudart \
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-fortranlibs
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endif
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ifeq ($(TOOLCHAIN),intel)
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ifeq ($(USE_TBBMALLOC),1)
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LDLIBS := $(TBBMALLOC_LIBS) $(LDLIBS)
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endif
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endif
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Cu = $(NVHPC_ROOT)/compilers/bin/nvcc
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CUDA_LIB_PATH = -L$(CUDA_HOME)/lib64 -I$(CUDA_HOME)/include
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CUDA_APP_FLAGS = -c -g -O3 --ptxas-options=-v -Dfortran3 -Dnewc -arch=$(CUDA_ARCH)
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