Files
Lucina3DS/externals/teakra/hwtest/dsptester/firm/source
2025-02-06 22:24:29 +08:00

172 lines
2.2 KiB
Plaintext

segment p 0000
br 0x0000$0800 always// reset vector
br 0x0000$3000 always
br 0x0000$3000 always
br 0x0000$3000 always // int0
data 0000
data 0000
data 0000
data 0000
data 0000
data 0000
br 0x0000$3000 always // int1
data 0000
data 0000
data 0000
data 0000
data 0000
data 0000
br 0x0000$3000 always // int2
segment p 0800 // pre-write shutdown sequence
load 0x0080u8 page
clr b0 always
mov b0l [page:0x00c8u8] // T_REPLY2
br 0x0000$1800 always // jump to epilogue first to dump the initial register value
segment p 1000 // signal handler & prologue
load 0x0000u8 page
mov [page:0x0002u8] b0l
brr 0x0003 eq
clr b0 always
mov b0l [page:0x0000u8]
mov b0l [page:0x0002u8]
mov [page:0x0001u8] b0l
brr 0x0003 eq
mov b0l [page:0x0000u8]
clr b0 always
mov b0l [page:0x0001u8]
mov [page:0x0000u8] b0l
br 0x0000$1000 eq
mov 0x$2000 sp
mov 0x$0003 mod0 // disable SAR and PS so a/b/p can be correctly loaded
mov 0x$0000 mod3 // clear mod3 from E000 to 0000. Game does this at the beginning so let it be the default env
pop r7
pop r6
pop r5
pop r4
pop r3
pop r2
pop r1
pop r0
pop a0l
mov a0l mixp
pop repc
pop a0h
mov a0h stepj0
pop a0h
mov a0h stepi0
pop lc
pop p1
pop y1
pop x1
pop p0
pop y0
pop x0
pop sv
popa b1
pop b1e
popa b0
pop b0e
popa a1
pop a1e
popa a0
pop a0e
pop arp3
pop arp2
pop arp1
pop arp0
pop ar1
pop ar0
pop mod2
pop mod1
pop mod0
pop stt2
pop stt1
pop stt0
pop cfgj
pop cfgi
mov 0x$1000 sp
br 0x0000$2000 always
segment p 1800 // epilogue
mov 0x$3000 sp
push cfgi
push cfgj
push stt0
push stt1
push stt2
push mod0
push mod1
push mod2
push ar0
push ar1
push arp0
push arp1
push arp2
push arp3
mov 0x$0003 mod0 // disable SAR and PS so a/b/p can be correctly loaded
push a0e
pusha a0
push a1e
pusha a1
push b0e
pusha b0
push b1e
pusha b1
push sv
push x0
push y0
push p0
push x1
push y1
push p1
push lc
mov stepi0 a0h
push a0h
mov stepj0 a0h
push a0h
push repc
mov mixp a0l
push a0l
push r0
push r1
push r2
push r3
push r4
push r5
push r6
push r7
load 0x0000u8 page
mov [page:0x0003u8] b0l
brr 0x0003 eq
clr b0 always
mov b0l [page:0x0000u8]
mov b0l [page:0x0003u8]
br 0x0000$1000 always
segment p 2000 // test area
br 0x0000$1800 always
segment p 3000 // interrupt
reti always
segment d 0000 // signal area
data 0000
data 0000
data 0000
data 0000