=========================
aarch64
=========================

physical machine
----------------
# ./go_perf_test.sh
mcstop+release.sh ... done
mcreboot.sh -c 12,24,36,48 -m 2048M@4,2048M@5,2048M@6,2048M@7 -q 60 ... done
[PERF_TYPE_HARDWARE all space]
CPU_CYCLES             : 598879183
INSTRUCTIONS           : 319639936
CACHE_REFERENCES       : 291701521
CACHE_MISSES           : 1996672
BRANCH_INSTRUCTIONS    : -1
BRANCH_MISSES          : 4969
BUS_CYCLES             : -1
STALLED_CYCLES_FRONTEND: 459510
STALLED_CYCLES_BACKEND : 447838339
REF_CPU_CYCLES         : -1
[HW_CACHE no exclude]
L1D _OP_READ    _ACCESS: 291757634
L1D _OP_READ    _MISS  : 1996674
L1D _OP_WRITE   _ACCESS: 291675494
L1D _OP_WRITE   _MISS  : 1996674
L1D _OP_PREFETCH_ACCESS: -1
L1D _OP_PREFETCH_MISS  : -1
L1I _OP_READ    _ACCESS: 109900150
L1I _OP_READ    _MISS  : 239
L1I _OP_WRITE   _ACCESS: -1
L1I _OP_WRITE   _MISS  : -1
L1I _OP_PREFETCH_ACCESS: -1
L1I _OP_PREFETCH_MISS  : -1
LL  _OP_READ    _ACCESS: -1
LL  _OP_READ    _MISS  : -1
LL  _OP_WRITE   _ACCESS: -1
LL  _OP_WRITE   _MISS  : -1
LL  _OP_PREFETCH_ACCESS: -1
LL  _OP_PREFETCH_MISS  : -1
DTLB_OP_READ    _ACCESS: -1
DTLB_OP_READ    _MISS  : 893625
DTLB_OP_WRITE   _ACCESS: -1
DTLB_OP_WRITE   _MISS  : -1
DTLB_OP_PREFETCH_ACCESS: -1
DTLB_OP_PREFETCH_MISS  : -1
ITLB_OP_READ    _ACCESS: -1
ITLB_OP_READ    _MISS  : 17
ITLB_OP_WRITE   _ACCESS: -1
ITLB_OP_WRITE   _MISS  : -1
ITLB_OP_PREFETCH_ACCESS: -1
ITLB_OP_PREFETCH_MISS  : -1
BPU _OP_READ    _ACCESS: 42163456
BPU _OP_READ    _MISS  : 5007
BPU _OP_WRITE   _ACCESS: 42163456
BPU _OP_WRITE   _MISS  : 4967
BPU _OP_PREFETCH_ACCESS: -1
BPU _OP_PREFETCH_MISS  : -1
NODE_OP_READ    _ACCESS: -1
NODE_OP_READ    _MISS  : -1
NODE_OP_WRITE   _ACCESS: -1
NODE_OP_WRITE   _MISS  : -1
NODE_OP_PREFETCH_ACCESS: -1
NODE_OP_PREFETCH_MISS  : -1
[HARDWARE exclude user space]
CPU_CYCLES             : 597147551
INSTRUCTIONS           : 573314
CACHE_REFERENCES       : 31995
CACHE_MISSES           : 214
BRANCH_INSTRUCTIONS    : -1
BRANCH_MISSES          : 228
BUS_CYCLES             : -1
STALLED_CYCLES_FRONTEND: 20866
STALLED_CYCLES_BACKEND : 1215677
REF_CPU_CYCLES         : -1
[HW_CACHE exclude user space]
L1D _OP_READ    _ACCESS: 31883
L1D _OP_READ    _MISS  : 216
L1D _OP_WRITE   _ACCESS: 31998
L1D _OP_WRITE   _MISS  : 217
L1D _OP_PREFETCH_ACCESS: -1
L1D _OP_PREFETCH_MISS  : -1
L1I _OP_READ    _ACCESS: 34195
L1I _OP_READ    _MISS  : 148
L1I _OP_WRITE   _ACCESS: -1
L1I _OP_WRITE   _MISS  : -1
L1I _OP_PREFETCH_ACCESS: -1
L1I _OP_PREFETCH_MISS  : -1
LL  _OP_READ    _ACCESS: -1
LL  _OP_READ    _MISS  : -1
LL  _OP_WRITE   _ACCESS: -1
LL  _OP_WRITE   _MISS  : -1
LL  _OP_PREFETCH_ACCESS: -1
LL  _OP_PREFETCH_MISS  : -1
DTLB_OP_READ    _ACCESS: -1
DTLB_OP_READ    _MISS  : 39
DTLB_OP_WRITE   _ACCESS: -1
DTLB_OP_WRITE   _MISS  : -1
DTLB_OP_PREFETCH_ACCESS: -1
DTLB_OP_PREFETCH_MISS  : -1
ITLB_OP_READ    _ACCESS: -1
ITLB_OP_READ    _MISS  : 7
ITLB_OP_WRITE   _ACCESS: -1
ITLB_OP_WRITE   _MISS  : -1
ITLB_OP_PREFETCH_ACCESS: -1
ITLB_OP_PREFETCH_MISS  : -1
BPU _OP_READ    _ACCESS: 141350
BPU _OP_READ    _MISS  : 203
BPU _OP_WRITE   _ACCESS: 141350
BPU _OP_WRITE   _MISS  : 217
BPU _OP_PREFETCH_ACCESS: -1
BPU _OP_PREFETCH_MISS  : -1
NODE_OP_READ    _ACCESS: -1
NODE_OP_READ    _MISS  : -1
NODE_OP_WRITE   _ACCESS: -1
NODE_OP_WRITE   _MISS  : -1
NODE_OP_PREFETCH_ACCESS: -1
NODE_OP_PREFETCH_MISS  : -1
[HARDWARE exclude kernel space]
CPU_CYCLES             : 597505046
INSTRUCTIONS           : 319066622
CACHE_REFERENCES       : 291626611
CACHE_MISSES           : 1996458
BRANCH_INSTRUCTIONS    : -1
BRANCH_MISSES          : 4743
BUS_CYCLES             : -1
STALLED_CYCLES_FRONTEND: 437710
STALLED_CYCLES_BACKEND : 446177603
REF_CPU_CYCLES         : -1
[HW_CACHE exclude kernel space]
L1D _OP_READ    _ACCESS: 291624405
L1D _OP_READ    _MISS  : 1996457
L1D _OP_WRITE   _ACCESS: 291628743
L1D _OP_WRITE   _MISS  : 1996459
L1D _OP_PREFETCH_ACCESS: -1
L1D _OP_PREFETCH_MISS  : -1
L1I _OP_READ    _ACCESS: 109868221
L1I _OP_READ    _MISS  : 87
L1I _OP_WRITE   _ACCESS: -1
L1I _OP_WRITE   _MISS  : -1
L1I _OP_PREFETCH_ACCESS: -1
L1I _OP_PREFETCH_MISS  : -1
LL  _OP_READ    _ACCESS: -1
LL  _OP_READ    _MISS  : -1
LL  _OP_WRITE   _ACCESS: -1
LL  _OP_WRITE   _MISS  : -1
LL  _OP_PREFETCH_ACCESS: -1
LL  _OP_PREFETCH_MISS  : -1
DTLB_OP_READ    _ACCESS: -1
DTLB_OP_READ    _MISS  : 893411
DTLB_OP_WRITE   _ACCESS: -1
DTLB_OP_WRITE   _MISS  : -1
DTLB_OP_PREFETCH_ACCESS: -1
DTLB_OP_PREFETCH_MISS  : -1
ITLB_OP_READ    _ACCESS: -1
ITLB_OP_READ    _MISS  : 9
ITLB_OP_WRITE   _ACCESS: -1
ITLB_OP_WRITE   _MISS  : -1
ITLB_OP_PREFETCH_ACCESS: -1
ITLB_OP_PREFETCH_MISS  : -1
BPU _OP_READ    _ACCESS: 42022106
BPU _OP_READ    _MISS  : 4729
BPU _OP_WRITE   _ACCESS: 42022106
BPU _OP_WRITE   _MISS  : 4733
BPU _OP_PREFETCH_ACCESS: -1
BPU _OP_PREFETCH_MISS  : -1
NODE_OP_READ    _ACCESS: -1
NODE_OP_READ    _MISS  : -1
NODE_OP_WRITE   _ACCESS: -1
NODE_OP_WRITE   _MISS  : -1
NODE_OP_PREFETCH_ACCESS: -1
NODE_OP_PREFETCH_MISS  : -1

virtual machine
----------------
# ./go_perf_test.sh
mcstop+release.sh ... done
mcreboot.sh -c 4-15 -m 16G ... done
[PERF_TYPE_HARDWARE all space]
CPU_CYCLES             : 2512315570
INSTRUCTIONS           : -1
CACHE_REFERENCES       : -1
CACHE_MISSES           : -1
BRANCH_INSTRUCTIONS    : -1
BRANCH_MISSES          : -1
BUS_CYCLES             : -1
STALLED_CYCLES_FRONTEND: -1
STALLED_CYCLES_BACKEND : -1
REF_CPU_CYCLES         : -1
[HW_CACHE no exclude]
L1D _OP_READ    _ACCESS: -1
L1D _OP_READ    _MISS  : -1
L1D _OP_WRITE   _ACCESS: -1
L1D _OP_WRITE   _MISS  : -1
L1D _OP_PREFETCH_ACCESS: -1
L1D _OP_PREFETCH_MISS  : -1
L1I _OP_READ    _ACCESS: -1
L1I _OP_READ    _MISS  : -1
L1I _OP_WRITE   _ACCESS: -1
L1I _OP_WRITE   _MISS  : -1
L1I _OP_PREFETCH_ACCESS: -1
L1I _OP_PREFETCH_MISS  : -1
LL  _OP_READ    _ACCESS: -1
LL  _OP_READ    _MISS  : -1
LL  _OP_WRITE   _ACCESS: -1
LL  _OP_WRITE   _MISS  : -1
LL  _OP_PREFETCH_ACCESS: -1
LL  _OP_PREFETCH_MISS  : -1
DTLB_OP_READ    _ACCESS: -1
DTLB_OP_READ    _MISS  : -1
DTLB_OP_WRITE   _ACCESS: -1
DTLB_OP_WRITE   _MISS  : -1
DTLB_OP_PREFETCH_ACCESS: -1
DTLB_OP_PREFETCH_MISS  : -1
ITLB_OP_READ    _ACCESS: -1
ITLB_OP_READ    _MISS  : -1
ITLB_OP_WRITE   _ACCESS: -1
ITLB_OP_WRITE   _MISS  : -1
ITLB_OP_PREFETCH_ACCESS: -1
ITLB_OP_PREFETCH_MISS  : -1
BPU _OP_READ    _ACCESS: -1
BPU _OP_READ    _MISS  : -1
BPU _OP_WRITE   _ACCESS: -1
BPU _OP_WRITE   _MISS  : -1
BPU _OP_PREFETCH_ACCESS: -1
BPU _OP_PREFETCH_MISS  : -1
NODE_OP_READ    _ACCESS: -1
NODE_OP_READ    _MISS  : -1
NODE_OP_WRITE   _ACCESS: -1
NODE_OP_WRITE   _MISS  : -1
NODE_OP_PREFETCH_ACCESS: -1
NODE_OP_PREFETCH_MISS  : -1
[HARDWARE exclude user space]
CPU_CYCLES             : 1631207786
INSTRUCTIONS           : -1
CACHE_REFERENCES       : -1
CACHE_MISSES           : -1
BRANCH_INSTRUCTIONS    : -1
BRANCH_MISSES          : -1
BUS_CYCLES             : -1
STALLED_CYCLES_FRONTEND: -1
STALLED_CYCLES_BACKEND : -1
REF_CPU_CYCLES         : -1
[HW_CACHE exclude user space]
L1D _OP_READ    _ACCESS: -1
L1D _OP_READ    _MISS  : -1
L1D _OP_WRITE   _ACCESS: -1
L1D _OP_WRITE   _MISS  : -1
L1D _OP_PREFETCH_ACCESS: -1
L1D _OP_PREFETCH_MISS  : -1
L1I _OP_READ    _ACCESS: -1
L1I _OP_READ    _MISS  : -1
L1I _OP_WRITE   _ACCESS: -1
L1I _OP_WRITE   _MISS  : -1
L1I _OP_PREFETCH_ACCESS: -1
L1I _OP_PREFETCH_MISS  : -1
LL  _OP_READ    _ACCESS: -1
LL  _OP_READ    _MISS  : -1
LL  _OP_WRITE   _ACCESS: -1
LL  _OP_WRITE   _MISS  : -1
LL  _OP_PREFETCH_ACCESS: -1
LL  _OP_PREFETCH_MISS  : -1
DTLB_OP_READ    _ACCESS: -1
DTLB_OP_READ    _MISS  : -1
DTLB_OP_WRITE   _ACCESS: -1
DTLB_OP_WRITE   _MISS  : -1
DTLB_OP_PREFETCH_ACCESS: -1
DTLB_OP_PREFETCH_MISS  : -1
ITLB_OP_READ    _ACCESS: -1
ITLB_OP_READ    _MISS  : -1
ITLB_OP_WRITE   _ACCESS: -1
ITLB_OP_WRITE   _MISS  : -1
ITLB_OP_PREFETCH_ACCESS: -1
ITLB_OP_PREFETCH_MISS  : -1
BPU _OP_READ    _ACCESS: -1
BPU _OP_READ    _MISS  : -1
BPU _OP_WRITE   _ACCESS: -1
BPU _OP_WRITE   _MISS  : -1
BPU _OP_PREFETCH_ACCESS: -1
BPU _OP_PREFETCH_MISS  : -1
NODE_OP_READ    _ACCESS: -1
NODE_OP_READ    _MISS  : -1
NODE_OP_WRITE   _ACCESS: -1
NODE_OP_WRITE   _MISS  : -1
NODE_OP_PREFETCH_ACCESS: -1
NODE_OP_PREFETCH_MISS  : -1
[HARDWARE exclude kernel space]
CPU_CYCLES             : 1595055278
INSTRUCTIONS           : -1
CACHE_REFERENCES       : -1
CACHE_MISSES           : -1
BRANCH_INSTRUCTIONS    : -1
BRANCH_MISSES          : -1
BUS_CYCLES             : -1
STALLED_CYCLES_FRONTEND: -1
STALLED_CYCLES_BACKEND : -1
REF_CPU_CYCLES         : -1
[HW_CACHE exclude kernel space]
L1D _OP_READ    _ACCESS: -1
L1D _OP_READ    _MISS  : -1
L1D _OP_WRITE   _ACCESS: -1
L1D _OP_WRITE   _MISS  : -1
L1D _OP_PREFETCH_ACCESS: -1
L1D _OP_PREFETCH_MISS  : -1
L1I _OP_READ    _ACCESS: -1
L1I _OP_READ    _MISS  : -1
L1I _OP_WRITE   _ACCESS: -1
L1I _OP_WRITE   _MISS  : -1
L1I _OP_PREFETCH_ACCESS: -1
L1I _OP_PREFETCH_MISS  : -1
LL  _OP_READ    _ACCESS: -1
LL  _OP_READ    _MISS  : -1
LL  _OP_WRITE   _ACCESS: -1
LL  _OP_WRITE   _MISS  : -1
LL  _OP_PREFETCH_ACCESS: -1
LL  _OP_PREFETCH_MISS  : -1
DTLB_OP_READ    _ACCESS: -1
DTLB_OP_READ    _MISS  : -1
DTLB_OP_WRITE   _ACCESS: -1
DTLB_OP_WRITE   _MISS  : -1
DTLB_OP_PREFETCH_ACCESS: -1
DTLB_OP_PREFETCH_MISS  : -1
ITLB_OP_READ    _ACCESS: -1
ITLB_OP_READ    _MISS  : -1
ITLB_OP_WRITE   _ACCESS: -1
ITLB_OP_WRITE   _MISS  : -1
ITLB_OP_PREFETCH_ACCESS: -1
ITLB_OP_PREFETCH_MISS  : -1
BPU _OP_READ    _ACCESS: -1
BPU _OP_READ    _MISS  : -1
BPU _OP_WRITE   _ACCESS: -1
BPU _OP_WRITE   _MISS  : -1
BPU _OP_PREFETCH_ACCESS: -1
BPU _OP_PREFETCH_MISS  : -1
NODE_OP_READ    _ACCESS: -1
NODE_OP_READ    _MISS  : -1
NODE_OP_WRITE   _ACCESS: -1
NODE_OP_WRITE   _MISS  : -1
NODE_OP_PREFETCH_ACCESS: -1
NODE_OP_PREFETCH_MISS  : -1
