flush instruction cache at context switch time if necessary

Change-Id: Ic09415ea772a9de6dca43a98168a8346ca86d3e7

arch/x86_64/kernel/cpu.c

@@ -1821,6 +1821,10 @@ ihk_mc_init_user_tlsbase(ihk_mc_user_context_t *ctx,
 	do_arch_prctl(ARCH_SET_FS, tls_base_addr);
 }
 
+void arch_flush_icache_all(void)
+{
+	return;
+}
 
 /*@
   @ assigns \nothing;

arch/x86_64/kernel/include/arch/cpu.h

@@ -47,5 +47,6 @@ static inline unsigned long read_tsc(void)
 	WRITE_ONCE(*p, v);					\
 })
 
+void arch_flush_icache_all(void);
 
 #endif /* ARCH_CPU_H */