Fix some race condition on arm64

* move barrier() to architecture depended region
* add barrier() in issue_ipi, kprintf, map_virtual
* enable the workaround for cavium thunderx

arch/arm64/kernel/include/arch/cpu.h

@@ -25,6 +25,8 @@
 #define smp_rmb()	dmb(ishld)
 #define smp_wmb()	dmb(ishst)
 
+#define arch_barrier()	smp_mb()
+
 #define smp_store_release(p, v)						\
 do {									\
 	compiletime_assert_atomic_type(*p);				\

arch/arm64/kernel/include/assembler.h

@@ -6,6 +6,8 @@
 
 #if defined(CONFIG_HAS_NMI)
 #include <arm-gic-v3.h>
+#else /* defined(CONFIG_HAS_NMI) */
+#include <sysreg.h>
 #endif /* defined(CONFIG_HAS_NMI) */
 
 #if defined(CONFIG_HAS_NMI)

arch/arm64/kernel/include/cputype.h

@@ -35,6 +35,8 @@
 #define MIDR_IMPLEMENTOR(midr)	\
 	(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
 
+#define ARM_CPU_IMP_CAVIUM	0x43
+
 #ifndef __ASSEMBLY__
 
 static unsigned int read_cpuid_id(void)