add arm64 support
- add arm64 dependent codes with GICv3 and SVE support - fix bugs based on architecture separation requests
This commit is contained in:
Takayuki Okamoto
155
arch/arm64/kernel/psci.c
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155
arch/arm64/kernel/psci.c
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/* psci.c COPYRIGHT FUJITSU LIMITED 2015-2016 */
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/* @ref.impl arch/arm64/kernel/psci.c */
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Copyright (C) 2013 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <psci.h>
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#include <errno.h>
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#include <ihk/types.h>
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#include <ihk/debug.h>
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#include <compiler.h>
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#include <lwk/compiler.h>
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//#define DEBUG_PRINT_PSCI
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#ifdef DEBUG_PRINT_PSCI
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#define dkprintf(...) kprintf(__VA_ARGS__)
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#define ekprintf(...) kprintf(__VA_ARGS__)
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#else
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#define dkprintf(...) do { if (0) kprintf(__VA_ARGS__); } while (0)
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#define ekprintf(...) kprintf(__VA_ARGS__)
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#endif
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#define PSCI_POWER_STATE_TYPE_POWER_DOWN 1
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extern uint64_t ihk_param_cpu_logical_map;
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static uint64_t *__cpu_logical_map = &ihk_param_cpu_logical_map;
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#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
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struct psci_power_state {
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uint16_t id;
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uint8_t type;
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uint8_t affinity_level;
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};
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static int psci_to_linux_errno(int errno)
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{
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switch (errno) {
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case PSCI_RET_SUCCESS:
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return 0;
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case PSCI_RET_NOT_SUPPORTED:
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return -EOPNOTSUPP;
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case PSCI_RET_INVALID_PARAMS:
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return -EINVAL;
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case PSCI_RET_DENIED:
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return -EPERM;
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};
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return -EINVAL;
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}
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static uint32_t psci_power_state_pack(struct psci_power_state state)
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{
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return ((state.id << PSCI_0_2_POWER_STATE_ID_SHIFT)
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& PSCI_0_2_POWER_STATE_ID_MASK) |
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((state.type << PSCI_0_2_POWER_STATE_TYPE_SHIFT)
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& PSCI_0_2_POWER_STATE_TYPE_MASK) |
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((state.affinity_level << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
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& PSCI_0_2_POWER_STATE_AFFL_MASK);
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}
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static noinline int __invoke_psci_fn_hvc(uint64_t function_id, uint64_t arg0, uint64_t arg1,
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uint64_t arg2)
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{
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asm volatile(
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__asmeq("%0", "x0")
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__asmeq("%1", "x1")
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__asmeq("%2", "x2")
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__asmeq("%3", "x3")
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"hvc #0\n"
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: "+r" (function_id)
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: "r" (arg0), "r" (arg1), "r" (arg2));
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return function_id;
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}
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static noinline int __invoke_psci_fn_smc(uint64_t function_id, uint64_t arg0, uint64_t arg1,
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uint64_t arg2)
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{
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asm volatile(
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__asmeq("%0", "x0")
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__asmeq("%1", "x1")
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__asmeq("%2", "x2")
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__asmeq("%3", "x3")
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"smc #0\n"
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: "+r" (function_id)
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: "r" (arg0), "r" (arg1), "r" (arg2));
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return function_id;
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}
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static int (*invoke_psci_fn)(uint64_t, uint64_t, uint64_t, uint64_t) = NULL;
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#define PSCI_METHOD_INVALID -1
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#define PSCI_METHOD_HVC 0
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#define PSCI_METHOD_SMC 1
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int psci_init(void)
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{
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extern unsigned long ihk_param_psci_method;
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int ret = 0;
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if (ihk_param_psci_method == PSCI_METHOD_SMC) {
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dkprintf("psci_init(): set invoke_psci_fn = __invoke_psci_fn_smc\n");
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invoke_psci_fn = __invoke_psci_fn_smc;
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} else if (ihk_param_psci_method == PSCI_METHOD_HVC) {
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dkprintf("psci_init(): set invoke_psci_fn = __invoke_psci_fn_hvc\n");
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invoke_psci_fn = __invoke_psci_fn_hvc;
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} else {
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ekprintf("psci_init(): ihk_param_psci_method invalid value. %ld\n", ihk_param_psci_method);
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ret = -1;
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}
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return ret;
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}
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int psci_cpu_off(void)
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{
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int err;
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uint32_t fn, power_state;
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struct psci_power_state state = {
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.type = PSCI_POWER_STATE_TYPE_POWER_DOWN,
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};
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fn = PSCI_0_2_FN_CPU_OFF;
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power_state = psci_power_state_pack(state);
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err = invoke_psci_fn(fn, power_state, 0, 0);
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return psci_to_linux_errno(err);
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}
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static int psci_cpu_on(unsigned long cpuid, unsigned long entry_point)
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{
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int err;
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uint32_t fn;
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fn = PSCI_0_2_FN64_CPU_ON;
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err = invoke_psci_fn(fn, cpuid, entry_point, 0);
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return psci_to_linux_errno(err);
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}
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int cpu_psci_cpu_boot(unsigned int cpu, unsigned long pc)
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{
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return psci_cpu_on(cpu_logical_map(cpu), pc);
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}
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