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PMU register support for cpufreq driver.

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Change-Id: I11462d25ef83867ddf2e643798d1e3d0257f7f33
This commit is contained in:
TOIDA,Suguru
2020-02-21 16:05:46 +09:00
committed by Masamichi Takagi
parent b3b8283f87
commit cec6f24559
2 changed files with 3 additions and 0 deletions
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2
arch/arm64/kernel/cpu.c
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@ -1682,6 +1682,7 @@ static inline int arch_cpu_mrs(uint32_t sys_reg, uint64_t *val)
SYSREG_READ_S(IMP_PF_INJECTION_DISTANCE5_EL0);
SYSREG_READ_S(IMP_PF_INJECTION_DISTANCE6_EL0);
SYSREG_READ_S(IMP_PF_INJECTION_DISTANCE7_EL0);
SYSREG_READ_S(IMP_PF_PMUSERENR_EL0);
SYSREG_READ_S(IMP_BARRIER_CTRL_EL1);
SYSREG_READ_S(IMP_BARRIER_BST_BIT_EL1);
SYSREG_READ_S(IMP_BARRIER_INIT_SYNC_BB0_EL1);
@ -1752,6 +1753,7 @@ static inline int arch_cpu_msr(uint32_t sys_reg, uint64_t val)
SYSREG_WRITE_S(IMP_PF_INJECTION_DISTANCE5_EL0);
SYSREG_WRITE_S(IMP_PF_INJECTION_DISTANCE6_EL0);
SYSREG_WRITE_S(IMP_PF_INJECTION_DISTANCE7_EL0);
SYSREG_WRITE_S(IMP_PF_PMUSERENR_EL0);
SYSREG_WRITE_S(IMP_BARRIER_CTRL_EL1);
SYSREG_WRITE_S(IMP_BARRIER_BST_BIT_EL1);
SYSREG_WRITE_S(IMP_BARRIER_INIT_SYNC_BB0_EL1);