5c190beb04
save fpregs when to call sighandler
...
refs #50
2016-07-05 15:26:00 +09:00
dd37443fc7
PAPI support: performance counter's overflow.
...
and support mckfd fcntl.
2016-06-24 13:50:12 +09:00
14ec92518e
KVM support: detect KVM and avoid touching unimplemented MSRs
2016-05-26 01:11:08 +09:00
9b35eaca42
remote_flush_tlb_cpumask() dead locking
...
refs #728
2016-05-10 14:02:25 +09:00
130b1f4327
update PAPI support. other process and child process monitoring.
2016-04-26 19:01:47 +09:00
1bb948f43b
hwloc support
2016-04-11 22:25:27 +09:00
2a1823d52c
vdso: set enable bit of pvti_msr
2016-04-11 22:20:39 +09:00
89943dc5ba
vdso: set physical address at pvti_msr
2016-04-11 22:20:39 +09:00
fceb02a44a
vdso: add zero clear for pvti
2016-04-11 22:20:38 +09:00
7298d8e179
vdso: correct pvti array element type
...
struct pvclock_vsyscall_time_info <-- struct pvclock_vcpu_time_info
2016-04-11 22:20:38 +09:00
41bb2ab5e6
support vdso which borrows clocksource from linux
2016-03-28 22:57:44 +09:00
a587c8f5e5
x86: encode cpu# in IA32_TSC_AUX and size of GDTe#15
2016-03-28 22:57:44 +09:00
31595b7409
fix REQ-43
2016-03-25 12:57:31 +09:00
593cf98015
add ACSL annotation
2016-03-16 15:42:32 +09:00
1aac2c8e23
add CPU timer initialization (refs #402 )
...
There is no actual initialization in x86 now.
The initialization rely on hardware reset and Linux initialization.
2016-03-11 19:20:37 +09:00
70e8dd7979
remove initialization of TSC (refs #362 )
2016-03-11 19:17:29 +09:00
c4c5e435cc
fix REQ-12
2016-02-24 20:57:45 +09:00
27c3ed7e96
remove debug print
2016-02-21 15:17:42 +09:00
e2b28da32f
signal handler support gdb stepi command
2016-02-21 14:55:34 +09:00
eba2be8a35
support times
2016-02-18 13:14:18 +09:00
f7b5b48266
support x2apic
2016-01-06 13:53:02 +09:00
0eaa27291a
thread: move clear_child_tid, etc. to main structure
2015-10-29 11:01:27 +09:00
343bfbd30a
rename back status field
2015-10-22 20:26:50 +09:00
04e193de13
refactoring process structures
2015-10-13 23:04:08 +09:00
79266f6b97
x86_issue_ipi: keep interrupt disabled while issuing IPI
2015-09-29 19:10:01 +09:00
a666b69c2c
make x86_issue_ipi() call wait_icr_idle()
2015-09-29 19:10:01 +09:00
47e8552eba
move wait_icr_idle() before x86_issue_ipi()
2015-09-29 19:10:00 +09:00
f08e0c0054
guess whether MSR_PLATFORM_INFO exists or not
2015-09-29 19:10:00 +09:00
40b8587a8a
schedule(): sync CPU_FLAG_NEED_RESCHED flag with clone and migrate
2015-09-16 19:22:40 +09:00
9ae5bcf46e
gettimeofday(): an implementation based on CPU invariant TSC support
2015-08-24 23:53:56 +02:00
9ba40dc0ff
schedule(): hold runq lock for the entire duration of context switching
...
releasing the runq lock after loading page tables but before the actual
context switch can leave execution in an inconsistent if the current
process is descheduled from an IRQ between these two steps.
this patch holds the runq lock with IRQs disabled and makes the context
switch a single atomic operation.
2015-08-10 12:37:12 +09:00
215cd370a1
ap_init(): clean up AP boot kernel messages
2015-08-07 10:57:59 +09:00
0a0e2c04a0
support for dynamically toggling time sharing when CPU is oversubscribed
2015-08-07 08:51:50 +09:00
aa191b87d3
schedule(): use XSAVE/XRSTOR and swap floating point registers in context switch
2015-08-07 08:41:00 +09:00
9b1e691588
fix thread migration code (i.e., sched_setaffinity())
...
- moved migration code into idle() process and updated schedule() to detect
when a thread has moved to another CPU in order to avoid doing housekeeping
on behalf of the original one
- start CPU head from core 0
- keeps track of nested interrupts
2015-07-24 20:09:17 +09:00
3988b0fc61
keep track of IRQ context and don't do thread migration there
2015-07-23 16:56:58 +09:00
1ff4cf68c2
support SA_RESTART flag and restart syscall
2015-07-16 16:33:14 +09:00
382614ddae
pstate: use MSR_NHM_TURBO_RATIO_LIMIT as maximum single-core turbo ratio
2015-07-01 22:18:38 +09:00
fbb776e4fb
cpu init: support for no_turbo kernel argument
2015-06-25 12:18:27 +09:00
a0d909af75
add supports for dump analyzer
2015-03-31 12:59:53 +09:00
4946964ed0
update copyright notices
2015-03-27 14:50:09 +09:00
9271d5346d
add ACSL annotation to cpu.c
2015-03-25 15:54:08 +09:00
ea5681232e
x86 Page Attribute Table (PAT) MSR support.
...
Reconfigure PAT to permit write-combining memory type to be assigned
on a page-by-page basis. Changes PWT and PCD bit combinations in page
table entries so that they correspond to the following format:
PAT
|PCD
||PWT
|||
000 WB Write Back (WB)
001 WC Write Combining (WC)
010 UC- Uncached (UC-)
011 UC Uncacheable (UC)
2015-03-05 16:03:20 +09:00
e6011be1af
create area for to save fp regs
...
refs #421
2015-03-05 12:18:46 +09:00
8db54c2637
make GPE on CPL0 cause panic
2015-03-04 11:29:16 +09:00
377341ce5f
change debug output in debug/int3 handler, for struct x86_user_context.
2015-03-03 14:06:30 +09:00
1d2f5d9893
set is_gpr_valid to initial user context
2015-02-27 14:47:43 +09:00
e4f47df3c3
initialize pstate, turbo mode and power/performace bias MSR registers
...
MSR_IA32_MISC_ENABLE, MSR_IA32_PERF_CTL and MSR_IA32_ENERGY_PERF_BIAS
are responsible for performance settings, this change enables McKernel
to perform on par with Linux when running the fwq benchmark.
2015-02-27 11:29:11 +09:00
305ebfed0e
add lookup_user_context(). refs #420
2015-02-26 17:43:10 +09:00
fab2c2aa97
wrap x86_regs with x86_user_context
...
and, rename x86_regs to x86_basic_regs.
2015-02-26 17:43:10 +09:00
