127 lines
4.0 KiB
C
127 lines
4.0 KiB
C
/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/*
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* This file contains all of the code that is specific to the HFI chip,
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* or what we use of them.
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*/
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#include <hfi1/hfi.h>
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#include <hfi1/chip_registers.h>
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#include <hfi1/chip.h>
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//#define DEBUG_PRINT_CHIP
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#ifdef DEBUG_PRINT_CHIP
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#define dkprintf(...) kprintf(__VA_ARGS__)
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#else
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#define dkprintf(...) do { if(0) kprintf(__VA_ARGS__); } while (0)
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#endif
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/*
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* index is the index into the receive array
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*/
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void hfi1_put_tid(struct hfi1_devdata *dd, u32 index,
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u32 type, unsigned long pa, u16 order)
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{
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u64 reg;
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void __iomem *base = (dd->rcvarray_wc ? dd->rcvarray_wc :
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(dd->kregbase1 + RCV_ARRAY));
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if (!(dd->flags & HFI1_PRESENT))
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goto done;
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if (type == PT_INVALID) {
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pa = 0;
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} else if (type > PT_INVALID) {
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kprintf("unexpected receive array type %u for index %u, not handled\n",
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type, index);
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goto done;
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}
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#ifdef TIDRDMA_DEBUG
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hfi1_cdbg(TID, "type %s, index 0x%x, pa 0x%lx, bsize 0x%lx",
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pt_name(type), index, pa, (unsigned long)order);
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#endif
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#define RT_ADDR_SHIFT 12 /* 4KB kernel address boundary */
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reg = RCV_ARRAY_RT_WRITE_ENABLE_SMASK
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| (u64)order << RCV_ARRAY_RT_BUF_SIZE_SHIFT
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| ((pa >> RT_ADDR_SHIFT) & RCV_ARRAY_RT_ADDR_MASK)
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<< RCV_ARRAY_RT_ADDR_SHIFT;
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dkprintf("type %d, index 0x%x, pa 0x%lx, bsize 0x%lx, reg 0x%llx\n",
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type, index, pa, (unsigned long)order, reg);
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writeq(reg, base + (index * 8));
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if (type == PT_EAGER)
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/*
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* Eager entries are written one-by-one so we have to push them
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* after we write the entry.
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*/
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flush_wc();
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done:
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return;
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}
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void hfi1_clear_tids(struct hfi1_ctxtdata *rcd)
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{
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struct hfi1_devdata *dd = rcd->dd;
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u32 i;
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#if 0
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/* this could be optimized */
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for (i = rcd->eager_base; i < rcd->eager_base +
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rcd->egrbufs.alloced; i++)
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hfi1_put_tid(dd, i, PT_INVALID, 0, 0);
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#endif
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for (i = rcd->expected_base;
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i < rcd->expected_base + rcd->expected_count; i++)
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hfi1_put_tid(dd, i, PT_INVALID, 0, 0);
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}
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