9989f41fd3
- add arm64 dependent codes with GICv3 and SVE support - fix bugs based on architecture separation requests
23 lines
495 B
C
23 lines
495 B
C
/* mmu_context.h COPYRIGHT FUJITSU LIMITED 2015 */
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#ifndef __HEADER_ARM64_COMMON_MMU_CONTEXT_H
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#define __HEADER_ARM64_COMMON_MMU_CONTEXT_H
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#include <pgtable.h>
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#include <memory.h>
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/*
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* Set TTBR0 to empty_zero_page. No translations will be possible via TTBR0.
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*/
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static inline void cpu_set_reserved_ttbr0(void)
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{
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unsigned long ttbr = virt_to_phys(empty_zero_page);
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asm(
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" msr ttbr0_el1, %0 // set TTBR0\n"
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" isb"
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:
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: "r" (ttbr));
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}
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#endif /* !__HEADER_ARM64_COMMON_MMU_CONTEXT_H */
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