116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
#ifndef __HEADER_X86_COMMON_ARCH_MEMORY_H
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#define __HEADER_X86_COMMON_ARCH_MEMORY_H
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#define KERNEL_CS_ENTRY 4
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#define KERNEL_DS_ENTRY 5
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#define USER_CS_ENTRY 6
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#define USER_DS_ENTRY 7
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#define GLOBAL_TSS_ENTRY 8
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#define KERNEL_CS (KERNEL_CS_ENTRY * 8)
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#define KERNEL_DS (KERNEL_DS_ENTRY * 8)
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#define USER_CS (USER_CS_ENTRY * 8 + 3)
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#define USER_DS (USER_DS_ENTRY * 8 + 3)
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#define GLOBAL_TSS (GLOBAL_TSS_ENTRY * 8)
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (1UL << PAGE_SHIFT)
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#define PAGE_MASK (~((unsigned long)PAGE_SIZE - 1))
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#define LARGE_PAGE_SHIFT 21
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#define LARGE_PAGE_SIZE (1UL << LARGE_PAGE_SHIFT)
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#define LARGE_PAGE_MASK (~((unsigned long)LARGE_PAGE_SIZE - 1))
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#define USER_END 0x0000800000000000UL
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#define MAP_ST_START 0xffff800000000000UL
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#define MAP_VMAP_START 0xfffff00000000000UL
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#define MAP_FIXED_START 0xffffffff70000000UL
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#define MAP_KERNEL_START 0xffffffff80000000UL
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#define MAP_VMAP_SIZE 0x0000000100000000UL
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#define KERNEL_PHYS_OFFSET MAP_ST_START
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#define PTL4_SHIFT 39
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#define PTL4_SIZE (1UL << PTL4_SHIFT)
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#define PTL3_SHIFT 30
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#define PTL3_SIZE (1UL << PTL3_SHIFT)
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#define PTL2_SHIFT 21
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#define PTL2_SIZE (1UL << PTL2_SHIFT)
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#define PTL1_SHIFT 12
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#define PTL1_SIZE (1UL << PTL1_SHIFT)
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#define PT_ENTRIES 512
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/* mask of the physical address of the entry to the page table */
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#define PT_PHYSMASK (((1UL << 52) - 1) & PAGE_MASK)
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#define PF_PRESENT 0x01 /* entry is valid */
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#define PF_SIZE 0x80 /* entry points large page */
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#define PFL4_PRESENT 0x01
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#define PFL4_WRITABLE 0x02
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#define PFL4_USER 0x04
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#define PFL3_PRESENT 0x01
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#define PFL3_WRITABLE 0x02
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#define PFL3_USER 0x04
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#define PFL3_ACCESSED 0x20
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#define PFL3_DIRTY 0x40
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#define PFL3_SIZE 0x80 /* Used in 1G page */
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#define PFL3_GLOBAL 0x100
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#define PFL2_PRESENT 0x01
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#define PFL2_WRITABLE 0x02
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#define PFL2_USER 0x04
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#define PFL2_ACCESSED 0x20
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#define PFL2_DIRTY 0x40
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#define PFL2_SIZE 0x80 /* Used in 2M page */
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#define PFL2_GLOBAL 0x100
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#define PFL2_PWT 0x08
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#define PFL2_PCD 0x10
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#define PFL1_PRESENT 0x01
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#define PFL1_WRITABLE 0x02
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#define PFL1_USER 0x04
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#define PFL1_ACCESSED 0x20
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#define PFL1_DIRTY 0x40
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#define PFL1_PWT 0x08
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#define PFL1_PCD 0x10
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/* We allow user programs to access all the memory */
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#define PFL4_KERN_ATTR (PFL4_PRESENT | PFL4_WRITABLE)
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#define PFL3_KERN_ATTR (PFL3_PRESENT | PFL3_WRITABLE)
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#define PFL2_KERN_ATTR (PFL2_PRESENT | PFL2_WRITABLE)
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#define PFL1_KERN_ATTR (PFL1_PRESENT | PFL1_WRITABLE)
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/* For easy conversion, it is better to be the same as architecture's ones */
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enum ihk_mc_pt_attribute {
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PTATTR_ACTIVE = 0x01,
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PTATTR_WRITABLE = 0x02,
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PTATTR_USER = 0x04,
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PTATTR_LARGEPAGE = 0x80,
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PTATTR_UNCACHABLE = 0x10000,
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PTATTR_FOR_USER = 0x20000,
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};
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typedef unsigned long pte_t;
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struct page_table;
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void set_pte(pte_t *ppte, unsigned long phys, int attr);
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pte_t *get_pte(struct page_table *pt, void *virt, int attr);
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void *early_alloc_page(void);
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void *get_last_early_heap(void);
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void flush_tlb(void);
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void flush_tlb_single(unsigned long addr);
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void *map_fixed_area(unsigned long phys, unsigned long size, int uncachable);
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#define AP_TRAMPOLINE 0x10000
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#define AP_TRAMPOLINE_SIZE 0x4000
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/* Local is cachable */
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#define IHK_IKC_QUEUE_PT_ATTR (PTATTR_WRITABLE | PTATTR_UNCACHABLE)
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#endif
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