9989f41fd3
- add arm64 dependent codes with GICv3 and SVE support - fix bugs based on architecture separation requests
138 lines
3.3 KiB
C
138 lines
3.3 KiB
C
/* arch-futex.h COPYRIGHT FUJITSU LIMITED 2015 */
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#ifndef __HEADER_ARM64_COMMON_ARCH_FUTEX_H
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#define __HEADER_ARM64_COMMON_ARCH_FUTEX_H
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/*
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* @ref.impl
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* linux-linaro/arch/arm64/include/asm/futex.h:__futex_atomic_op
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*/
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#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
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asm volatile( \
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"1: ldxr %w1, %2\n" \
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insn "\n" \
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"2: stlxr %w3, %w0, %2\n" \
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" cbnz %w3, 1b\n" \
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" dmb ish\n" \
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"3:\n" \
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" .pushsection .fixup,\"ax\"\n" \
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" .align 2\n" \
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"4: mov %w0, %w5\n" \
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" b 3b\n" \
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" .popsection\n" \
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" .pushsection __ex_table,\"a\"\n" \
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" .align 3\n" \
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" .quad 1b, 4b, 2b, 4b\n" \
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" .popsection\n" \
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: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
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: "r" (oparg), "Ir" (-EFAULT) \
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: "memory")
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/*
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* @ref.impl
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* linux-linaro/arch/arm64/include/asm/futex.h:futex_atomic_op_inuser
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*/
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static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret, tmp;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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#ifdef __UACCESS__
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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#endif
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// pagefault_disable(); /* implies preempt_disable() */
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("mov %w0, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("add %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("orr %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("and %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, ~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("eor %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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// pagefault_enable(); /* subsumes preempt_enable() */
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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/*
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* @ref.impl
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* linux-linaro/arch/arm64/include/asm/futex.h:futex_atomic_cmpxchg_inatomic
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* mckernel/kernel/include/futex.h:futex_atomic_cmpxchg_inatomic (x86 depend)
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*/
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static inline int
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futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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{
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int ret = 0;
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int val, tmp;
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if(uaddr == NULL) {
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return -EFAULT;
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}
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#ifdef __UACCESS__
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) {
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return -EFAULT;
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}
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#endif
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asm volatile("// futex_atomic_cmpxchg_inatomic\n"
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"1: ldxr %w1, %2\n"
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" sub %w3, %w1, %w4\n"
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" cbnz %w3, 3f\n"
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"2: stlxr %w3, %w5, %2\n"
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" cbnz %w3, 1b\n"
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" dmb ish\n"
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"3:\n"
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" .pushsection .fixup,\"ax\"\n"
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"4: mov %w0, %w6\n"
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" b 3b\n"
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" .popsection\n"
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" .pushsection __ex_table,\"a\"\n"
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" .align 3\n"
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" .quad 1b, 4b, 2b, 4b\n"
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" .popsection\n"
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: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
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: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
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: "memory");
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return ret;
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}
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#endif /* !__HEADER_ARM64_COMMON_ARCH_FUTEX_H */
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