9989f41fd3
- add arm64 dependent codes with GICv3 and SVE support - fix bugs based on architecture separation requests
71 lines
2.0 KiB
C
71 lines
2.0 KiB
C
/* irq.h COPYRIGHT FUJITSU LIMITED 2015-2017 */
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#ifndef __HEADER_ARM64_IRQ_H
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#define __HEADER_ARM64_IRQ_H
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#include <ihk/debug.h>
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#include <ihk/context.h>
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#include <sysreg.h>
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#include <cputype.h>
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/* use SGI interrupt number */
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#define INTRID_CPU_NOTIFY 0
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#define INTRID_IKC 1
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#define INTRID_QUERY_FREE_MEM 2
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#define INTRID_CPU_STOP 3
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#define INTRID_TLB_FLUSH 4
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#define INTRID_STACK_TRACE 6
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#define INTRID_MEMDUMP 7
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/* use PPI interrupt number */
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#define INTRID_HYP_PHYS_TIMER 26 /* cnthp */
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#define INTRID_VIRT_TIMER 27 /* cntv */
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#define INTRID_HYP_VIRT_TIMER 28 /* cnthv */
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#define INTRID_PHYS_TIMER 30 /* cntp */
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/* timer intrid getter */
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static int get_virt_timer_intrid(void)
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{
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#ifdef CONFIG_ARM64_VHE
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unsigned long mmfr = read_cpuid(ID_AA64MMFR1_EL1);
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if ((mmfr >> ID_AA64MMFR1_VHE_SHIFT) & 1UL) {
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return INTRID_HYP_VIRT_TIMER;
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}
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#endif /* CONFIG_ARM64_VHE */
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return INTRID_VIRT_TIMER;
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}
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static int get_phys_timer_intrid(void)
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{
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#ifdef CONFIG_ARM64_VHE
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unsigned long mmfr = read_cpuid(ID_AA64MMFR1_EL1);
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if ((mmfr >> ID_AA64MMFR1_VHE_SHIFT) & 1UL) {
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return INTRID_HYP_PHYS_TIMER;
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}
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#endif /* CONFIG_ARM64_VHE */
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return INTRID_PHYS_TIMER;
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}
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/* use timer checker */
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extern unsigned long is_use_virt_timer(void);
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/* Functions for GICv2 */
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extern void gic_dist_init_gicv2(unsigned long dist_base_pa, unsigned long size);
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extern void gic_cpu_init_gicv2(unsigned long cpu_base_pa, unsigned long size);
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extern void gic_enable_gicv2(void);
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extern void arm64_issue_ipi_gicv2(unsigned int cpuid, unsigned int vector);
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extern void handle_interrupt_gicv2(struct pt_regs *regs);
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/* Functions for GICv3 */
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extern void gic_dist_init_gicv3(unsigned long dist_base_pa, unsigned long size);
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extern void gic_cpu_init_gicv3(unsigned long cpu_base_pa, unsigned long size);
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extern void gic_enable_gicv3(void);
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extern void arm64_issue_ipi_gicv3(unsigned int cpuid, unsigned int vector);
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extern void handle_interrupt_gicv3(struct pt_regs *regs);
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void handle_IPI(unsigned int vector, struct pt_regs *regs);
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#endif /* __HEADER_ARM64_IRQ_H */
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