340 lines
9.4 KiB
Plaintext
340 lines
9.4 KiB
Plaintext
=========================
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aarch64
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=========================
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physical machine
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----------------
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# ./go_perf_test.sh
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mcstop+release.sh ... done
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mcreboot.sh -c 12,24,36,48 -m 2048M@4,2048M@5,2048M@6,2048M@7 -q 60 ... done
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[PERF_TYPE_HARDWARE all space]
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CPU_CYCLES : 598879183
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INSTRUCTIONS : 319639936
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CACHE_REFERENCES : 291701521
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CACHE_MISSES : 1996672
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BRANCH_INSTRUCTIONS : -1
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BRANCH_MISSES : 4969
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BUS_CYCLES : -1
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STALLED_CYCLES_FRONTEND: 459510
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STALLED_CYCLES_BACKEND : 447838339
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REF_CPU_CYCLES : -1
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[HW_CACHE no exclude]
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L1D _OP_READ _ACCESS: 291757634
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L1D _OP_READ _MISS : 1996674
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L1D _OP_WRITE _ACCESS: 291675494
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L1D _OP_WRITE _MISS : 1996674
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L1D _OP_PREFETCH_ACCESS: -1
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L1D _OP_PREFETCH_MISS : -1
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L1I _OP_READ _ACCESS: 109900150
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L1I _OP_READ _MISS : 239
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L1I _OP_WRITE _ACCESS: -1
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L1I _OP_WRITE _MISS : -1
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L1I _OP_PREFETCH_ACCESS: -1
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L1I _OP_PREFETCH_MISS : -1
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LL _OP_READ _ACCESS: -1
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LL _OP_READ _MISS : -1
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LL _OP_WRITE _ACCESS: -1
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LL _OP_WRITE _MISS : -1
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LL _OP_PREFETCH_ACCESS: -1
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LL _OP_PREFETCH_MISS : -1
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DTLB_OP_READ _ACCESS: -1
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DTLB_OP_READ _MISS : 893625
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DTLB_OP_WRITE _ACCESS: -1
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DTLB_OP_WRITE _MISS : -1
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DTLB_OP_PREFETCH_ACCESS: -1
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DTLB_OP_PREFETCH_MISS : -1
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ITLB_OP_READ _ACCESS: -1
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ITLB_OP_READ _MISS : 17
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ITLB_OP_WRITE _ACCESS: -1
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ITLB_OP_WRITE _MISS : -1
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ITLB_OP_PREFETCH_ACCESS: -1
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ITLB_OP_PREFETCH_MISS : -1
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BPU _OP_READ _ACCESS: 42163456
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BPU _OP_READ _MISS : 5007
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BPU _OP_WRITE _ACCESS: 42163456
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BPU _OP_WRITE _MISS : 4967
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BPU _OP_PREFETCH_ACCESS: -1
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BPU _OP_PREFETCH_MISS : -1
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NODE_OP_READ _ACCESS: -1
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NODE_OP_READ _MISS : -1
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NODE_OP_WRITE _ACCESS: -1
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NODE_OP_WRITE _MISS : -1
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NODE_OP_PREFETCH_ACCESS: -1
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NODE_OP_PREFETCH_MISS : -1
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[HARDWARE exclude user space]
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CPU_CYCLES : 597147551
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INSTRUCTIONS : 573314
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CACHE_REFERENCES : 31995
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CACHE_MISSES : 214
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BRANCH_INSTRUCTIONS : -1
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BRANCH_MISSES : 228
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BUS_CYCLES : -1
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STALLED_CYCLES_FRONTEND: 20866
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STALLED_CYCLES_BACKEND : 1215677
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REF_CPU_CYCLES : -1
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[HW_CACHE exclude user space]
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L1D _OP_READ _ACCESS: 31883
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L1D _OP_READ _MISS : 216
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L1D _OP_WRITE _ACCESS: 31998
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L1D _OP_WRITE _MISS : 217
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L1D _OP_PREFETCH_ACCESS: -1
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L1D _OP_PREFETCH_MISS : -1
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L1I _OP_READ _ACCESS: 34195
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L1I _OP_READ _MISS : 148
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L1I _OP_WRITE _ACCESS: -1
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L1I _OP_WRITE _MISS : -1
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L1I _OP_PREFETCH_ACCESS: -1
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L1I _OP_PREFETCH_MISS : -1
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LL _OP_READ _ACCESS: -1
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LL _OP_READ _MISS : -1
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LL _OP_WRITE _ACCESS: -1
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LL _OP_WRITE _MISS : -1
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LL _OP_PREFETCH_ACCESS: -1
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LL _OP_PREFETCH_MISS : -1
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DTLB_OP_READ _ACCESS: -1
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DTLB_OP_READ _MISS : 39
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DTLB_OP_WRITE _ACCESS: -1
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DTLB_OP_WRITE _MISS : -1
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DTLB_OP_PREFETCH_ACCESS: -1
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DTLB_OP_PREFETCH_MISS : -1
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ITLB_OP_READ _ACCESS: -1
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ITLB_OP_READ _MISS : 7
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ITLB_OP_WRITE _ACCESS: -1
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ITLB_OP_WRITE _MISS : -1
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ITLB_OP_PREFETCH_ACCESS: -1
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ITLB_OP_PREFETCH_MISS : -1
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BPU _OP_READ _ACCESS: 141350
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BPU _OP_READ _MISS : 203
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BPU _OP_WRITE _ACCESS: 141350
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BPU _OP_WRITE _MISS : 217
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BPU _OP_PREFETCH_ACCESS: -1
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BPU _OP_PREFETCH_MISS : -1
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NODE_OP_READ _ACCESS: -1
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NODE_OP_READ _MISS : -1
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NODE_OP_WRITE _ACCESS: -1
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NODE_OP_WRITE _MISS : -1
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NODE_OP_PREFETCH_ACCESS: -1
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NODE_OP_PREFETCH_MISS : -1
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[HARDWARE exclude kernel space]
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CPU_CYCLES : 597505046
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INSTRUCTIONS : 319066622
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CACHE_REFERENCES : 291626611
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CACHE_MISSES : 1996458
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BRANCH_INSTRUCTIONS : -1
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BRANCH_MISSES : 4743
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BUS_CYCLES : -1
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STALLED_CYCLES_FRONTEND: 437710
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STALLED_CYCLES_BACKEND : 446177603
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REF_CPU_CYCLES : -1
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[HW_CACHE exclude kernel space]
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L1D _OP_READ _ACCESS: 291624405
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L1D _OP_READ _MISS : 1996457
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L1D _OP_WRITE _ACCESS: 291628743
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L1D _OP_WRITE _MISS : 1996459
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L1D _OP_PREFETCH_ACCESS: -1
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L1D _OP_PREFETCH_MISS : -1
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L1I _OP_READ _ACCESS: 109868221
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L1I _OP_READ _MISS : 87
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L1I _OP_WRITE _ACCESS: -1
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L1I _OP_WRITE _MISS : -1
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L1I _OP_PREFETCH_ACCESS: -1
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L1I _OP_PREFETCH_MISS : -1
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LL _OP_READ _ACCESS: -1
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LL _OP_READ _MISS : -1
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LL _OP_WRITE _ACCESS: -1
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LL _OP_WRITE _MISS : -1
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LL _OP_PREFETCH_ACCESS: -1
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LL _OP_PREFETCH_MISS : -1
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DTLB_OP_READ _ACCESS: -1
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DTLB_OP_READ _MISS : 893411
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DTLB_OP_WRITE _ACCESS: -1
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DTLB_OP_WRITE _MISS : -1
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DTLB_OP_PREFETCH_ACCESS: -1
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DTLB_OP_PREFETCH_MISS : -1
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ITLB_OP_READ _ACCESS: -1
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ITLB_OP_READ _MISS : 9
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ITLB_OP_WRITE _ACCESS: -1
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ITLB_OP_WRITE _MISS : -1
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ITLB_OP_PREFETCH_ACCESS: -1
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ITLB_OP_PREFETCH_MISS : -1
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BPU _OP_READ _ACCESS: 42022106
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BPU _OP_READ _MISS : 4729
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BPU _OP_WRITE _ACCESS: 42022106
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BPU _OP_WRITE _MISS : 4733
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BPU _OP_PREFETCH_ACCESS: -1
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BPU _OP_PREFETCH_MISS : -1
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NODE_OP_READ _ACCESS: -1
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NODE_OP_READ _MISS : -1
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NODE_OP_WRITE _ACCESS: -1
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NODE_OP_WRITE _MISS : -1
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NODE_OP_PREFETCH_ACCESS: -1
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NODE_OP_PREFETCH_MISS : -1
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virtual machine
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----------------
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# ./go_perf_test.sh
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mcstop+release.sh ... done
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mcreboot.sh -c 4-15 -m 16G ... done
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[PERF_TYPE_HARDWARE all space]
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CPU_CYCLES : 2512315570
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INSTRUCTIONS : -1
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CACHE_REFERENCES : -1
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CACHE_MISSES : -1
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BRANCH_INSTRUCTIONS : -1
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BRANCH_MISSES : -1
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BUS_CYCLES : -1
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STALLED_CYCLES_FRONTEND: -1
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STALLED_CYCLES_BACKEND : -1
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REF_CPU_CYCLES : -1
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[HW_CACHE no exclude]
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L1D _OP_READ _ACCESS: -1
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L1D _OP_READ _MISS : -1
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L1D _OP_WRITE _ACCESS: -1
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L1D _OP_WRITE _MISS : -1
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L1D _OP_PREFETCH_ACCESS: -1
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L1D _OP_PREFETCH_MISS : -1
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L1I _OP_READ _ACCESS: -1
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L1I _OP_READ _MISS : -1
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L1I _OP_WRITE _ACCESS: -1
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L1I _OP_WRITE _MISS : -1
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L1I _OP_PREFETCH_ACCESS: -1
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L1I _OP_PREFETCH_MISS : -1
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LL _OP_READ _ACCESS: -1
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LL _OP_READ _MISS : -1
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LL _OP_WRITE _ACCESS: -1
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LL _OP_WRITE _MISS : -1
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LL _OP_PREFETCH_ACCESS: -1
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LL _OP_PREFETCH_MISS : -1
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DTLB_OP_READ _ACCESS: -1
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DTLB_OP_READ _MISS : -1
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DTLB_OP_WRITE _ACCESS: -1
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DTLB_OP_WRITE _MISS : -1
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DTLB_OP_PREFETCH_ACCESS: -1
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DTLB_OP_PREFETCH_MISS : -1
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ITLB_OP_READ _ACCESS: -1
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ITLB_OP_READ _MISS : -1
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ITLB_OP_WRITE _ACCESS: -1
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ITLB_OP_WRITE _MISS : -1
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ITLB_OP_PREFETCH_ACCESS: -1
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ITLB_OP_PREFETCH_MISS : -1
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BPU _OP_READ _ACCESS: -1
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BPU _OP_READ _MISS : -1
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BPU _OP_WRITE _ACCESS: -1
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BPU _OP_WRITE _MISS : -1
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BPU _OP_PREFETCH_ACCESS: -1
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BPU _OP_PREFETCH_MISS : -1
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NODE_OP_READ _ACCESS: -1
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NODE_OP_READ _MISS : -1
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NODE_OP_WRITE _ACCESS: -1
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NODE_OP_WRITE _MISS : -1
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NODE_OP_PREFETCH_ACCESS: -1
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NODE_OP_PREFETCH_MISS : -1
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[HARDWARE exclude user space]
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CPU_CYCLES : 1631207786
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INSTRUCTIONS : -1
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CACHE_REFERENCES : -1
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CACHE_MISSES : -1
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BRANCH_INSTRUCTIONS : -1
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BRANCH_MISSES : -1
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BUS_CYCLES : -1
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STALLED_CYCLES_FRONTEND: -1
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STALLED_CYCLES_BACKEND : -1
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REF_CPU_CYCLES : -1
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[HW_CACHE exclude user space]
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L1D _OP_READ _ACCESS: -1
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L1D _OP_READ _MISS : -1
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L1D _OP_WRITE _ACCESS: -1
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L1D _OP_WRITE _MISS : -1
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L1D _OP_PREFETCH_ACCESS: -1
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L1D _OP_PREFETCH_MISS : -1
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L1I _OP_READ _ACCESS: -1
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L1I _OP_READ _MISS : -1
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L1I _OP_WRITE _ACCESS: -1
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L1I _OP_WRITE _MISS : -1
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L1I _OP_PREFETCH_ACCESS: -1
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L1I _OP_PREFETCH_MISS : -1
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LL _OP_READ _ACCESS: -1
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LL _OP_READ _MISS : -1
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LL _OP_WRITE _ACCESS: -1
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LL _OP_WRITE _MISS : -1
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LL _OP_PREFETCH_ACCESS: -1
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LL _OP_PREFETCH_MISS : -1
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DTLB_OP_READ _ACCESS: -1
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DTLB_OP_READ _MISS : -1
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DTLB_OP_WRITE _ACCESS: -1
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DTLB_OP_WRITE _MISS : -1
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DTLB_OP_PREFETCH_ACCESS: -1
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DTLB_OP_PREFETCH_MISS : -1
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ITLB_OP_READ _ACCESS: -1
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ITLB_OP_READ _MISS : -1
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ITLB_OP_WRITE _ACCESS: -1
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ITLB_OP_WRITE _MISS : -1
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ITLB_OP_PREFETCH_ACCESS: -1
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ITLB_OP_PREFETCH_MISS : -1
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BPU _OP_READ _ACCESS: -1
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BPU _OP_READ _MISS : -1
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BPU _OP_WRITE _ACCESS: -1
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BPU _OP_WRITE _MISS : -1
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BPU _OP_PREFETCH_ACCESS: -1
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BPU _OP_PREFETCH_MISS : -1
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NODE_OP_READ _ACCESS: -1
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NODE_OP_READ _MISS : -1
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NODE_OP_WRITE _ACCESS: -1
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NODE_OP_WRITE _MISS : -1
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NODE_OP_PREFETCH_ACCESS: -1
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NODE_OP_PREFETCH_MISS : -1
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[HARDWARE exclude kernel space]
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CPU_CYCLES : 1595055278
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INSTRUCTIONS : -1
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CACHE_REFERENCES : -1
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CACHE_MISSES : -1
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BRANCH_INSTRUCTIONS : -1
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BRANCH_MISSES : -1
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BUS_CYCLES : -1
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STALLED_CYCLES_FRONTEND: -1
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STALLED_CYCLES_BACKEND : -1
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REF_CPU_CYCLES : -1
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[HW_CACHE exclude kernel space]
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L1D _OP_READ _ACCESS: -1
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L1D _OP_READ _MISS : -1
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L1D _OP_WRITE _ACCESS: -1
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L1D _OP_WRITE _MISS : -1
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L1D _OP_PREFETCH_ACCESS: -1
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L1D _OP_PREFETCH_MISS : -1
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L1I _OP_READ _ACCESS: -1
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L1I _OP_READ _MISS : -1
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L1I _OP_WRITE _ACCESS: -1
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L1I _OP_WRITE _MISS : -1
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L1I _OP_PREFETCH_ACCESS: -1
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L1I _OP_PREFETCH_MISS : -1
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LL _OP_READ _ACCESS: -1
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LL _OP_READ _MISS : -1
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LL _OP_WRITE _ACCESS: -1
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LL _OP_WRITE _MISS : -1
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LL _OP_PREFETCH_ACCESS: -1
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LL _OP_PREFETCH_MISS : -1
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DTLB_OP_READ _ACCESS: -1
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DTLB_OP_READ _MISS : -1
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DTLB_OP_WRITE _ACCESS: -1
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DTLB_OP_WRITE _MISS : -1
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DTLB_OP_PREFETCH_ACCESS: -1
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DTLB_OP_PREFETCH_MISS : -1
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ITLB_OP_READ _ACCESS: -1
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ITLB_OP_READ _MISS : -1
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ITLB_OP_WRITE _ACCESS: -1
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ITLB_OP_WRITE _MISS : -1
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ITLB_OP_PREFETCH_ACCESS: -1
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ITLB_OP_PREFETCH_MISS : -1
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BPU _OP_READ _ACCESS: -1
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BPU _OP_READ _MISS : -1
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BPU _OP_WRITE _ACCESS: -1
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BPU _OP_WRITE _MISS : -1
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BPU _OP_PREFETCH_ACCESS: -1
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BPU _OP_PREFETCH_MISS : -1
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NODE_OP_READ _ACCESS: -1
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NODE_OP_READ _MISS : -1
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NODE_OP_WRITE _ACCESS: -1
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NODE_OP_WRITE _MISS : -1
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NODE_OP_PREFETCH_ACCESS: -1
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NODE_OP_PREFETCH_MISS : -1
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