313 lines
8.8 KiB
C
313 lines
8.8 KiB
C
/* mc_perf_event.h COPYRIGHT FUJITSU LIMITED 2016 */
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#ifndef MC_PERF_EVENT_H
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#define MC_PERF_EVENT_H
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//#ifdef POSTK_DEBUG_TEMP_FIX_32
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#include <list.h>
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//#endif /*POSTK_DEBUG_TEMP_FIX_32*/
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#include <march.h>
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struct perf_event_attr;
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/**
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* IOC Macro start
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*/
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#define _IOC_NRBITS 8
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#define _IOC_TYPEBITS 8
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#ifndef _IOC_SIZEBITS
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# define _IOC_SIZEBITS 14
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#endif
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#ifndef _IOC_DIRBITS
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# define _IOC_DIRBITS 2
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#endif
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#define _IOC_NRSHIFT 0
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#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
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#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
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#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
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#ifndef _IOC_NONE
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# define _IOC_NONE 0U
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#endif
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#ifndef _IOC_WRITE
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# define _IOC_WRITE 1U
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#endif
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#ifndef _IOC_READ
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# define _IOC_READ 2U
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#endif
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#define _IOC(dir,type,nr,size) \
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(((dir) << _IOC_DIRSHIFT) | \
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((type) << _IOC_TYPESHIFT) | \
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((nr) << _IOC_NRSHIFT) | \
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((size) << _IOC_SIZESHIFT))
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#define _IOC_TYPECHECK(t) (sizeof(t))
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/* used to create numbers */
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#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
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#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
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#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
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#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
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#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
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#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
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#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
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/**
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* IOC Macro end
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*/
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#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
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#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
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#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
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#define PERF_EVENT_IOC_RESET _IO ('$', 3)
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enum perf_type_id {
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PERF_TYPE_HARDWARE = 0,
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PERF_TYPE_SOFTWARE = 1,
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PERF_TYPE_TRACEPOINT = 2,
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PERF_TYPE_HW_CACHE = 3,
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PERF_TYPE_RAW = 4,
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PERF_TYPE_BREAKPOINT = 5,
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PERF_TYPE_MAX, /* non-ABI */
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};
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enum perf_event_read_format {
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PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
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PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
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PERF_FORMAT_ID = 1U << 2,
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PERF_FORMAT_GROUP = 1U << 3,
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PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
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};
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enum perf_hw_id {
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/*
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* Common hardware events, generalized by the kernel:
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*/
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PERF_COUNT_HW_CPU_CYCLES = 0,
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PERF_COUNT_HW_INSTRUCTIONS = 1,
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PERF_COUNT_HW_CACHE_REFERENCES = 2,
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PERF_COUNT_HW_CACHE_MISSES = 3,
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PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
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PERF_COUNT_HW_BRANCH_MISSES = 5,
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PERF_COUNT_HW_BUS_CYCLES = 6,
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PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7,
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PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8,
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PERF_COUNT_HW_REF_CPU_CYCLES = 9,
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PERF_COUNT_HW_MAX, /* non-ABI */
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};
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/*
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* Generalized hardware cache events:
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*
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* { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
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* { read, write, prefetch } x
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* { accesses, misses }
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*/
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enum perf_hw_cache_id {
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PERF_COUNT_HW_CACHE_L1D = 0,
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PERF_COUNT_HW_CACHE_L1I = 1,
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PERF_COUNT_HW_CACHE_LL = 2,
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PERF_COUNT_HW_CACHE_DTLB = 3,
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PERF_COUNT_HW_CACHE_ITLB = 4,
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PERF_COUNT_HW_CACHE_BPU = 5,
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PERF_COUNT_HW_CACHE_NODE = 6,
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PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
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};
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enum perf_hw_cache_op_id {
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PERF_COUNT_HW_CACHE_OP_READ = 0,
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PERF_COUNT_HW_CACHE_OP_WRITE = 1,
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PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
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PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
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};
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enum perf_hw_cache_op_result_id {
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PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
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PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
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PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
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};
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/*
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* Hardware event_id to monitor via a performance monitoring event:
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*/
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struct perf_event_attr {
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/*
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* Major type: hardware/software/tracepoint/etc.
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*/
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unsigned int type;
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/*
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* Size of the attr structure, for fwd/bwd compat.
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*/
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unsigned int size;
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/*
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* Type specific configuration information.
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*/
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unsigned long config;
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union {
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unsigned long sample_period;
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unsigned long sample_freq;
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};
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unsigned long sample_type;
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unsigned long read_format;
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unsigned long disabled : 1, /* off by default */
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inherit : 1, /* children inherit it */
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pinned : 1, /* must always be on PMU */
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exclusive : 1, /* only group on PMU */
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exclude_user : 1, /* don't count user */
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exclude_kernel : 1, /* ditto kernel */
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exclude_hv : 1, /* ditto hypervisor */
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exclude_idle : 1, /* don't count when idle */
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mmap : 1, /* include mmap data */
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comm : 1, /* include comm data */
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freq : 1, /* use freq, not period */
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inherit_stat : 1, /* per task counts */
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enable_on_exec : 1, /* next exec enables */
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task : 1, /* trace fork/exit */
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watermark : 1, /* wakeup_watermark */
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/*
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* precise_ip:
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*
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* 0 - SAMPLE_IP can have arbitrary skid
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* 1 - SAMPLE_IP must have constant skid
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* 2 - SAMPLE_IP requested to have 0 skid
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* 3 - SAMPLE_IP must have 0 skid
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*
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* See also PERF_RECORD_MISC_EXACT_IP
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*/
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precise_ip : 2, /* skid constraint */
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mmap_data : 1, /* non-exec mmap data */
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sample_id_all : 1, /* sample_type all events */
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exclude_host : 1, /* don't count in host */
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exclude_guest : 1, /* don't count in guest */
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exclude_callchain_kernel : 1, /* exclude kernel callchains */
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exclude_callchain_user : 1, /* exclude user callchains */
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mmap2 : 1, /* include mmap with inode data */
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#ifdef __GENKSYMS__
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__reserved_1 : 40;
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#else
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comm_exec : 1, /* flag comm events that are due to an exec */
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__reserved_1 : 39;
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#endif
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union {
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unsigned int wakeup_events; /* wakeup every n events */
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unsigned int wakeup_watermark; /* bytes before wakeup */
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};
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unsigned int bp_type;
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union {
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unsigned long bp_addr;
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unsigned long config1; /* extension of config */
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};
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union {
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unsigned long bp_len;
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unsigned long config2; /* extension of config1 */
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};
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unsigned long branch_sample_type; /* enum perf_branch_sample_type */
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/*
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* Defines set of user regs to dump on samples.
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* See asm/perf_regs.h for details.
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*/
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unsigned long sample_regs_user;
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/*
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* Defines size of the user stack to dump on samples.
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*/
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unsigned int sample_stack_user;
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/* Align to unsigned long. */
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unsigned int __reserved_2;
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/*
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* Defines set of regs to dump for each sample
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* state captured on:
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* - precise = 0: PMU interrupt
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* - precise > 0: sampled instruction
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*
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* See asm/perf_regs.h for details.
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*/
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#ifndef __GENKSYMS__
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unsigned long sample_regs_intr;
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#endif
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};
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struct hw_perf_event_extra {
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unsigned long config;
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unsigned int reg;
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int idx;
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};
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struct mc_perf_event {
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struct perf_event_attr attr;
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struct hw_perf_event_extra extra_reg;
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unsigned long hw_config;
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unsigned long hw_config_ext;
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int cpu_id;
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int counter_id; // counter_id
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unsigned long count; // counter_value
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unsigned long child_count_total; // child_counter_value
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unsigned long pmc_status;
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unsigned long sample_freq;
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struct mc_perf_event *parent;
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struct mc_perf_event *group_leader;
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struct list_head sibling_list;
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int nr_siblings;
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int pid;
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struct list_head group_entry;
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};
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struct perf_event_mmap_page {
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unsigned int version; // version number of this structure
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unsigned int compat_version; // lowest version this is compat with
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unsigned int lock; // seqlock for synchronization
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unsigned int index; // hardware event identifier
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long offset; // add to hardware event value
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unsigned long time_enabled; // time evet active
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unsigned long time_running; // time event on cpu
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union {
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unsigned long capabilities;
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struct {
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unsigned long cap_bit0 : 1, // Always 0, deprecated
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cap_bit0_is_deprecated : 1, // Always 1, signals that bit 0 is zero
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cap_user_rdpmc : 1, // The RDPMC instruction can be used to read counts
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cap_user_time : 1, // The time_* fields are used
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cap_user_time_zero : 1, // The time_zero field is used
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cap_____res : 59;
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};
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};
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unsigned short pmc_width;
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unsigned short time_shift;
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unsigned int time_mult;
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unsigned long time_offset;
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unsigned long time_zero;
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unsigned int size;
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unsigned char __reserved[118*8+4];
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unsigned long data_head;
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unsigned long data_tail;
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};
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#endif
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