From b4e64b8f52c36de345cfa92d6771f272056f2fa5 Mon Sep 17 00:00:00 2001 From: CGH0S7 <776459475@qq.com> Date: Thu, 2 Jan 2025 17:12:14 +0800 Subject: [PATCH] Code Optimization and Clean Up --- .gitignore | 2 + Core.sv | 802 +++++++++--------- Memory.sv | 187 +--- Regfile.sv | 52 +- Top.sv | 70 +- TopOrigin.sv | 135 +-- project/project/metals.sbt | 8 - project/project/project/metals.sbt | 8 - .../$57f93b93490ea1894b63.cache | 1 - .../$534d41cbf8671b3d9a73.cache | 1 - .../scala-2.12/sbt-1.0/sync/copy-resource | 1 - .../sbt-1.0/update/update_cache_2.12/inputs | 1 - .../sbt-1.0/update/update_cache_2.12/output | 1 - .../_global/_global/_global/streams/out | 0 .../csrConfiguration/_global/streams/out | 0 .../_global/csrProject/_global/streams/out | 0 .../streams/update_cache_2.12/input_dsp | 1 - .../streams/update_cache_2.12/output_dsp | 1 - .../ivyConfiguration/_global/streams/out | 0 .../_global/ivySbt/_global/streams/out | 0 .../moduleSettings/_global/streams/out | 0 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mode 100755 project/target/streams/test/bloopGenerate/_global/streams/out delete mode 100755 project/target/streams/test/bloopPostGenerate/_global/streams/out create mode 100755 src/hex/mem.dat diff --git a/.gitignore b/.gitignore index 2dede9b..0db716f 100755 --- a/.gitignore +++ b/.gitignore @@ -8,6 +8,8 @@ *.code-workspace target/* .vscode +test_run_dir +target # virtual machine crash logs, see http://www.java.com/en/download/help/error_hotspot.xml hs_err_pid* diff --git a/Core.sv b/Core.sv index f5f086f..e63bdc8 100755 --- a/Core.sv +++ b/Core.sv @@ -20,408 +20,408 @@ ////////////////////////////////////////////////////////////////////////////////// module Core( - input clock, - reset, - output [31:0] io_imem_addr, - input [31:0] io_imem_inst, - output [31:0] io_dmem_addr, - input [31:0] io_dmem_rdata, - output io_dmem_wen, - output [31:0] io_dmem_wdata, - output [3:0] io_anodes, - output [6:0] io_segments, - output io_exit - ); + input clock, + reset, + output [31:0] io_imem_addr, + input [31:0] io_imem_inst, + output [31:0] io_dmem_addr, + input [31:0] io_dmem_rdata, + output io_dmem_wen, + output [31:0] io_dmem_wdata, + output [3:0] io_anodes, + output [6:0] io_segments, + output io_exit +); - wire exe_jmp_flg; - wire exe_br_flg; - wire [31:0] _regfile_ext_R0_data; - wire [31:0] _regfile_ext_R1_data; - reg [31:0] id_reg_pc; - reg [31:0] id_reg_inst; - reg [31:0] exe_reg_pc; - reg [4:0] exe_reg_wb_addr; - reg [31:0] exe_reg_op1_data; - reg [31:0] exe_reg_op2_data; - reg [31:0] exe_reg_rt_data; - reg [4:0] exe_reg_exe_fun; - reg [1:0] exe_reg_mem_wen; - reg [1:0] exe_reg_rf_wen; - reg [2:0] exe_reg_wb_sel; - reg [31:0] exe_reg_imm_i_sext; - reg [31:0] mem_reg_pc; - reg [4:0] mem_reg_wb_addr; - reg [31:0] mem_reg_rt_data; - reg [1:0] mem_reg_mem_wen; - reg [1:0] mem_reg_rf_wen; - reg [2:0] mem_reg_wb_sel; - reg [31:0] mem_reg_alu_out; - reg [4:0] wb_reg_wb_addr; - reg [1:0] wb_reg_rf_wen; - reg [31:0] wb_reg_wb_data; - reg [31:0] if_reg_pc; - wire _id_inst_T = exe_br_flg | exe_jmp_flg; - wire _id_rt_data_T_2 = exe_reg_rf_wen == 2'h1; - wire stall_flg = - _id_rt_data_T_2 & (|(id_reg_inst[25:21])) & id_reg_inst[25:21] == exe_reg_wb_addr - | _id_rt_data_T_2 & (|(id_reg_inst[20:16])) & id_reg_inst[20:16] == exe_reg_wb_addr; - wire [31:0] id_inst = _id_inst_T | stall_flg ? 32'h20000000 : id_reg_inst; - wire _id_rt_data_T_8 = wb_reg_rf_wen == 2'h1; - wire _exe_alu_out_T = exe_reg_exe_fun == 5'h1; - wire [31:0] _exe_alu_out_T_1 = exe_reg_op1_data + exe_reg_op2_data; - wire _exe_alu_out_T_3 = exe_reg_exe_fun == 5'h2; - wire [31:0] _exe_alu_out_T_4 = exe_reg_op1_data - exe_reg_op2_data; - wire _exe_alu_out_T_6 = exe_reg_exe_fun == 5'h3; - wire [31:0] _exe_alu_out_T_7 = exe_reg_op1_data & exe_reg_op2_data; - wire _exe_alu_out_T_8 = exe_reg_exe_fun == 5'h4; - wire [31:0] _exe_alu_out_T_9 = exe_reg_op1_data | exe_reg_op2_data; - wire _exe_alu_out_T_10 = exe_reg_exe_fun == 5'h5; - wire [31:0] _exe_alu_out_T_11 = exe_reg_op1_data ^ exe_reg_op2_data; - wire _exe_alu_out_T_12 = exe_reg_exe_fun == 5'h6; - wire [62:0] _exe_alu_out_T_14 = {31'h0, exe_reg_op1_data} << exe_reg_op2_data[4:0]; - wire _exe_alu_out_T_16 = exe_reg_exe_fun == 5'h7; - wire [31:0] _GEN = {27'h0, exe_reg_op2_data[4:0]}; - wire [31:0] _exe_alu_out_T_18 = exe_reg_op1_data >> _GEN; - wire _exe_alu_out_T_19 = exe_reg_exe_fun == 5'h8; - wire [31:0] _exe_alu_out_T_22 = $signed($signed(exe_reg_op1_data) >>> _GEN); - wire _exe_alu_out_T_24 = exe_reg_exe_fun == 5'h9; - wire _exe_alu_out_T_28 = exe_reg_exe_fun == 5'hD; - wire [31:0] _exe_alu_out_T_29 = _exe_alu_out_T_28 ? exe_reg_op1_data : 32'h0; - wire [31:0] _GEN_0 = {31'h0, $signed(exe_reg_op1_data) < $signed(exe_reg_op2_data)}; - wire [31:0] exe_alu_out = - _exe_alu_out_T - ? _exe_alu_out_T_1 - : _exe_alu_out_T_3 - ? _exe_alu_out_T_4 - : _exe_alu_out_T_6 - ? _exe_alu_out_T_7 - : _exe_alu_out_T_8 - ? _exe_alu_out_T_9 - : _exe_alu_out_T_10 - ? _exe_alu_out_T_11 - : _exe_alu_out_T_12 - ? _exe_alu_out_T_14[31:0] - : _exe_alu_out_T_16 - ? _exe_alu_out_T_18 - : _exe_alu_out_T_19 - ? _exe_alu_out_T_22 - : _exe_alu_out_T_24 ? _GEN_0 : _exe_alu_out_T_29; - assign exe_br_flg = - exe_reg_exe_fun == 5'hB - ? exe_reg_op1_data == exe_reg_op2_data - : exe_reg_exe_fun == 5'hC & exe_reg_op1_data != exe_reg_op2_data; - assign exe_jmp_flg = exe_reg_wb_sel == 3'h3; - wire [31:0] mem_wb_data = - mem_reg_wb_sel == 3'h2 - ? io_dmem_rdata - : mem_reg_wb_sel == 3'h3 ? mem_reg_pc + 32'h4 : mem_reg_alu_out; - always @(posedge clock) begin - if (reset) begin - id_reg_pc <= 32'h0; - id_reg_inst <= 32'h0; - exe_reg_pc <= 32'h0; - exe_reg_wb_addr <= 5'h0; + wire exe_jmp_flg; + wire exe_br_flg; + wire [31:0] _regfile_ext_R0_data; + wire [31:0] _regfile_ext_R1_data; + reg [31:0] id_reg_pc; + reg [31:0] id_reg_inst; + reg [31:0] exe_reg_pc; + reg [4:0] exe_reg_wb_addr; + reg [31:0] exe_reg_op1_data; + reg [31:0] exe_reg_op2_data; + reg [31:0] exe_reg_rt_data; + reg [4:0] exe_reg_exe_fun; + reg [1:0] exe_reg_mem_wen; + reg [1:0] exe_reg_rf_wen; + reg [2:0] exe_reg_wb_sel; + reg [31:0] exe_reg_imm_i_sext; + reg [31:0] mem_reg_pc; + reg [4:0] mem_reg_wb_addr; + reg [31:0] mem_reg_rt_data; + reg [1:0] mem_reg_mem_wen; + reg [1:0] mem_reg_rf_wen; + reg [2:0] mem_reg_wb_sel; + reg [31:0] mem_reg_alu_out; + reg [4:0] wb_reg_wb_addr; + reg [1:0] wb_reg_rf_wen; + reg [31:0] wb_reg_wb_data; + reg [31:0] if_reg_pc; + wire _id_inst_T = exe_br_flg | exe_jmp_flg; + wire _id_rt_data_T_2 = exe_reg_rf_wen == 2'h1; + wire stall_flg = + _id_rt_data_T_2 & (|(id_reg_inst[25:21])) & id_reg_inst[25:21] == exe_reg_wb_addr + | _id_rt_data_T_2 & (|(id_reg_inst[20:16])) & id_reg_inst[20:16] == exe_reg_wb_addr; + wire [31:0] id_inst = _id_inst_T | stall_flg ? 32'h20000000 : id_reg_inst; + wire _id_rt_data_T_8 = wb_reg_rf_wen == 2'h1; + wire _exe_alu_out_T = exe_reg_exe_fun == 5'h1; + wire [31:0] _exe_alu_out_T_1 = exe_reg_op1_data + exe_reg_op2_data; + wire _exe_alu_out_T_3 = exe_reg_exe_fun == 5'h2; + wire [31:0] _exe_alu_out_T_4 = exe_reg_op1_data - exe_reg_op2_data; + wire _exe_alu_out_T_6 = exe_reg_exe_fun == 5'h3; + wire [31:0] _exe_alu_out_T_7 = exe_reg_op1_data & exe_reg_op2_data; + wire _exe_alu_out_T_8 = exe_reg_exe_fun == 5'h4; + wire [31:0] _exe_alu_out_T_9 = exe_reg_op1_data | exe_reg_op2_data; + wire _exe_alu_out_T_10 = exe_reg_exe_fun == 5'h5; + wire [31:0] _exe_alu_out_T_11 = exe_reg_op1_data ^ exe_reg_op2_data; + wire _exe_alu_out_T_12 = exe_reg_exe_fun == 5'h6; + wire [62:0] _exe_alu_out_T_14 = {31'h0, exe_reg_op1_data} << exe_reg_op2_data[4:0]; + wire _exe_alu_out_T_16 = exe_reg_exe_fun == 5'h7; + wire [31:0] _GEN = {27'h0, exe_reg_op2_data[4:0]}; + wire [31:0] _exe_alu_out_T_18 = exe_reg_op1_data >> _GEN; + wire _exe_alu_out_T_19 = exe_reg_exe_fun == 5'h8; + wire [31:0] _exe_alu_out_T_22 = $signed($signed(exe_reg_op1_data) >>> _GEN); + wire _exe_alu_out_T_24 = exe_reg_exe_fun == 5'h9; + wire _exe_alu_out_T_28 = exe_reg_exe_fun == 5'hD; + wire [31:0] _exe_alu_out_T_29 = _exe_alu_out_T_28 ? exe_reg_op1_data : 32'h0; + wire [31:0] _GEN_0 = {31'h0, $signed(exe_reg_op1_data) < $signed(exe_reg_op2_data)}; + wire [31:0] exe_alu_out = + _exe_alu_out_T + ? _exe_alu_out_T_1 + : _exe_alu_out_T_3 + ? _exe_alu_out_T_4 + : _exe_alu_out_T_6 + ? _exe_alu_out_T_7 + : _exe_alu_out_T_8 + ? _exe_alu_out_T_9 + : _exe_alu_out_T_10 + ? _exe_alu_out_T_11 + : _exe_alu_out_T_12 + ? _exe_alu_out_T_14[31:0] + : _exe_alu_out_T_16 + ? _exe_alu_out_T_18 + : _exe_alu_out_T_19 + ? _exe_alu_out_T_22 + : _exe_alu_out_T_24 ? _GEN_0 : _exe_alu_out_T_29; + assign exe_br_flg = + exe_reg_exe_fun == 5'hB + ? exe_reg_op1_data == exe_reg_op2_data + : exe_reg_exe_fun == 5'hC & exe_reg_op1_data != exe_reg_op2_data; + assign exe_jmp_flg = exe_reg_wb_sel == 3'h3; + wire [31:0] mem_wb_data = + mem_reg_wb_sel == 3'h2 + ? io_dmem_rdata + : mem_reg_wb_sel == 3'h3 ? mem_reg_pc + 32'h4 : mem_reg_alu_out; + always @(posedge clock) begin + if (reset) begin + id_reg_pc <= 32'h0; + id_reg_inst <= 32'h0; + exe_reg_pc <= 32'h0; + exe_reg_wb_addr <= 5'h0; + exe_reg_op1_data <= 32'h0; + exe_reg_op2_data <= 32'h0; + exe_reg_rt_data <= 32'h0; + exe_reg_exe_fun <= 5'h0; + exe_reg_mem_wen <= 2'h0; + exe_reg_rf_wen <= 2'h0; + exe_reg_wb_sel <= 3'h0; + exe_reg_imm_i_sext <= 32'h0; + mem_reg_pc <= 32'h0; + mem_reg_wb_addr <= 5'h0; + mem_reg_rt_data <= 32'h0; + mem_reg_mem_wen <= 2'h0; + mem_reg_rf_wen <= 2'h0; + mem_reg_wb_sel <= 3'h0; + mem_reg_alu_out <= 32'h0; + wb_reg_wb_addr <= 5'h0; + wb_reg_rf_wen <= 2'h0; + wb_reg_wb_data <= 32'h0; + if_reg_pc <= 32'h0; + end + else begin + automatic logic _id_rt_data_T_5; + automatic logic _id_rt_data_T; + automatic logic _id_rt_data_T_3; + automatic logic _id_rt_data_T_6; + automatic logic _id_rt_data_T_9; + automatic logic [31:0] id_imm_i_sext; + automatic logic _csignals_T_1 = id_inst[31:26] == 6'h23; + automatic logic _csignals_T_3; + automatic logic [11:0] _GEN_1 = {id_inst[31:26], id_inst[5:0]}; + automatic logic _csignals_T_5 = _GEN_1 == 12'h20; + automatic logic _csignals_T_7 = id_inst[31:26] == 6'h8; + automatic logic _csignals_T_9; + automatic logic _csignals_T_11; + automatic logic _csignals_T_13; + automatic logic _csignals_T_15; + automatic logic _csignals_T_17; + automatic logic _csignals_T_19; + automatic logic _csignals_T_21; + automatic logic _csignals_T_23; + automatic logic _csignals_T_25; + automatic logic [16:0] _GEN_2 = {id_inst[31:21], id_inst[5:0]}; + automatic logic _csignals_T_27; + automatic logic _csignals_T_29; + automatic logic _csignals_T_31; + automatic logic _csignals_T_33; + automatic logic _csignals_T_35; + automatic logic _GEN_3; + automatic logic _GEN_4; + automatic logic [1:0] csignals_1; + automatic logic [2:0] csignals_2; + automatic logic _GEN_5; + automatic logic _GEN_6; + _id_rt_data_T_5 = mem_reg_rf_wen == 2'h1; + _id_rt_data_T = id_inst[20:16] == 5'h0; + _id_rt_data_T_3 = id_inst[20:16] == exe_reg_wb_addr & _id_rt_data_T_2; + _id_rt_data_T_6 = id_inst[20:16] == mem_reg_wb_addr & _id_rt_data_T_5; + _id_rt_data_T_9 = id_inst[20:16] == wb_reg_wb_addr & _id_rt_data_T_8; + id_imm_i_sext = {{16{id_inst[15]}}, id_inst[15:0]}; + _csignals_T_3 = id_inst[31:26] == 6'h2B; + _csignals_T_9 = _GEN_1 == 12'h22; + _csignals_T_11 = _GEN_1 == 12'h24; + _csignals_T_13 = _GEN_1 == 12'h25; + _csignals_T_15 = _GEN_1 == 12'h26; + _csignals_T_17 = id_inst[31:26] == 6'hC; + _csignals_T_19 = id_inst[31:26] == 6'hD; + _csignals_T_21 = _GEN_1 == 12'h2A; + _csignals_T_23 = id_inst[31:26] == 6'h4; + _csignals_T_25 = id_inst[31:26] == 6'h5; + _csignals_T_27 = _GEN_2 == 17'h0; + _csignals_T_29 = _GEN_2 == 17'h2; + _csignals_T_31 = _GEN_2 == 17'h3; + _csignals_T_33 = id_inst[31:26] == 6'h3; + _csignals_T_35 = _GEN_1 == 12'h8; + _GEN_3 = _csignals_T_27 | _csignals_T_29 | _csignals_T_31; + _GEN_4 = _csignals_T_21 | _csignals_T_23 | _csignals_T_25 | _GEN_3; + csignals_1 = + _csignals_T_1 | _csignals_T_3 | _csignals_T_5 | _csignals_T_7 | _csignals_T_9 + | _csignals_T_11 | _csignals_T_13 | _csignals_T_15 | _csignals_T_17 + | _csignals_T_19 | _GEN_4 | ~_csignals_T_33 + ? 2'h1 + : 2'h2; + csignals_2 = + _csignals_T_1 | _csignals_T_3 + ? 3'h2 + : _csignals_T_5 + ? 3'h1 + : _csignals_T_7 + ? 3'h2 + : _csignals_T_9 | _csignals_T_11 | _csignals_T_13 | _csignals_T_15 + ? 3'h1 + : _csignals_T_17 | _csignals_T_19 + ? 3'h2 + : _GEN_4 + ? 3'h1 + : _csignals_T_33 ? 3'h4 : {2'h0, ~_csignals_T_35}; + _GEN_5 = _csignals_T_23 | _csignals_T_25; + _GEN_6 = + _csignals_T_5 | _csignals_T_7 | _csignals_T_9 | _csignals_T_11 | _csignals_T_13 + | _csignals_T_15 | _csignals_T_17 | _csignals_T_19 | _csignals_T_21; + if (~stall_flg) + id_reg_pc <= if_reg_pc; + if (_id_inst_T) + id_reg_inst <= 32'h20000000; + else if (~stall_flg) + id_reg_inst <= io_imem_inst; + exe_reg_pc <= id_reg_pc; + if ((_csignals_T_1 + ? 3'h2 + : _csignals_T_3 + ? 3'h0 + : _GEN_6 + ? 3'h1 + : _GEN_5 + ? 3'h0 + : _GEN_3 ? 3'h1 : _csignals_T_33 ? 3'h3 : 3'h0) == 3'h1 + & id_inst[31:26] == 6'h0) + exe_reg_wb_addr <= id_inst[15:11]; + else if (id_inst[31:26] == 6'h3) + exe_reg_wb_addr <= 5'h1F; + else + exe_reg_wb_addr <= id_inst[20:16]; + if (csignals_1 == 2'h1) begin + if (id_inst[25:21] == 5'h0) + exe_reg_op1_data <= 32'h0; + else if (id_inst[25:21] == exe_reg_wb_addr & _id_rt_data_T_2) begin + if (_exe_alu_out_T) + exe_reg_op1_data <= _exe_alu_out_T_1; + else if (_exe_alu_out_T_3) + exe_reg_op1_data <= _exe_alu_out_T_4; + else if (_exe_alu_out_T_6) + exe_reg_op1_data <= _exe_alu_out_T_7; + else if (_exe_alu_out_T_8) + exe_reg_op1_data <= _exe_alu_out_T_9; + else if (_exe_alu_out_T_10) + exe_reg_op1_data <= _exe_alu_out_T_11; + else if (_exe_alu_out_T_12) + exe_reg_op1_data <= _exe_alu_out_T_14[31:0]; + else if (_exe_alu_out_T_16) + exe_reg_op1_data <= _exe_alu_out_T_18; + else if (_exe_alu_out_T_19) + exe_reg_op1_data <= _exe_alu_out_T_22; + else if (_exe_alu_out_T_24) + exe_reg_op1_data <= _GEN_0; + else if (~_exe_alu_out_T_28) exe_reg_op1_data <= 32'h0; - exe_reg_op2_data <= 32'h0; - exe_reg_rt_data <= 32'h0; - exe_reg_exe_fun <= 5'h0; - exe_reg_mem_wen <= 2'h0; - exe_reg_rf_wen <= 2'h0; - exe_reg_wb_sel <= 3'h0; - exe_reg_imm_i_sext <= 32'h0; - mem_reg_pc <= 32'h0; - mem_reg_wb_addr <= 5'h0; - mem_reg_rt_data <= 32'h0; - mem_reg_mem_wen <= 2'h0; - mem_reg_rf_wen <= 2'h0; - mem_reg_wb_sel <= 3'h0; - mem_reg_alu_out <= 32'h0; - wb_reg_wb_addr <= 5'h0; - wb_reg_rf_wen <= 2'h0; - wb_reg_wb_data <= 32'h0; - if_reg_pc <= 32'h0; end - else begin - automatic logic _id_rt_data_T_5; - automatic logic _id_rt_data_T; - automatic logic _id_rt_data_T_3; - automatic logic _id_rt_data_T_6; - automatic logic _id_rt_data_T_9; - automatic logic [31:0] id_imm_i_sext; - automatic logic _csignals_T_1 = id_inst[31:26] == 6'h23; - automatic logic _csignals_T_3; - automatic logic [11:0] _GEN_1 = {id_inst[31:26], id_inst[5:0]}; - automatic logic _csignals_T_5 = _GEN_1 == 12'h20; - automatic logic _csignals_T_7 = id_inst[31:26] == 6'h8; - automatic logic _csignals_T_9; - automatic logic _csignals_T_11; - automatic logic _csignals_T_13; - automatic logic _csignals_T_15; - automatic logic _csignals_T_17; - automatic logic _csignals_T_19; - automatic logic _csignals_T_21; - automatic logic _csignals_T_23; - automatic logic _csignals_T_25; - automatic logic [16:0] _GEN_2 = {id_inst[31:21], id_inst[5:0]}; - automatic logic _csignals_T_27; - automatic logic _csignals_T_29; - automatic logic _csignals_T_31; - automatic logic _csignals_T_33; - automatic logic _csignals_T_35; - automatic logic _GEN_3; - automatic logic _GEN_4; - automatic logic [1:0] csignals_1; - automatic logic [2:0] csignals_2; - automatic logic _GEN_5; - automatic logic _GEN_6; - _id_rt_data_T_5 = mem_reg_rf_wen == 2'h1; - _id_rt_data_T = id_inst[20:16] == 5'h0; - _id_rt_data_T_3 = id_inst[20:16] == exe_reg_wb_addr & _id_rt_data_T_2; - _id_rt_data_T_6 = id_inst[20:16] == mem_reg_wb_addr & _id_rt_data_T_5; - _id_rt_data_T_9 = id_inst[20:16] == wb_reg_wb_addr & _id_rt_data_T_8; - id_imm_i_sext = {{16{id_inst[15]}}, id_inst[15:0]}; - _csignals_T_3 = id_inst[31:26] == 6'h2B; - _csignals_T_9 = _GEN_1 == 12'h22; - _csignals_T_11 = _GEN_1 == 12'h24; - _csignals_T_13 = _GEN_1 == 12'h25; - _csignals_T_15 = _GEN_1 == 12'h26; - _csignals_T_17 = id_inst[31:26] == 6'hC; - _csignals_T_19 = id_inst[31:26] == 6'hD; - _csignals_T_21 = _GEN_1 == 12'h2A; - _csignals_T_23 = id_inst[31:26] == 6'h4; - _csignals_T_25 = id_inst[31:26] == 6'h5; - _csignals_T_27 = _GEN_2 == 17'h0; - _csignals_T_29 = _GEN_2 == 17'h2; - _csignals_T_31 = _GEN_2 == 17'h3; - _csignals_T_33 = id_inst[31:26] == 6'h3; - _csignals_T_35 = _GEN_1 == 12'h8; - _GEN_3 = _csignals_T_27 | _csignals_T_29 | _csignals_T_31; - _GEN_4 = _csignals_T_21 | _csignals_T_23 | _csignals_T_25 | _GEN_3; - csignals_1 = - _csignals_T_1 | _csignals_T_3 | _csignals_T_5 | _csignals_T_7 | _csignals_T_9 - | _csignals_T_11 | _csignals_T_13 | _csignals_T_15 | _csignals_T_17 - | _csignals_T_19 | _GEN_4 | ~_csignals_T_33 - ? 2'h1 - : 2'h2; - csignals_2 = - _csignals_T_1 | _csignals_T_3 - ? 3'h2 - : _csignals_T_5 - ? 3'h1 - : _csignals_T_7 - ? 3'h2 - : _csignals_T_9 | _csignals_T_11 | _csignals_T_13 | _csignals_T_15 - ? 3'h1 - : _csignals_T_17 | _csignals_T_19 - ? 3'h2 - : _GEN_4 - ? 3'h1 - : _csignals_T_33 ? 3'h4 : {2'h0, ~_csignals_T_35}; - _GEN_5 = _csignals_T_23 | _csignals_T_25; - _GEN_6 = - _csignals_T_5 | _csignals_T_7 | _csignals_T_9 | _csignals_T_11 | _csignals_T_13 - | _csignals_T_15 | _csignals_T_17 | _csignals_T_19 | _csignals_T_21; - if (~stall_flg) - id_reg_pc <= if_reg_pc; - if (_id_inst_T) - id_reg_inst <= 32'h20000000; - else if (~stall_flg) - id_reg_inst <= io_imem_inst; - exe_reg_pc <= id_reg_pc; - if ((_csignals_T_1 - ? 3'h2 - : _csignals_T_3 - ? 3'h0 - : _GEN_6 - ? 3'h1 - : _GEN_5 - ? 3'h0 - : _GEN_3 ? 3'h1 : _csignals_T_33 ? 3'h3 : 3'h0) == 3'h1 - & id_inst[31:26] == 6'h0) - exe_reg_wb_addr <= id_inst[15:11]; - else if (id_inst[31:26] == 6'h3) - exe_reg_wb_addr <= 5'h1F; - else - exe_reg_wb_addr <= id_inst[20:16]; - if (csignals_1 == 2'h1) begin - if (id_inst[25:21] == 5'h0) - exe_reg_op1_data <= 32'h0; - else if (id_inst[25:21] == exe_reg_wb_addr & _id_rt_data_T_2) begin - if (_exe_alu_out_T) - exe_reg_op1_data <= _exe_alu_out_T_1; - else if (_exe_alu_out_T_3) - exe_reg_op1_data <= _exe_alu_out_T_4; - else if (_exe_alu_out_T_6) - exe_reg_op1_data <= _exe_alu_out_T_7; - else if (_exe_alu_out_T_8) - exe_reg_op1_data <= _exe_alu_out_T_9; - else if (_exe_alu_out_T_10) - exe_reg_op1_data <= _exe_alu_out_T_11; - else if (_exe_alu_out_T_12) - exe_reg_op1_data <= _exe_alu_out_T_14[31:0]; - else if (_exe_alu_out_T_16) - exe_reg_op1_data <= _exe_alu_out_T_18; - else if (_exe_alu_out_T_19) - exe_reg_op1_data <= _exe_alu_out_T_22; - else if (_exe_alu_out_T_24) - exe_reg_op1_data <= _GEN_0; - else if (~_exe_alu_out_T_28) - exe_reg_op1_data <= 32'h0; - end - else if (id_inst[25:21] == mem_reg_wb_addr & _id_rt_data_T_5) - exe_reg_op1_data <= mem_wb_data; - else if (id_inst[25:21] == wb_reg_wb_addr & _id_rt_data_T_8) - exe_reg_op1_data <= wb_reg_wb_data; - else - exe_reg_op1_data <= _regfile_ext_R1_data; - end - else if (csignals_1 == 2'h2) - exe_reg_op1_data <= id_reg_pc; - else - exe_reg_op1_data <= 32'h0; - if (csignals_2 == 3'h1) begin - if (_id_rt_data_T) - exe_reg_op2_data <= 32'h0; - else if (_id_rt_data_T_3) begin - if (_exe_alu_out_T) - exe_reg_op2_data <= _exe_alu_out_T_1; - else if (_exe_alu_out_T_3) - exe_reg_op2_data <= _exe_alu_out_T_4; - else if (_exe_alu_out_T_6) - exe_reg_op2_data <= _exe_alu_out_T_7; - else if (_exe_alu_out_T_8) - exe_reg_op2_data <= _exe_alu_out_T_9; - else if (_exe_alu_out_T_10) - exe_reg_op2_data <= _exe_alu_out_T_11; - else if (_exe_alu_out_T_12) - exe_reg_op2_data <= _exe_alu_out_T_14[31:0]; - else if (_exe_alu_out_T_16) - exe_reg_op2_data <= _exe_alu_out_T_18; - else if (_exe_alu_out_T_19) - exe_reg_op2_data <= _exe_alu_out_T_22; - else if (_exe_alu_out_T_24) - exe_reg_op2_data <= _GEN_0; - else - exe_reg_op2_data <= _exe_alu_out_T_29; - end - else if (_id_rt_data_T_6) - exe_reg_op2_data <= mem_wb_data; - else if (_id_rt_data_T_9) - exe_reg_op2_data <= wb_reg_wb_data; - else - exe_reg_op2_data <= _regfile_ext_R0_data; - end - else if (csignals_2 == 3'h2) - exe_reg_op2_data <= id_imm_i_sext; - else if (csignals_2 == 3'h4) - exe_reg_op2_data <= {4'h0, id_inst[25:0], 2'h0}; - else - exe_reg_op2_data <= 32'h0; - exe_reg_rt_data <= - _id_rt_data_T - ? 32'h0 - : _id_rt_data_T_3 - ? exe_alu_out - : _id_rt_data_T_6 - ? mem_wb_data - : _id_rt_data_T_9 ? wb_reg_wb_data : _regfile_ext_R0_data; - if (_csignals_T_1 | _csignals_T_3 | _csignals_T_5 | _csignals_T_7) - exe_reg_exe_fun <= 5'h1; - else if (_csignals_T_9) - exe_reg_exe_fun <= 5'h2; - else if (_csignals_T_11) - exe_reg_exe_fun <= 5'h3; - else if (_csignals_T_13) - exe_reg_exe_fun <= 5'h4; - else if (_csignals_T_15) - exe_reg_exe_fun <= 5'h5; - else if (_csignals_T_17) - exe_reg_exe_fun <= 5'h3; - else if (_csignals_T_19) - exe_reg_exe_fun <= 5'h4; - else if (_csignals_T_21) - exe_reg_exe_fun <= 5'h9; - else if (_csignals_T_23) - exe_reg_exe_fun <= 5'hB; - else if (_csignals_T_25) - exe_reg_exe_fun <= 5'hC; - else if (_csignals_T_27) - exe_reg_exe_fun <= 5'h6; - else if (_csignals_T_29) - exe_reg_exe_fun <= 5'h7; - else if (_csignals_T_31) - exe_reg_exe_fun <= 5'h8; - else if (_csignals_T_33) - exe_reg_exe_fun <= 5'h1; - else if (_csignals_T_35) - exe_reg_exe_fun <= 5'hD; - else - exe_reg_exe_fun <= 5'h0; - exe_reg_mem_wen <= _csignals_T_1 ? 2'h0 : {1'h0, _csignals_T_3}; - if (_csignals_T_1) begin - exe_reg_rf_wen <= 2'h1; - exe_reg_wb_sel <= 3'h2; - end - else if (_csignals_T_3) begin - exe_reg_rf_wen <= 2'h0; - exe_reg_wb_sel <= 3'h0; - end - else if (_GEN_6) begin - exe_reg_rf_wen <= 2'h1; - exe_reg_wb_sel <= 3'h1; - end - else if (_GEN_5) begin - exe_reg_rf_wen <= 2'h0; - exe_reg_wb_sel <= 3'h0; - end - else begin - exe_reg_rf_wen <= - {1'h0, _csignals_T_27 | _csignals_T_29 | _csignals_T_31 | _csignals_T_33}; - if (_GEN_3) - exe_reg_wb_sel <= 3'h1; - else if (_csignals_T_33) - exe_reg_wb_sel <= 3'h3; - else - exe_reg_wb_sel <= 3'h0; - end - exe_reg_imm_i_sext <= id_imm_i_sext; - mem_reg_pc <= exe_reg_pc; - mem_reg_wb_addr <= exe_reg_wb_addr; - mem_reg_rt_data <= exe_reg_rt_data; - mem_reg_mem_wen <= exe_reg_mem_wen; - mem_reg_rf_wen <= exe_reg_rf_wen; - mem_reg_wb_sel <= exe_reg_wb_sel; - mem_reg_alu_out <= exe_alu_out; - wb_reg_wb_addr <= mem_reg_wb_addr; - wb_reg_rf_wen <= mem_reg_rf_wen; - wb_reg_wb_data <= mem_wb_data; - if (exe_br_flg) - if_reg_pc <= {exe_reg_imm_i_sext[29:0], 2'h0} + exe_reg_pc; - else if (exe_jmp_flg) - if_reg_pc <= exe_alu_out; - else if (~stall_flg) - if_reg_pc <= if_reg_pc + 32'h4; + else if (id_inst[25:21] == mem_reg_wb_addr & _id_rt_data_T_5) + exe_reg_op1_data <= mem_wb_data; + else if (id_inst[25:21] == wb_reg_wb_addr & _id_rt_data_T_8) + exe_reg_op1_data <= wb_reg_wb_data; + else + exe_reg_op1_data <= _regfile_ext_R1_data; + end + else if (csignals_1 == 2'h2) + exe_reg_op1_data <= id_reg_pc; + else + exe_reg_op1_data <= 32'h0; + if (csignals_2 == 3'h1) begin + if (_id_rt_data_T) + exe_reg_op2_data <= 32'h0; + else if (_id_rt_data_T_3) begin + if (_exe_alu_out_T) + exe_reg_op2_data <= _exe_alu_out_T_1; + else if (_exe_alu_out_T_3) + exe_reg_op2_data <= _exe_alu_out_T_4; + else if (_exe_alu_out_T_6) + exe_reg_op2_data <= _exe_alu_out_T_7; + else if (_exe_alu_out_T_8) + exe_reg_op2_data <= _exe_alu_out_T_9; + else if (_exe_alu_out_T_10) + exe_reg_op2_data <= _exe_alu_out_T_11; + else if (_exe_alu_out_T_12) + exe_reg_op2_data <= _exe_alu_out_T_14[31:0]; + else if (_exe_alu_out_T_16) + exe_reg_op2_data <= _exe_alu_out_T_18; + else if (_exe_alu_out_T_19) + exe_reg_op2_data <= _exe_alu_out_T_22; + else if (_exe_alu_out_T_24) + exe_reg_op2_data <= _GEN_0; + else + exe_reg_op2_data <= _exe_alu_out_T_29; end - end // always @(posedge) - regfile_32x32 regfile_ext ( - .R0_addr (id_inst[20:16]), - .R0_en (1'h1), - .R0_clk (clock), - .R0_data (_regfile_ext_R0_data), - .R1_addr (id_inst[25:21]), - .R1_en (1'h1), - .R1_clk (clock), - .R1_data (_regfile_ext_R1_data), - .W0_addr (wb_reg_wb_addr), - .W0_en (_id_rt_data_T_8 & (|wb_reg_wb_addr)), - .W0_clk (clock), - .io_anodes (io_anodes), - .io_segments (io_segments), - .W0_data (wb_reg_wb_data) - ); - assign io_imem_addr = if_reg_pc; - assign io_dmem_addr = mem_reg_alu_out; - assign io_dmem_wen = mem_reg_mem_wen[0]; - assign io_dmem_wdata = mem_reg_rt_data; - assign io_exit = id_reg_inst == 32'h114514; -endmodule + else if (_id_rt_data_T_6) + exe_reg_op2_data <= mem_wb_data; + else if (_id_rt_data_T_9) + exe_reg_op2_data <= wb_reg_wb_data; + else + exe_reg_op2_data <= _regfile_ext_R0_data; + end + else if (csignals_2 == 3'h2) + exe_reg_op2_data <= id_imm_i_sext; + else if (csignals_2 == 3'h4) + exe_reg_op2_data <= {4'h0, id_inst[25:0], 2'h0}; + else + exe_reg_op2_data <= 32'h0; + exe_reg_rt_data <= + _id_rt_data_T + ? 32'h0 + : _id_rt_data_T_3 + ? exe_alu_out + : _id_rt_data_T_6 + ? mem_wb_data + : _id_rt_data_T_9 ? wb_reg_wb_data : _regfile_ext_R0_data; + if (_csignals_T_1 | _csignals_T_3 | _csignals_T_5 | _csignals_T_7) + exe_reg_exe_fun <= 5'h1; + else if (_csignals_T_9) + exe_reg_exe_fun <= 5'h2; + else if (_csignals_T_11) + exe_reg_exe_fun <= 5'h3; + else if (_csignals_T_13) + exe_reg_exe_fun <= 5'h4; + else if (_csignals_T_15) + exe_reg_exe_fun <= 5'h5; + else if (_csignals_T_17) + exe_reg_exe_fun <= 5'h3; + else if (_csignals_T_19) + exe_reg_exe_fun <= 5'h4; + else if (_csignals_T_21) + exe_reg_exe_fun <= 5'h9; + else if (_csignals_T_23) + exe_reg_exe_fun <= 5'hB; + else if (_csignals_T_25) + exe_reg_exe_fun <= 5'hC; + else if (_csignals_T_27) + exe_reg_exe_fun <= 5'h6; + else if (_csignals_T_29) + exe_reg_exe_fun <= 5'h7; + else if (_csignals_T_31) + exe_reg_exe_fun <= 5'h8; + else if (_csignals_T_33) + exe_reg_exe_fun <= 5'h1; + else if (_csignals_T_35) + exe_reg_exe_fun <= 5'hD; + else + exe_reg_exe_fun <= 5'h0; + exe_reg_mem_wen <= _csignals_T_1 ? 2'h0 : {1'h0, _csignals_T_3}; + if (_csignals_T_1) begin + exe_reg_rf_wen <= 2'h1; + exe_reg_wb_sel <= 3'h2; + end + else if (_csignals_T_3) begin + exe_reg_rf_wen <= 2'h0; + exe_reg_wb_sel <= 3'h0; + end + else if (_GEN_6) begin + exe_reg_rf_wen <= 2'h1; + exe_reg_wb_sel <= 3'h1; + end + else if (_GEN_5) begin + exe_reg_rf_wen <= 2'h0; + exe_reg_wb_sel <= 3'h0; + end + else begin + exe_reg_rf_wen <= + {1'h0, _csignals_T_27 | _csignals_T_29 | _csignals_T_31 | _csignals_T_33}; + if (_GEN_3) + exe_reg_wb_sel <= 3'h1; + else if (_csignals_T_33) + exe_reg_wb_sel <= 3'h3; + else + exe_reg_wb_sel <= 3'h0; + end + exe_reg_imm_i_sext <= id_imm_i_sext; + mem_reg_pc <= exe_reg_pc; + mem_reg_wb_addr <= exe_reg_wb_addr; + mem_reg_rt_data <= exe_reg_rt_data; + mem_reg_mem_wen <= exe_reg_mem_wen; + mem_reg_rf_wen <= exe_reg_rf_wen; + mem_reg_wb_sel <= exe_reg_wb_sel; + mem_reg_alu_out <= exe_alu_out; + wb_reg_wb_addr <= mem_reg_wb_addr; + wb_reg_rf_wen <= mem_reg_rf_wen; + wb_reg_wb_data <= mem_wb_data; + if (exe_br_flg) + if_reg_pc <= {exe_reg_imm_i_sext[29:0], 2'h0} + exe_reg_pc; + else if (exe_jmp_flg) + if_reg_pc <= exe_alu_out; + else if (~stall_flg) + if_reg_pc <= if_reg_pc + 32'h4; + end + end // always @(posedge) + regfile_32x32 regfile_ext ( + .R0_addr (id_inst[20:16]), + .R0_en (1'h1), + .R0_clk (clock), + .R0_data (_regfile_ext_R0_data), + .R1_addr (id_inst[25:21]), + .R1_en (1'h1), + .R1_clk (clock), + .R1_data (_regfile_ext_R1_data), + .W0_addr (wb_reg_wb_addr), + .W0_en (_id_rt_data_T_8 & (|wb_reg_wb_addr)), + .W0_clk (clock), + .io_anodes (io_anodes), + .io_segments (io_segments), + .W0_data (wb_reg_wb_data) + ); + assign io_imem_addr = if_reg_pc; + assign io_dmem_addr = mem_reg_alu_out; + assign io_dmem_wen = mem_reg_mem_wen[0]; + assign io_dmem_wdata = mem_reg_rt_data; + assign io_exit = id_reg_inst == 32'h114514; +endmodule \ No newline at end of file diff --git a/Memory.sv b/Memory.sv index 32e9c87..1bbd0ab 100755 --- a/Memory.sv +++ b/Memory.sv @@ -18,156 +18,43 @@ // Additional Comments: // ////////////////////////////////////////////////////////////////////////////////// -module mem_4096x8( - input [11:0] R0_addr, - input R0_en, - R0_clk, - output [7:0] R0_data, - input [11:0] R1_addr, - input R1_en, - R1_clk, - output [7:0] R1_data, - input [11:0] R2_addr, - input R2_en, - R2_clk, - output [7:0] R2_data, - input [11:0] R3_addr, - input R3_en, - R3_clk, - output [7:0] R3_data, - input [11:0] R4_addr, - input R4_en, - R4_clk, - output [7:0] R4_data, - input [11:0] R5_addr, - input R5_en, - R5_clk, - output [7:0] R5_data, - input [11:0] R6_addr, - input R6_en, - R6_clk, - output [7:0] R6_data, - input [11:0] R7_addr, - input R7_en, - R7_clk, - output [7:0] R7_data, - input [11:0] W0_addr, - input W0_en, - W0_clk, - input [7:0] W0_data, - input [11:0] W1_addr, - input W1_en, - W1_clk, - input [7:0] W1_data, - input [11:0] W2_addr, - input W2_en, - W2_clk, - input [7:0] W2_data, - input [11:0] W3_addr, - input W3_en, - W3_clk, - input [7:0] W3_data - ); - - reg [7:0] Memory[0:4095]; - always @(posedge W0_clk) begin - if (W0_en & 1'h1) - Memory[W0_addr] <= W0_data; - if (W1_en & 1'h1) - Memory[W1_addr] <= W1_data; - if (W2_en & 1'h1) - Memory[W2_addr] <= W2_data; - if (W3_en & 1'h1) - Memory[W3_addr] <= W3_data; - end // always @(posedge) -`ifdef ENABLE_INITIAL_MEM_ - initial - $readmemh("src/hex/mem.hex", Memory); -`endif // ENABLE_INITIAL_MEM_ - - assign R0_data = R0_en ? Memory[R0_addr] : 8'bx; - assign R1_data = R1_en ? Memory[R1_addr] : 8'bx; - assign R2_data = R2_en ? Memory[R2_addr] : 8'bx; - assign R3_data = R3_en ? Memory[R3_addr] : 8'bx; - assign R4_data = R4_en ? Memory[R4_addr] : 8'bx; - assign R5_data = R5_en ? Memory[R5_addr] : 8'bx; - assign R6_data = R6_en ? Memory[R6_addr] : 8'bx; - assign R7_data = R7_en ? Memory[R7_addr] : 8'bx; -endmodule +// VCS coverage exclude_file module Memory( - input clock, - input [31:0] io_imem_addr, - output [31:0] io_imem_inst, - input [31:0] io_dmem_addr, - output [31:0] io_dmem_rdata, - input io_dmem_wen, - input [31:0] io_dmem_wdata - ); + input clock, + input [31:0] io_imem_addr, + output [31:0] io_imem_inst, + input [31:0] io_dmem_addr, + output [31:0] io_dmem_rdata, + input io_dmem_wen, + input [31:0] io_dmem_wdata +); - wire [7:0] _mem_ext_R0_data; - wire [7:0] _mem_ext_R1_data; - wire [7:0] _mem_ext_R2_data; - wire [7:0] _mem_ext_R3_data; - wire [7:0] _mem_ext_R4_data; - wire [7:0] _mem_ext_R5_data; - wire [7:0] _mem_ext_R6_data; - wire [7:0] _mem_ext_R7_data; - wire [11:0] _io_dmem_rdata_T = io_dmem_addr[11:0] + 12'h3; - wire [11:0] _io_dmem_rdata_T_3 = io_dmem_addr[11:0] + 12'h2; - wire [11:0] _io_dmem_rdata_T_6 = io_dmem_addr[11:0] + 12'h1; - mem_4096x8 mem_ext ( - .R0_addr (io_imem_addr[11:0]), - .R0_en (1'h1), - .R0_clk (clock), - .R0_data (_mem_ext_R0_data), - .R1_addr (io_imem_addr[11:0] + 12'h1), - .R1_en (1'h1), - .R1_clk (clock), - .R1_data (_mem_ext_R1_data), - .R2_addr (io_imem_addr[11:0] + 12'h2), - .R2_en (1'h1), - .R2_clk (clock), - .R2_data (_mem_ext_R2_data), - .R3_addr (io_imem_addr[11:0] + 12'h3), - .R3_en (1'h1), - .R3_clk (clock), - .R3_data (_mem_ext_R3_data), - .R4_addr (io_dmem_addr[11:0]), - .R4_en (1'h1), - .R4_clk (clock), - .R4_data (_mem_ext_R4_data), - .R5_addr (_io_dmem_rdata_T_6), - .R5_en (1'h1), - .R5_clk (clock), - .R5_data (_mem_ext_R5_data), - .R6_addr (_io_dmem_rdata_T_3), - .R6_en (1'h1), - .R6_clk (clock), - .R6_data (_mem_ext_R6_data), - .R7_addr (_io_dmem_rdata_T), - .R7_en (1'h1), - .R7_clk (clock), - .R7_data (_mem_ext_R7_data), - .W0_addr (_io_dmem_rdata_T), - .W0_en (io_dmem_wen), - .W0_clk (clock), - .W0_data (io_dmem_wdata[31:24]), - .W1_addr (_io_dmem_rdata_T_3), - .W1_en (io_dmem_wen), - .W1_clk (clock), - .W1_data (io_dmem_wdata[23:16]), - .W2_addr (_io_dmem_rdata_T_6), - .W2_en (io_dmem_wen), - .W2_clk (clock), - .W2_data (io_dmem_wdata[15:8]), - .W3_addr (io_dmem_addr[11:0]), - .W3_en (io_dmem_wen), - .W3_clk (clock), - .W3_data (io_dmem_wdata[7:0]) - ); - assign io_imem_inst = - {_mem_ext_R3_data, _mem_ext_R2_data, _mem_ext_R1_data, _mem_ext_R0_data}; - assign io_dmem_rdata = - {_mem_ext_R7_data, _mem_ext_R6_data, _mem_ext_R5_data, _mem_ext_R4_data}; -endmodule + + reg [31:0] mem [0:63]; + + + initial begin + mem[0] = 32'h20080001; // addi $t0, $zero, 1 + mem[1] = 32'h20100000; // addi $s0, $zero, 0 + mem[2] = 32'h20120065; // addi $s2, $zero, 101 + mem[3] = 32'h02088020; // add $s0, $s0, $t0 + mem[4] = 32'h21080001; // addi $t0, $t0, 1 + mem[5] = 32'h0112502a; // slt $t2, $t0, $s2 + mem[6] = 32'h1540fffc; // bne $t2, $zero, -4 + mem[7] = 32'h00000000; // nop + mem[8] = 32'h00114514; // exit + end + + + assign io_imem_inst = mem[io_imem_addr[7:2]]; + + assign io_dmem_rdata = mem[io_dmem_addr[7:2]]; + + + always @(posedge clock) begin + if (io_dmem_wen) begin + mem[io_dmem_addr[7:2]] <= io_dmem_wdata; + end + end +endmodule \ No newline at end of file diff --git a/Regfile.sv b/Regfile.sv index f9781d6..2b20b1a 100755 --- a/Regfile.sv +++ b/Regfile.sv @@ -18,32 +18,33 @@ // Additional Comments: // ////////////////////////////////////////////////////////////////////////////////// -module regfile_32x32( - input [4:0] R0_addr, - input R0_en, - R0_clk, - output [31:0] R0_data, - input [4:0] R1_addr, - input R1_en, - R1_clk, - output [31:0] R1_data, - input [4:0] W0_addr, - input W0_en, - W0_clk, - output [3:0] io_anodes, - output [6:0] io_segments, - input [31:0] W0_data - ); - reg [31:0] Memory[0:31]; - always @(posedge W0_clk) begin - if (W0_en & 1'h1) - Memory[W0_addr] <= W0_data; - end // always @(posedge) - assign R0_data = R0_en ? Memory[R0_addr] : 32'bx; - assign R1_data = R1_en ? Memory[R1_addr] : 32'bx; - wire [31:0] reg16_value = Memory[16]; - DynamicDisplay display ( +module regfile_32x32( + input [4:0] R0_addr, + input R0_en, + R0_clk, + output [31:0] R0_data, + input [4:0] R1_addr, + input R1_en, + R1_clk, + output [31:0] R1_data, + input [4:0] W0_addr, + input W0_en, + W0_clk, + output [3:0] io_anodes, + output [6:0] io_segments, + input [31:0] W0_data +); + + reg [31:0] Memory[0:31]; + always @(posedge W0_clk) begin + if (W0_en & 1'h1) + Memory[W0_addr] <= W0_data; + end // always @(posedge) + assign R0_data = R0_en ? Memory[R0_addr] : 32'bx; + assign R1_data = R1_en ? Memory[R1_addr] : 32'bx; + wire [31:0] reg16_value = Memory[16]; + DynamicDisplay display ( .clock (W0_clk), .reset (1'b0), .reg_result (reg16_value), @@ -51,4 +52,3 @@ module regfile_32x32( .io_segments (io_segments) ); endmodule - diff --git a/Top.sv b/Top.sv index fdd56e8..2e3690c 100755 --- a/Top.sv +++ b/Top.sv @@ -20,39 +20,39 @@ ////////////////////////////////////////////////////////////////////////////////// module Top( - input clock, - reset, - output io_exit, - output [3:0] io_anodes, - output [6:0] io_segments - ); + input clock, + reset, + output [3:0] io_anodes, + output [6:0] io_segments, + output io_exit +); - wire [31:0] _memory_io_imem_inst; - wire [31:0] _memory_io_dmem_rdata; - wire [31:0] _core_io_imem_addr; - wire [31:0] _core_io_dmem_addr; - wire _core_io_dmem_wen; - wire [31:0] _core_io_dmem_wdata; - Core core ( - .clock (clock), - .reset (reset), - .io_imem_addr (_core_io_imem_addr), - .io_imem_inst (_memory_io_imem_inst), - .io_dmem_addr (_core_io_dmem_addr), - .io_dmem_rdata (_memory_io_dmem_rdata), - .io_dmem_wen (_core_io_dmem_wen), - .io_dmem_wdata (_core_io_dmem_wdata), - .io_anodes (io_anodes), - .io_segments (io_segments), - .io_exit (io_exit) - ); - Memory memory ( - .clock (clock), - .io_imem_addr (_core_io_imem_addr), - .io_imem_inst (_memory_io_imem_inst), - .io_dmem_addr (_core_io_dmem_addr), - .io_dmem_rdata (_memory_io_dmem_rdata), - .io_dmem_wen (_core_io_dmem_wen), - .io_dmem_wdata (_core_io_dmem_wdata) - ); -endmodule + wire [31:0] _memory_io_imem_inst; + wire [31:0] _memory_io_dmem_rdata; + wire [31:0] _core_io_imem_addr; + wire [31:0] _core_io_dmem_addr; + wire _core_io_dmem_wen; + wire [31:0] _core_io_dmem_wdata; + Core core ( + .clock (clock), + .reset (reset), + .io_imem_addr (_core_io_imem_addr), + .io_imem_inst (_memory_io_imem_inst), + .io_dmem_addr (_core_io_dmem_addr), + .io_dmem_rdata (_memory_io_dmem_rdata), + .io_dmem_wen (_core_io_dmem_wen), + .io_dmem_wdata (_core_io_dmem_wdata), + .io_anodes (io_anodes), + .io_segments (io_segments), + .io_exit (io_exit) + ); + Memory memory ( + .clock (clock), + .io_imem_addr (_core_io_imem_addr), + .io_imem_inst (_memory_io_imem_inst), + .io_dmem_addr (_core_io_dmem_addr), + .io_dmem_rdata (_memory_io_dmem_rdata), + .io_dmem_wen (_core_io_dmem_wen), + .io_dmem_wdata (_core_io_dmem_wdata) + ); +endmodule \ No newline at end of file diff --git a/TopOrigin.sv b/TopOrigin.sv index fd6fcc3..7bdd778 100755 --- a/TopOrigin.sv +++ b/TopOrigin.sv @@ -428,80 +428,32 @@ module Core( endmodule // VCS coverage exclude_file -module mem_4096x8( - input [11:0] R0_addr, +module mem_64x32( + input [5:0] R0_addr, input R0_en, R0_clk, - output [7:0] R0_data, - input [11:0] R1_addr, + output [31:0] R0_data, + input [5:0] R1_addr, input R1_en, R1_clk, - output [7:0] R1_data, - input [11:0] R2_addr, - input R2_en, - R2_clk, - output [7:0] R2_data, - input [11:0] R3_addr, - input R3_en, - R3_clk, - output [7:0] R3_data, - input [11:0] R4_addr, - input R4_en, - R4_clk, - output [7:0] R4_data, - input [11:0] R5_addr, - input R5_en, - R5_clk, - output [7:0] R5_data, - input [11:0] R6_addr, - input R6_en, - R6_clk, - output [7:0] R6_data, - input [11:0] R7_addr, - input R7_en, - R7_clk, - output [7:0] R7_data, - input [11:0] W0_addr, + output [31:0] R1_data, + input [5:0] W0_addr, input W0_en, W0_clk, - input [7:0] W0_data, - input [11:0] W1_addr, - input W1_en, - W1_clk, - input [7:0] W1_data, - input [11:0] W2_addr, - input W2_en, - W2_clk, - input [7:0] W2_data, - input [11:0] W3_addr, - input W3_en, - W3_clk, - input [7:0] W3_data + input [31:0] W0_data ); - reg [7:0] Memory[0:4095]; + reg [31:0] Memory[0:63]; always @(posedge W0_clk) begin if (W0_en & 1'h1) Memory[W0_addr] <= W0_data; - if (W1_en & 1'h1) - Memory[W1_addr] <= W1_data; - if (W2_en & 1'h1) - Memory[W2_addr] <= W2_data; - if (W3_en & 1'h1) - Memory[W3_addr] <= W3_data; end // always @(posedge) `ifdef ENABLE_INITIAL_MEM_ initial - $readmemh("src/hex/mem.hex", Memory); + $readmemh("src/hex/mem.dat", Memory); `endif // ENABLE_INITIAL_MEM_ - assign R0_data = R0_en ? Memory[R0_addr] : 8'bx; - assign R1_data = R1_en ? Memory[R1_addr] : 8'bx; - assign R2_data = R2_en ? Memory[R2_addr] : 8'bx; - assign R3_data = R3_en ? Memory[R3_addr] : 8'bx; - assign R4_data = R4_en ? Memory[R4_addr] : 8'bx; - assign R5_data = R5_en ? Memory[R5_addr] : 8'bx; - assign R6_data = R6_en ? Memory[R6_addr] : 8'bx; - assign R7_data = R7_en ? Memory[R7_addr] : 8'bx; + assign R0_data = R0_en ? Memory[R0_addr] : 32'bx; + assign R1_data = R1_en ? Memory[R1_addr] : 32'bx; endmodule module Memory( @@ -514,71 +466,20 @@ module Memory( input [31:0] io_dmem_wdata ); - wire [7:0] _mem_ext_R0_data; - wire [7:0] _mem_ext_R1_data; - wire [7:0] _mem_ext_R2_data; - wire [7:0] _mem_ext_R3_data; - wire [7:0] _mem_ext_R4_data; - wire [7:0] _mem_ext_R5_data; - wire [7:0] _mem_ext_R6_data; - wire [7:0] _mem_ext_R7_data; - wire [11:0] _io_dmem_rdata_T = io_dmem_addr[11:0] + 12'h3; - wire [11:0] _io_dmem_rdata_T_3 = io_dmem_addr[11:0] + 12'h2; - wire [11:0] _io_dmem_rdata_T_6 = io_dmem_addr[11:0] + 12'h1; - mem_4096x8 mem_ext ( - .R0_addr (io_imem_addr[11:0]), + mem_64x32 mem_ext ( + .R0_addr (io_imem_addr[7:2]), .R0_en (1'h1), .R0_clk (clock), - .R0_data (_mem_ext_R0_data), - .R1_addr (io_imem_addr[11:0] + 12'h1), + .R0_data (io_imem_inst), + .R1_addr (io_dmem_addr[7:2]), .R1_en (1'h1), .R1_clk (clock), - .R1_data (_mem_ext_R1_data), - .R2_addr (io_imem_addr[11:0] + 12'h2), - .R2_en (1'h1), - .R2_clk (clock), - .R2_data (_mem_ext_R2_data), - .R3_addr (io_imem_addr[11:0] + 12'h3), - .R3_en (1'h1), - .R3_clk (clock), - .R3_data (_mem_ext_R3_data), - .R4_addr (io_dmem_addr[11:0]), - .R4_en (1'h1), - .R4_clk (clock), - .R4_data (_mem_ext_R4_data), - .R5_addr (_io_dmem_rdata_T_6), - .R5_en (1'h1), - .R5_clk (clock), - .R5_data (_mem_ext_R5_data), - .R6_addr (_io_dmem_rdata_T_3), - .R6_en (1'h1), - .R6_clk (clock), - .R6_data (_mem_ext_R6_data), - .R7_addr (_io_dmem_rdata_T), - .R7_en (1'h1), - .R7_clk (clock), - .R7_data (_mem_ext_R7_data), - .W0_addr (_io_dmem_rdata_T), + .R1_data (io_dmem_rdata), + .W0_addr (io_dmem_addr[7:2]), .W0_en (io_dmem_wen), .W0_clk (clock), - .W0_data (io_dmem_wdata[31:24]), - .W1_addr (_io_dmem_rdata_T_3), - .W1_en (io_dmem_wen), - .W1_clk (clock), - .W1_data (io_dmem_wdata[23:16]), - .W2_addr (_io_dmem_rdata_T_6), - .W2_en (io_dmem_wen), - .W2_clk (clock), - .W2_data (io_dmem_wdata[15:8]), - .W3_addr (io_dmem_addr[11:0]), - .W3_en (io_dmem_wen), - .W3_clk (clock), - .W3_data (io_dmem_wdata[7:0]) + .W0_data (io_dmem_wdata) ); - assign io_imem_inst = - {_mem_ext_R3_data, _mem_ext_R2_data, _mem_ext_R1_data, _mem_ext_R0_data}; - assign io_dmem_rdata = - {_mem_ext_R7_data, _mem_ext_R6_data, _mem_ext_R5_data, _mem_ext_R4_data}; endmodule module TopOrigin( diff --git a/project/project/metals.sbt b/project/project/metals.sbt deleted file mode 100755 index e069ffa..0000000 --- a/project/project/metals.sbt +++ /dev/null @@ -1,8 +0,0 @@ -// format: off -// DO NOT EDIT! This file is auto-generated. - -// This file enables sbt-bloop to create bloop config files. - -addSbtPlugin("ch.epfl.scala" % "sbt-bloop" % "2.0.6") - -// format: on diff --git a/project/project/project/metals.sbt b/project/project/project/metals.sbt deleted file mode 100755 index e069ffa..0000000 --- a/project/project/project/metals.sbt +++ /dev/null @@ -1,8 +0,0 @@ -// format: off -// DO NOT EDIT! This file is auto-generated. - -// This file enables sbt-bloop to create bloop config files. - -addSbtPlugin("ch.epfl.scala" % "sbt-bloop" % "2.0.6") - -// format: on diff --git a/project/project/project/project/target/config-classes/$57f93b93490ea1894b63.cache b/project/project/project/project/target/config-classes/$57f93b93490ea1894b63.cache deleted file mode 100755 index 050f36c..0000000 --- a/project/project/project/project/target/config-classes/$57f93b93490ea1894b63.cache +++ /dev/null @@ -1 +0,0 @@ -sbt.internal.DslEntry \ No newline at end of file diff --git a/project/project/project/target/config-classes/$534d41cbf8671b3d9a73.cache b/project/project/project/target/config-classes/$534d41cbf8671b3d9a73.cache deleted file mode 100755 index 050f36c..0000000 --- a/project/project/project/target/config-classes/$534d41cbf8671b3d9a73.cache +++ /dev/null @@ -1 +0,0 @@ -sbt.internal.DslEntry \ No newline at end of file diff --git a/project/project/project/target/scala-2.12/sbt-1.0/sync/copy-resource b/project/project/project/target/scala-2.12/sbt-1.0/sync/copy-resource deleted file mode 100755 index 9d348e7..0000000 --- a/project/project/project/target/scala-2.12/sbt-1.0/sync/copy-resource +++ /dev/null @@ -1 +0,0 @@ -[[{},{}],{}] \ No newline at end of file diff --git a/project/project/project/target/scala-2.12/sbt-1.0/update/update_cache_2.12/inputs b/project/project/project/target/scala-2.12/sbt-1.0/update/update_cache_2.12/inputs deleted file mode 100755 index 6ed8b2a..0000000 --- a/project/project/project/target/scala-2.12/sbt-1.0/update/update_cache_2.12/inputs +++ /dev/null @@ -1 +0,0 @@ --1633561639 \ No newline at end of file diff --git a/project/project/project/target/scala-2.12/sbt-1.0/update/update_cache_2.12/output b/project/project/project/target/scala-2.12/sbt-1.0/update/update_cache_2.12/output deleted file mode 100755 index f3e910b..0000000 --- a/project/project/project/target/scala-2.12/sbt-1.0/update/update_cache_2.12/output +++ /dev/null @@ -1 +0,0 @@ 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\ No newline at end of file diff --git a/project/project/project/target/streams/_global/ivyConfiguration/_global/streams/out b/project/project/project/target/streams/_global/ivyConfiguration/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/_global/ivySbt/_global/streams/out b/project/project/project/target/streams/_global/ivySbt/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/_global/moduleSettings/_global/streams/out b/project/project/project/target/streams/_global/moduleSettings/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/_global/projectDescriptors/_global/streams/out b/project/project/project/target/streams/_global/projectDescriptors/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/_global/scalaCompilerBridgeScope/_global/streams/out b/project/project/project/target/streams/_global/scalaCompilerBridgeScope/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/_global/update/_global/streams/out b/project/project/project/target/streams/_global/update/_global/streams/out deleted file mode 100755 index 982166c..0000000 --- a/project/project/project/target/streams/_global/update/_global/streams/out +++ /dev/null @@ -1,3 +0,0 @@ -[debug] not up to date. inChanged = true, force = false -[debug] Updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/"), "micore-build-build-build")... -[debug] Done updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/"), "micore-build-build-build") diff --git a/project/project/project/target/streams/compile/_global/_global/compileOutputs/previous b/project/project/project/target/streams/compile/_global/_global/compileOutputs/previous deleted file mode 100755 index d3be71e..0000000 --- a/project/project/project/target/streams/compile/_global/_global/compileOutputs/previous +++ /dev/null @@ -1 +0,0 @@ -["sbt.Task[scala.collection.Seq[java.nio.file.Path]]",["/run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/zinc/inc_compile_2.12.zip"]] \ No newline at end of file diff --git a/project/project/project/target/streams/compile/_global/_global/discoveredMainClasses/data b/project/project/project/target/streams/compile/_global/_global/discoveredMainClasses/data deleted file mode 100755 index 0637a08..0000000 --- a/project/project/project/target/streams/compile/_global/_global/discoveredMainClasses/data +++ /dev/null @@ -1 +0,0 @@ -[] \ No newline at end of file diff --git a/project/project/project/target/streams/compile/bspReporter/_global/streams/out b/project/project/project/target/streams/compile/bspReporter/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/compile/compile/_global/streams/out b/project/project/project/target/streams/compile/compile/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/compile/compileIncremental/_global/streams/export b/project/project/project/target/streams/compile/compileIncremental/_global/streams/export deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/compile/compileIncremental/_global/streams/out b/project/project/project/target/streams/compile/compileIncremental/_global/streams/out deleted file mode 100755 index 9cca155..0000000 --- a/project/project/project/target/streams/compile/compileIncremental/_global/streams/out +++ /dev/null @@ -1,6 +0,0 @@ -[debug] [zinc] IncrementalCompile ----------- -[debug] IncrementalCompile.incrementalCompile -[debug] previous = Stamps for: 0 products, 0 sources, 0 libraries -[debug] current source = Set() -[debug] > initialChanges = InitialChanges(Changes(added = Set(), removed = Set(), changed = Set(), unmodified = ...),Set(),Set(),API Changes: Set()) -[debug] Full compilation, no sources in previous analysis. diff --git a/project/project/project/target/streams/compile/copyResources/_global/streams/out b/project/project/project/target/streams/compile/copyResources/_global/streams/out deleted file mode 100755 index f25042f..0000000 --- a/project/project/project/target/streams/compile/copyResources/_global/streams/out +++ /dev/null @@ -1,2 +0,0 @@ -[debug] Copy resource mappings:  -[debug]   diff --git a/project/project/project/target/streams/compile/dependencyClasspath/_global/streams/export b/project/project/project/target/streams/compile/dependencyClasspath/_global/streams/export deleted file mode 100755 index 98ed4e4..0000000 --- a/project/project/project/target/streams/compile/dependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-reflect-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/checker-qual-3.4.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/error_prone_annotations-2.4.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-compiler-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jsch-0.1.54.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-reader-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-builtins-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/test-interface-1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ipcsocket-1.6.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jansi-2.1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-style-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sbinary_2.12-0.5.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/reactive-streams-1.0.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/config-1.4.2.jar diff --git a/project/project/project/target/streams/compile/exportedProducts/_global/streams/export b/project/project/project/target/streams/compile/exportedProducts/_global/streams/export deleted file mode 100755 index 8d01fa8..0000000 --- a/project/project/project/target/streams/compile/exportedProducts/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/project/project/target/streams/compile/externalDependencyClasspath/_global/streams/export b/project/project/project/target/streams/compile/externalDependencyClasspath/_global/streams/export deleted file mode 100755 index 98ed4e4..0000000 --- a/project/project/project/target/streams/compile/externalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-compiler.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-reflect.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-xml_2.12-2.1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sbt-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-library-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/main_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/io_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/logic_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/actions_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/main-settings_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/run_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/command_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/collections_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scripted-plugin_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-lm-integration_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-logging_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-xml_2.12-2.2.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/launcher-interface-1.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/caffeine-2.8.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/lm-coursier-shaded_2.12-2.1.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/log4j-api-2.17.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/log4j-core-2.17.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/log4j-slf4j-impl-2.17.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/librarymanagement-core_2.12-1.9.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/librarymanagement-ivy_2.12-1.9.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/compiler-interface-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-compile_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/file-tree-views-2.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jna-5.13.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jna-platform-5.13.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-relation_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/completion_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/task-system_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/tasks_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/testing_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-tracking_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-scalajson_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-classpath_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-apiinfo_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/core-macros_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-cache_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-control_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/protocol_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-core_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/template-resolver-0.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-position_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-compile-core_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-interface-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-reflect-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/checker-qual-3.4.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/error_prone_annotations-2.4.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-compiler-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jsch-0.1.54.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-reader-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-builtins-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/test-interface-1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ipcsocket-1.6.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jansi-2.1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-style-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sbinary_2.12-0.5.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/reactive-streams-1.0.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/config-1.4.2.jar diff --git a/project/project/project/target/streams/compile/incOptions/_global/streams/out b/project/project/project/target/streams/compile/incOptions/_global/streams/out deleted file mode 100755 index 7231079..0000000 --- a/project/project/project/target/streams/compile/incOptions/_global/streams/out +++ /dev/null @@ -1,5 +0,0 @@ -[debug] Created transactional ClassFileManager with tempDir = /run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/classes.bak -[debug] About to delete class files: -[debug] We backup class files: -[debug] Created transactional ClassFileManager with tempDir = /run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/classes.bak -[debug] Removing the temporary directory used for backing up class files: /run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/classes.bak diff --git a/project/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/export b/project/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/out b/project/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/compile/managedClasspath/_global/streams/export b/project/project/project/target/streams/compile/managedClasspath/_global/streams/export deleted file mode 100755 index 98ed4e4..0000000 --- a/project/project/project/target/streams/compile/managedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-compiler.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-reflect.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-xml_2.12-2.1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sbt-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-library-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/main_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/io_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/logic_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/actions_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/main-settings_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/run_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/command_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/collections_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scripted-plugin_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-lm-integration_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-logging_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-xml_2.12-2.2.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/launcher-interface-1.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/caffeine-2.8.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/lm-coursier-shaded_2.12-2.1.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/log4j-api-2.17.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/log4j-core-2.17.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/log4j-slf4j-impl-2.17.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/librarymanagement-core_2.12-1.9.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/librarymanagement-ivy_2.12-1.9.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/compiler-interface-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-compile_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/file-tree-views-2.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jna-5.13.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jna-platform-5.13.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-relation_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/completion_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/task-system_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/tasks_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/testing_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-tracking_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-scalajson_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-classpath_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-apiinfo_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/core-macros_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-cache_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-control_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/protocol_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-core_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/template-resolver-0.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-position_2.12-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-compile-core_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/util-interface-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-reflect-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/checker-qual-3.4.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/error_prone_annotations-2.4.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-compiler-2.12.18.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jsch-0.1.54.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-reader-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-builtins-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/test-interface-1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ipcsocket-1.6.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jansi-2.1.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/jline-style-3.19.0.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/sbinary_2.12-0.5.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/reactive-streams-1.0.3.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/org.scala-sbt/sbt/1.9.7/config-1.4.2.jar diff --git a/project/project/project/target/streams/compile/scalacOptions/_global/streams/out b/project/project/project/target/streams/compile/scalacOptions/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/compile/unmanagedClasspath/_global/streams/export b/project/project/project/target/streams/compile/unmanagedClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/project/project/target/streams/compile/unmanagedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/project/project/target/streams/compile/unmanagedClasspath/_global/streams/out b/project/project/project/target/streams/compile/unmanagedClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/compile/unmanagedJars/_global/streams/export b/project/project/project/target/streams/compile/unmanagedJars/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/project/project/target/streams/compile/unmanagedJars/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/project/project/target/streams/runtime/dependencyClasspath/_global/streams/export b/project/project/project/target/streams/runtime/dependencyClasspath/_global/streams/export deleted file mode 100755 index aef0f5a..0000000 --- a/project/project/project/target/streams/runtime/dependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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diff --git a/project/project/project/target/streams/runtime/exportedProducts/_global/streams/export b/project/project/project/target/streams/runtime/exportedProducts/_global/streams/export deleted file mode 100755 index 8d01fa8..0000000 --- a/project/project/project/target/streams/runtime/exportedProducts/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/project/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/project/project/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export deleted file mode 100755 index e2c8173..0000000 --- a/project/project/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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diff --git a/project/project/project/target/streams/runtime/fullClasspath/_global/streams/export b/project/project/project/target/streams/runtime/fullClasspath/_global/streams/export deleted file mode 100755 index aef0f5a..0000000 --- a/project/project/project/target/streams/runtime/fullClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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diff --git a/project/project/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export b/project/project/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export deleted file mode 100755 index 8d01fa8..0000000 --- a/project/project/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/project/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/project/project/target/streams/runtime/internalDependencyClasspath/_global/streams/out b/project/project/project/target/streams/runtime/internalDependencyClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/project/target/streams/runtime/managedClasspath/_global/streams/export b/project/project/project/target/streams/runtime/managedClasspath/_global/streams/export deleted file mode 100755 index e2c8173..0000000 --- a/project/project/project/target/streams/runtime/managedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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b/project/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp deleted file mode 100755 index ab6c5ba..0000000 --- a/project/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp +++ /dev/null @@ -1 +0,0 @@ -644413116 \ No newline at end of file diff --git a/project/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp b/project/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp deleted file mode 100755 index 07ec83b..0000000 --- a/project/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp +++ /dev/null @@ -1 +0,0 @@ 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\ No newline at end of file diff --git a/project/project/target/streams/_global/ivyConfiguration/_global/streams/out b/project/project/target/streams/_global/ivyConfiguration/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/_global/ivySbt/_global/streams/out b/project/project/target/streams/_global/ivySbt/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/_global/moduleSettings/_global/streams/out b/project/project/target/streams/_global/moduleSettings/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/_global/projectDescriptors/_global/streams/out b/project/project/target/streams/_global/projectDescriptors/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/_global/scalaCompilerBridgeScope/_global/streams/out b/project/project/target/streams/_global/scalaCompilerBridgeScope/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/_global/update/_global/streams/out b/project/project/target/streams/_global/update/_global/streams/out deleted file mode 100755 index 587fe53..0000000 --- a/project/project/target/streams/_global/update/_global/streams/out +++ /dev/null @@ -1,3 +0,0 @@ -[debug] not up to date. inChanged = true, force = false -[debug] Updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/project/"), "micore-build-build")... -[debug] Done updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/project/"), "micore-build-build") diff --git a/project/project/target/streams/_global/updateClassifiers/_global/streams/out b/project/project/target/streams/_global/updateClassifiers/_global/streams/out deleted file mode 100755 index 587fe53..0000000 --- a/project/project/target/streams/_global/updateClassifiers/_global/streams/out +++ /dev/null @@ -1,3 +0,0 @@ -[debug] not up to date. inChanged = true, force = false -[debug] Updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/project/"), "micore-build-build")... -[debug] Done updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/project/"), "micore-build-build") diff --git a/project/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/inputs b/project/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/inputs deleted file mode 100755 index f40f285..0000000 --- a/project/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/inputs +++ /dev/null @@ -1 +0,0 @@ -1606726032 \ No newline at end of file diff --git a/project/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/output b/project/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/output deleted file mode 100755 index a2b073f..0000000 --- a/project/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/output +++ /dev/null @@ -1 +0,0 @@ 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\ No newline at end of file diff --git a/project/project/target/streams/_global/updateSbtClassifiers/_global/streams/out b/project/project/target/streams/_global/updateSbtClassifiers/_global/streams/out deleted file mode 100755 index d06cba1..0000000 --- a/project/project/target/streams/_global/updateSbtClassifiers/_global/streams/out +++ /dev/null @@ -1,2 +0,0 @@ -[debug] Other repositories: -[debug] Default repositories: diff --git a/project/project/target/streams/compile/_global/_global/compileOutputs/previous b/project/project/target/streams/compile/_global/_global/compileOutputs/previous deleted file mode 100755 index 29633ad..0000000 --- a/project/project/target/streams/compile/_global/_global/compileOutputs/previous +++ /dev/null @@ -1 +0,0 @@ -["sbt.Task[scala.collection.Seq[java.nio.file.Path]]",["/run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/zinc/inc_compile_2.12.zip"]] \ No newline at end of file diff --git a/project/project/target/streams/compile/_global/_global/discoveredMainClasses/data b/project/project/target/streams/compile/_global/_global/discoveredMainClasses/data deleted file mode 100755 index 0637a08..0000000 --- a/project/project/target/streams/compile/_global/_global/discoveredMainClasses/data +++ /dev/null @@ -1 +0,0 @@ -[] \ No newline at end of file diff --git a/project/project/target/streams/compile/bloopGenerate/_global/streams/out b/project/project/target/streams/compile/bloopGenerate/_global/streams/out deleted file mode 100755 index c6e9ce7..0000000 --- a/project/project/target/streams/compile/bloopGenerate/_global/streams/out +++ /dev/null @@ -1,4 +0,0 @@ -[debug] [micore-build-build] Classpath dependencies List() -[debug] [micore-build-build] Dependencies from configurations List() -[debug] Bloop wrote the configuration of project 'micore-build-build' to '/run/media/gh0s7/Data/project/ddca2024/micore/project/project/.bloop/micore-build-build.json' -[success] Generated .bloop/micore-build-build.json diff --git a/project/project/target/streams/compile/bloopPostGenerate/_global/streams/out b/project/project/target/streams/compile/bloopPostGenerate/_global/streams/out deleted file mode 100755 index d94fa9e..0000000 --- a/project/project/target/streams/compile/bloopPostGenerate/_global/streams/out +++ /dev/null @@ -1 +0,0 @@ -[debug] Running postGenerate for micore-build-build diff --git a/project/project/target/streams/compile/bspReporter/_global/streams/out b/project/project/target/streams/compile/bspReporter/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/compile/compile/_global/streams/out b/project/project/target/streams/compile/compile/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/compile/compileIncremental/_global/streams/export b/project/project/target/streams/compile/compileIncremental/_global/streams/export deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/compile/compileIncremental/_global/streams/out b/project/project/target/streams/compile/compileIncremental/_global/streams/out deleted file mode 100755 index 9cca155..0000000 --- a/project/project/target/streams/compile/compileIncremental/_global/streams/out +++ /dev/null @@ -1,6 +0,0 @@ -[debug] [zinc] IncrementalCompile ----------- -[debug] IncrementalCompile.incrementalCompile -[debug] previous = Stamps for: 0 products, 0 sources, 0 libraries -[debug] current source = Set() -[debug] > initialChanges = InitialChanges(Changes(added = Set(), removed = Set(), changed = Set(), unmodified = ...),Set(),Set(),API Changes: Set()) -[debug] Full compilation, no sources in previous analysis. diff --git a/project/project/target/streams/compile/copyResources/_global/streams/out b/project/project/target/streams/compile/copyResources/_global/streams/out deleted file mode 100755 index f25042f..0000000 --- a/project/project/target/streams/compile/copyResources/_global/streams/out +++ /dev/null @@ -1,2 +0,0 @@ -[debug] Copy resource mappings:  -[debug]   diff --git a/project/project/target/streams/compile/dependencyClasspath/_global/streams/export b/project/project/target/streams/compile/dependencyClasspath/_global/streams/export deleted file mode 100755 index 7d0296f..0000000 --- a/project/project/target/streams/compile/dependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-apache-httpasyncclient/0.7.0/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-style/3.19.0/jline-style-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist-core-assembly/1.9.5/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbinary_2.12/0.5.1/sbinary_2.12-0.5.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/ssl-config-core_2.12/0.6.1/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/reactivestreams/reactive-streams/1.0.3/reactive-streams-1.0.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/config/1.4.2/config-1.4.2.jar diff --git a/project/project/target/streams/compile/exportedProducts/_global/streams/export b/project/project/target/streams/compile/exportedProducts/_global/streams/export deleted file mode 100755 index 454272b..0000000 --- a/project/project/target/streams/compile/exportedProducts/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/project/target/streams/compile/externalDependencyClasspath/_global/streams/export b/project/project/target/streams/compile/externalDependencyClasspath/_global/streams/export deleted file mode 100755 index 7d0296f..0000000 --- a/project/project/target/streams/compile/externalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbt/1.9.7/sbt-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main_2.12/1.9.7/main_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/io_2.12/1.9.7/io_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/logic_2.12/1.9.7/logic_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/actions_2.12/1.9.7/actions_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main-settings_2.12/1.9.7/main-settings_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/run_2.12/1.9.7/run_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/command_2.12/1.9.7/command_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/collections_2.12/1.9.7/collections_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/scripted-plugin_2.12/1.9.7/scripted-plugin_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-lm-integration_2.12/1.9.7/zinc-lm-integration_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-logging_2.12/1.9.7/util-logging_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/2.2.0/scala-xml_2.12-2.2.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/launcher-interface/1.4.2/launcher-interface-1.4.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/ben-manes/caffeine/caffeine/2.8.5/caffeine-2.8.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/io/get-coursier/lm-coursier-shaded_2.12/2.1.2/lm-coursier-shaded_2.12-2.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-api/2.17.1/log4j-api-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-core/2.17.1/log4j-core-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-slf4j-impl/2.17.1/log4j-slf4j-impl-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-core_2.12/1.9.3/librarymanagement-core_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-ivy_2.12/1.9.3/librarymanagement-ivy_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-interface/1.9.5/compiler-interface-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile_2.12/1.9.5/zinc-compile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/swoval/file-tree-views/2.1.12/file-tree-views-2.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna/5.13.0/jna-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna-platform/5.13.0/jna-platform-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-relation_2.12/1.9.7/util-relation_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/completion_2.12/1.9.7/completion_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/task-system_2.12/1.9.7/task-system_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/tasks_2.12/1.9.7/tasks_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/testing_2.12/1.9.7/testing_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-tracking_2.12/1.9.7/util-tracking_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-scalajson_2.12/0.9.1/sjson-new-scalajson_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal/3.19.0/jline-terminal-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classpath_2.12/1.9.5/zinc-classpath_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-apiinfo_2.12/1.9.5/zinc-apiinfo_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc_2.12/1.9.5/zinc_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/core-macros_2.12/1.9.7/core-macros_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-cache_2.12/1.9.7/util-cache_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-control_2.12/1.9.7/util-control_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/protocol_2.12/1.9.7/protocol_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-core_2.12/0.9.1/sjson-new-core_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/template-resolver/0.1/template-resolver-0.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-position_2.12/1.9.7/util-position_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile-core_2.12/1.9.5/zinc-compile-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-interface/1.9.7/util-interface-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/jline/jline/2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493/jline-2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jna/3.19.0/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jansi/3.19.0/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lmax/disruptor/3.4.2/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-reflect.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/checkerframework/checker-qual/3.4.1/checker-qual-3.4.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/errorprone/error_prone_annotations/2.4.0/error_prone_annotations-2.4.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-collection-compat_2.12/2.10.0/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/slf4j/slf4j-api/1.7.36/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-compiler.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/jcraft/jsch/0.1.54/jsch-0.1.54.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-apache-http_2.12/0.7.0/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ivy/ivy/2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-reader/3.19.0/jline-reader-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-builtins/3.19.0/jline-builtins-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-agent/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-jawn-parser_2.12/0.9.1/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-scalajson_2.12/1.0.0-M4/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-bridge_2.12/1.9.5/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classfile_2.12/1.9.5/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-core_2.12/1.9.5/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist_2.12/1.9.5/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-murmurhash_2.12/0.9.1/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ipcsocket/ipcsocket/1.6.2/ipcsocket-1.6.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-parser-combinators_2.12/1.1.2/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/openhft/zero-allocation-hashing/0.10.1/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/2.1.0/jansi-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-core_2.12/0.7.0/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-apache-httpasyncclient/0.7.0/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-style/3.19.0/jline-style-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist-core-assembly/1.9.5/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbinary_2.12/0.5.1/sbinary_2.12-0.5.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/ssl-config-core_2.12/0.6.1/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/reactivestreams/reactive-streams/1.0.3/reactive-streams-1.0.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/config/1.4.2/config-1.4.2.jar diff --git a/project/project/target/streams/compile/incOptions/_global/streams/out b/project/project/target/streams/compile/incOptions/_global/streams/out deleted file mode 100755 index 66abc73..0000000 --- a/project/project/target/streams/compile/incOptions/_global/streams/out +++ /dev/null @@ -1,5 +0,0 @@ -[debug] Created transactional ClassFileManager with tempDir = /run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/classes.bak -[debug] About to delete class files: -[debug] We backup class files: -[debug] Created transactional ClassFileManager with tempDir = /run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/classes.bak -[debug] Removing the temporary directory used for backing up class files: /run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/classes.bak diff --git a/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/export b/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/out b/project/project/target/streams/compile/internalDependencyClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/compile/managedClasspath/_global/streams/export b/project/project/target/streams/compile/managedClasspath/_global/streams/export deleted file mode 100755 index 7d0296f..0000000 --- a/project/project/target/streams/compile/managedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbt/1.9.7/sbt-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main_2.12/1.9.7/main_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/io_2.12/1.9.7/io_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/logic_2.12/1.9.7/logic_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/actions_2.12/1.9.7/actions_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main-settings_2.12/1.9.7/main-settings_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/run_2.12/1.9.7/run_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/command_2.12/1.9.7/command_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/collections_2.12/1.9.7/collections_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/scripted-plugin_2.12/1.9.7/scripted-plugin_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-lm-integration_2.12/1.9.7/zinc-lm-integration_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-logging_2.12/1.9.7/util-logging_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/2.2.0/scala-xml_2.12-2.2.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/launcher-interface/1.4.2/launcher-interface-1.4.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/ben-manes/caffeine/caffeine/2.8.5/caffeine-2.8.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/io/get-coursier/lm-coursier-shaded_2.12/2.1.2/lm-coursier-shaded_2.12-2.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-api/2.17.1/log4j-api-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-core/2.17.1/log4j-core-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-slf4j-impl/2.17.1/log4j-slf4j-impl-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-core_2.12/1.9.3/librarymanagement-core_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-ivy_2.12/1.9.3/librarymanagement-ivy_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-interface/1.9.5/compiler-interface-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile_2.12/1.9.5/zinc-compile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/swoval/file-tree-views/2.1.12/file-tree-views-2.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna/5.13.0/jna-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna-platform/5.13.0/jna-platform-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-relation_2.12/1.9.7/util-relation_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/completion_2.12/1.9.7/completion_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/task-system_2.12/1.9.7/task-system_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/tasks_2.12/1.9.7/tasks_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/testing_2.12/1.9.7/testing_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-tracking_2.12/1.9.7/util-tracking_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-scalajson_2.12/0.9.1/sjson-new-scalajson_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal/3.19.0/jline-terminal-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classpath_2.12/1.9.5/zinc-classpath_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-apiinfo_2.12/1.9.5/zinc-apiinfo_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc_2.12/1.9.5/zinc_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/core-macros_2.12/1.9.7/core-macros_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-cache_2.12/1.9.7/util-cache_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-control_2.12/1.9.7/util-control_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/protocol_2.12/1.9.7/protocol_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-core_2.12/0.9.1/sjson-new-core_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/template-resolver/0.1/template-resolver-0.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-position_2.12/1.9.7/util-position_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile-core_2.12/1.9.5/zinc-compile-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-interface/1.9.7/util-interface-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/jline/jline/2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493/jline-2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jna/3.19.0/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jansi/3.19.0/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lmax/disruptor/3.4.2/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-reflect.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/checkerframework/checker-qual/3.4.1/checker-qual-3.4.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/errorprone/error_prone_annotations/2.4.0/error_prone_annotations-2.4.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-collection-compat_2.12/2.10.0/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/slf4j/slf4j-api/1.7.36/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-compiler.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/jcraft/jsch/0.1.54/jsch-0.1.54.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-apache-http_2.12/0.7.0/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ivy/ivy/2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-reader/3.19.0/jline-reader-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-builtins/3.19.0/jline-builtins-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-agent/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-jawn-parser_2.12/0.9.1/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-scalajson_2.12/1.0.0-M4/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-bridge_2.12/1.9.5/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classfile_2.12/1.9.5/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-core_2.12/1.9.5/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist_2.12/1.9.5/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-murmurhash_2.12/0.9.1/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ipcsocket/ipcsocket/1.6.2/ipcsocket-1.6.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-parser-combinators_2.12/1.1.2/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/openhft/zero-allocation-hashing/0.10.1/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/2.1.0/jansi-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-core_2.12/0.7.0/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-apache-httpasyncclient/0.7.0/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-style/3.19.0/jline-style-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist-core-assembly/1.9.5/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbinary_2.12/0.5.1/sbinary_2.12-0.5.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/ssl-config-core_2.12/0.6.1/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/reactivestreams/reactive-streams/1.0.3/reactive-streams-1.0.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/config/1.4.2/config-1.4.2.jar diff --git a/project/project/target/streams/compile/scalacOptions/_global/streams/out b/project/project/target/streams/compile/scalacOptions/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/compile/unmanagedClasspath/_global/streams/export b/project/project/target/streams/compile/unmanagedClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/project/target/streams/compile/unmanagedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/project/target/streams/compile/unmanagedClasspath/_global/streams/out b/project/project/target/streams/compile/unmanagedClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/compile/unmanagedJars/_global/streams/export b/project/project/target/streams/compile/unmanagedJars/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/project/target/streams/compile/unmanagedJars/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/project/target/streams/it/bloopGenerate/_global/streams/out b/project/project/target/streams/it/bloopGenerate/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/it/bloopPostGenerate/_global/streams/out b/project/project/target/streams/it/bloopPostGenerate/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/project/target/streams/runtime/dependencyClasspath/_global/streams/export b/project/project/target/streams/runtime/dependencyClasspath/_global/streams/export deleted file mode 100755 index bde13f8..0000000 --- a/project/project/target/streams/runtime/dependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/classes:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar diff --git a/project/project/target/streams/runtime/exportedProducts/_global/streams/export b/project/project/target/streams/runtime/exportedProducts/_global/streams/export deleted file mode 100755 index 454272b..0000000 --- a/project/project/target/streams/runtime/exportedProducts/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/project/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export deleted file mode 100755 index a7fbfb8..0000000 --- a/project/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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b/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp deleted file mode 100755 index ab6c5ba..0000000 --- a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp +++ /dev/null @@ -1 +0,0 @@ -644413116 \ No newline at end of file diff --git a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp b/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp deleted file mode 100755 index 00763b6..0000000 --- a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp +++ /dev/null @@ -1 +0,0 @@ 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\ No newline at end of file diff --git a/project/target/streams/_global/ivyConfiguration/_global/streams/out b/project/target/streams/_global/ivyConfiguration/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/_global/ivySbt/_global/streams/out b/project/target/streams/_global/ivySbt/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/_global/moduleSettings/_global/streams/out b/project/target/streams/_global/moduleSettings/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/_global/projectDescriptors/_global/streams/out b/project/target/streams/_global/projectDescriptors/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/_global/scalaCompilerBridgeScope/_global/streams/out b/project/target/streams/_global/scalaCompilerBridgeScope/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/_global/update/_global/streams/out b/project/target/streams/_global/update/_global/streams/out deleted file mode 100755 index 5f863f8..0000000 --- a/project/target/streams/_global/update/_global/streams/out +++ /dev/null @@ -1,3 +0,0 @@ -[debug] not up to date. inChanged = true, force = false -[debug] Updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/"), "micore-build")... -[debug] Done updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/"), "micore-build") diff --git a/project/target/streams/_global/updateClassifiers/_global/streams/out b/project/target/streams/_global/updateClassifiers/_global/streams/out deleted file mode 100755 index 5f863f8..0000000 --- a/project/target/streams/_global/updateClassifiers/_global/streams/out +++ /dev/null @@ -1,3 +0,0 @@ -[debug] not up to date. inChanged = true, force = false -[debug] Updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/"), "micore-build")... -[debug] Done updating ProjectRef(uri("file:/run/media/gh0s7/Data/project/ddca2024/micore/project/"), "micore-build") diff --git a/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/inputs b/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/inputs deleted file mode 100755 index 0120f9f..0000000 --- a/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/inputs +++ /dev/null @@ -1 +0,0 @@ -606022120 \ No newline at end of file diff --git a/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/output b/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/output deleted file mode 100755 index a2b073f..0000000 --- a/project/target/streams/_global/updateClassifiers/_global/streams/update_cache_2.12/output +++ /dev/null @@ -1 +0,0 @@ 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\ No newline at end of file diff --git a/project/target/streams/_global/updateSbtClassifiers/_global/streams/out b/project/target/streams/_global/updateSbtClassifiers/_global/streams/out deleted file mode 100755 index d06cba1..0000000 --- a/project/target/streams/_global/updateSbtClassifiers/_global/streams/out +++ /dev/null @@ -1,2 +0,0 @@ -[debug] Other repositories: -[debug] Default repositories: diff --git a/project/target/streams/compile/_global/_global/compileOutputs/previous b/project/target/streams/compile/_global/_global/compileOutputs/previous deleted file mode 100755 index 3f53060..0000000 --- a/project/target/streams/compile/_global/_global/compileOutputs/previous +++ /dev/null @@ -1 +0,0 @@ -["sbt.Task[scala.collection.Seq[java.nio.file.Path]]",["/run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/zinc/inc_compile_2.12.zip"]] \ No newline at end of file diff --git a/project/target/streams/compile/_global/_global/discoveredMainClasses/data b/project/target/streams/compile/_global/_global/discoveredMainClasses/data deleted file mode 100755 index 0637a08..0000000 --- a/project/target/streams/compile/_global/_global/discoveredMainClasses/data +++ /dev/null @@ -1 +0,0 @@ -[] \ No newline at end of file diff --git a/project/target/streams/compile/bloopGenerate/_global/streams/out b/project/target/streams/compile/bloopGenerate/_global/streams/out deleted file mode 100755 index 0816633..0000000 --- a/project/target/streams/compile/bloopGenerate/_global/streams/out +++ /dev/null @@ -1,4 +0,0 @@ -[debug] [micore-build] Classpath dependencies List() -[debug] [micore-build] Dependencies from configurations List() -[debug] Bloop wrote the configuration of project 'micore-build' to '/run/media/gh0s7/Data/project/ddca2024/micore/project/.bloop/micore-build.json' -[success] Generated .bloop/micore-build.json diff --git a/project/target/streams/compile/bloopPostGenerate/_global/streams/out b/project/target/streams/compile/bloopPostGenerate/_global/streams/out deleted file mode 100755 index 33f2857..0000000 --- a/project/target/streams/compile/bloopPostGenerate/_global/streams/out +++ /dev/null @@ -1 +0,0 @@ -[debug] Running postGenerate for micore-build diff --git a/project/target/streams/compile/bspReporter/_global/streams/out b/project/target/streams/compile/bspReporter/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/compile/compile/_global/streams/out b/project/target/streams/compile/compile/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/compile/compileIncremental/_global/streams/export b/project/target/streams/compile/compileIncremental/_global/streams/export deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/compile/compileIncremental/_global/streams/out b/project/target/streams/compile/compileIncremental/_global/streams/out deleted file mode 100755 index 9cca155..0000000 --- a/project/target/streams/compile/compileIncremental/_global/streams/out +++ /dev/null @@ -1,6 +0,0 @@ -[debug] [zinc] IncrementalCompile ----------- -[debug] IncrementalCompile.incrementalCompile -[debug] previous = Stamps for: 0 products, 0 sources, 0 libraries -[debug] current source = Set() -[debug] > initialChanges = InitialChanges(Changes(added = Set(), removed = Set(), changed = Set(), unmodified = ...),Set(),Set(),API Changes: Set()) -[debug] Full compilation, no sources in previous analysis. diff --git a/project/target/streams/compile/copyResources/_global/streams/out b/project/target/streams/compile/copyResources/_global/streams/out deleted file mode 100755 index f25042f..0000000 --- a/project/target/streams/compile/copyResources/_global/streams/out +++ /dev/null @@ -1,2 +0,0 @@ -[debug] Copy resource mappings:  -[debug]   diff --git a/project/target/streams/compile/dependencyClasspath/_global/streams/export b/project/target/streams/compile/dependencyClasspath/_global/streams/export deleted file mode 100755 index 7d0296f..0000000 --- a/project/target/streams/compile/dependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ 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gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-apache-httpasyncclient/0.7.0/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-style/3.19.0/jline-style-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist-core-assembly/1.9.5/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbinary_2.12/0.5.1/sbinary_2.12-0.5.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/ssl-config-core_2.12/0.6.1/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/reactivestreams/reactive-streams/1.0.3/reactive-streams-1.0.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/config/1.4.2/config-1.4.2.jar diff --git a/project/target/streams/compile/exportedProducts/_global/streams/export b/project/target/streams/compile/exportedProducts/_global/streams/export deleted file mode 100755 index 4006493..0000000 --- a/project/target/streams/compile/exportedProducts/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/target/streams/compile/externalDependencyClasspath/_global/streams/export b/project/target/streams/compile/externalDependencyClasspath/_global/streams/export deleted file mode 100755 index 7d0296f..0000000 --- a/project/target/streams/compile/externalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbt/1.9.7/sbt-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main_2.12/1.9.7/main_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/io_2.12/1.9.7/io_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/logic_2.12/1.9.7/logic_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/actions_2.12/1.9.7/actions_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main-settings_2.12/1.9.7/main-settings_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/run_2.12/1.9.7/run_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/command_2.12/1.9.7/command_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/collections_2.12/1.9.7/collections_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/scripted-plugin_2.12/1.9.7/scripted-plugin_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-lm-integration_2.12/1.9.7/zinc-lm-integration_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-logging_2.12/1.9.7/util-logging_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/2.2.0/scala-xml_2.12-2.2.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/launcher-interface/1.4.2/launcher-interface-1.4.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/ben-manes/caffeine/caffeine/2.8.5/caffeine-2.8.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/io/get-coursier/lm-coursier-shaded_2.12/2.1.2/lm-coursier-shaded_2.12-2.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-api/2.17.1/log4j-api-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-core/2.17.1/log4j-core-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-slf4j-impl/2.17.1/log4j-slf4j-impl-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-core_2.12/1.9.3/librarymanagement-core_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-ivy_2.12/1.9.3/librarymanagement-ivy_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-interface/1.9.5/compiler-interface-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile_2.12/1.9.5/zinc-compile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/swoval/file-tree-views/2.1.12/file-tree-views-2.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna/5.13.0/jna-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna-platform/5.13.0/jna-platform-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-relation_2.12/1.9.7/util-relation_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/completion_2.12/1.9.7/completion_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/task-system_2.12/1.9.7/task-system_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/tasks_2.12/1.9.7/tasks_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/testing_2.12/1.9.7/testing_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-tracking_2.12/1.9.7/util-tracking_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-scalajson_2.12/0.9.1/sjson-new-scalajson_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal/3.19.0/jline-terminal-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classpath_2.12/1.9.5/zinc-classpath_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-apiinfo_2.12/1.9.5/zinc-apiinfo_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc_2.12/1.9.5/zinc_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/core-macros_2.12/1.9.7/core-macros_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-cache_2.12/1.9.7/util-cache_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-control_2.12/1.9.7/util-control_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/protocol_2.12/1.9.7/protocol_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-core_2.12/0.9.1/sjson-new-core_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/template-resolver/0.1/template-resolver-0.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-position_2.12/1.9.7/util-position_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile-core_2.12/1.9.5/zinc-compile-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-interface/1.9.7/util-interface-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/jline/jline/2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493/jline-2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jna/3.19.0/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jansi/3.19.0/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lmax/disruptor/3.4.2/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-reflect.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/checkerframework/checker-qual/3.4.1/checker-qual-3.4.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/errorprone/error_prone_annotations/2.4.0/error_prone_annotations-2.4.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-collection-compat_2.12/2.10.0/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/slf4j/slf4j-api/1.7.36/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-compiler.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/jcraft/jsch/0.1.54/jsch-0.1.54.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-apache-http_2.12/0.7.0/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ivy/ivy/2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-reader/3.19.0/jline-reader-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-builtins/3.19.0/jline-builtins-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-agent/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-jawn-parser_2.12/0.9.1/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-scalajson_2.12/1.0.0-M4/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-bridge_2.12/1.9.5/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classfile_2.12/1.9.5/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-core_2.12/1.9.5/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist_2.12/1.9.5/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-murmurhash_2.12/0.9.1/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ipcsocket/ipcsocket/1.6.2/ipcsocket-1.6.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-parser-combinators_2.12/1.1.2/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/openhft/zero-allocation-hashing/0.10.1/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/2.1.0/jansi-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-core_2.12/0.7.0/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-apache-httpasyncclient/0.7.0/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-style/3.19.0/jline-style-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist-core-assembly/1.9.5/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbinary_2.12/0.5.1/sbinary_2.12-0.5.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/ssl-config-core_2.12/0.6.1/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/reactivestreams/reactive-streams/1.0.3/reactive-streams-1.0.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/config/1.4.2/config-1.4.2.jar diff --git a/project/target/streams/compile/incOptions/_global/streams/out b/project/target/streams/compile/incOptions/_global/streams/out deleted file mode 100755 index 44649e0..0000000 --- a/project/target/streams/compile/incOptions/_global/streams/out +++ /dev/null @@ -1,5 +0,0 @@ -[debug] Created transactional ClassFileManager with tempDir = /run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes.bak -[debug] About to delete class files: -[debug] We backup class files: -[debug] Created transactional ClassFileManager with tempDir = /run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes.bak -[debug] Removing the temporary directory used for backing up class files: /run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes.bak diff --git a/project/target/streams/compile/internalDependencyClasspath/_global/streams/export b/project/target/streams/compile/internalDependencyClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/target/streams/compile/internalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/target/streams/compile/internalDependencyClasspath/_global/streams/out b/project/target/streams/compile/internalDependencyClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/compile/managedClasspath/_global/streams/export b/project/target/streams/compile/managedClasspath/_global/streams/export deleted file mode 100755 index 7d0296f..0000000 --- a/project/target/streams/compile/managedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbt/1.9.7/sbt-1.9.7.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main_2.12/1.9.7/main_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/io_2.12/1.9.7/io_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/logic_2.12/1.9.7/logic_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/actions_2.12/1.9.7/actions_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main-settings_2.12/1.9.7/main-settings_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/run_2.12/1.9.7/run_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/command_2.12/1.9.7/command_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/collections_2.12/1.9.7/collections_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/scripted-plugin_2.12/1.9.7/scripted-plugin_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-lm-integration_2.12/1.9.7/zinc-lm-integration_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-logging_2.12/1.9.7/util-logging_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/2.2.0/scala-xml_2.12-2.2.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/launcher-interface/1.4.2/launcher-interface-1.4.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/ben-manes/caffeine/caffeine/2.8.5/caffeine-2.8.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/io/get-coursier/lm-coursier-shaded_2.12/2.1.2/lm-coursier-shaded_2.12-2.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-api/2.17.1/log4j-api-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-core/2.17.1/log4j-core-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-slf4j-impl/2.17.1/log4j-slf4j-impl-2.17.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-core_2.12/1.9.3/librarymanagement-core_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-ivy_2.12/1.9.3/librarymanagement-ivy_2.12-1.9.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-interface/1.9.5/compiler-interface-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile_2.12/1.9.5/zinc-compile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/swoval/file-tree-views/2.1.12/file-tree-views-2.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna/5.13.0/jna-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna-platform/5.13.0/jna-platform-5.13.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-relation_2.12/1.9.7/util-relation_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/completion_2.12/1.9.7/completion_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/task-system_2.12/1.9.7/task-system_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/tasks_2.12/1.9.7/tasks_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/testing_2.12/1.9.7/testing_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-tracking_2.12/1.9.7/util-tracking_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-scalajson_2.12/0.9.1/sjson-new-scalajson_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal/3.19.0/jline-terminal-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classpath_2.12/1.9.5/zinc-classpath_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-apiinfo_2.12/1.9.5/zinc-apiinfo_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc_2.12/1.9.5/zinc_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/core-macros_2.12/1.9.7/core-macros_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-cache_2.12/1.9.7/util-cache_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-control_2.12/1.9.7/util-control_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/protocol_2.12/1.9.7/protocol_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-core_2.12/0.9.1/sjson-new-core_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/template-resolver/0.1/template-resolver-0.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-position_2.12/1.9.7/util-position_2.12-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile-core_2.12/1.9.5/zinc-compile-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-interface/1.9.7/util-interface-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/jline/jline/2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493/jline-2.14.7-sbt-a1b0ffbb8f64bb820f4f84a0c07a0c0964507493.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jna/3.19.0/jline-terminal-jna-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-terminal-jansi/3.19.0/jline-terminal-jansi-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lmax/disruptor/3.4.2/disruptor-3.4.2.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-reflect.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/checkerframework/checker-qual/3.4.1/checker-qual-3.4.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/errorprone/error_prone_annotations/2.4.0/error_prone_annotations-2.4.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-collection-compat_2.12/2.10.0/scala-collection-compat_2.12-2.10.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/slf4j/slf4j-api/1.7.36/slf4j-api-1.7.36.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-compiler.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/jcraft/jsch/0.1.54/jsch-0.1.54.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-apache-http_2.12/0.7.0/gigahorse-apache-http_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ivy/ivy/2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2/ivy-2.3.0-sbt-396a783bba347016e7fe30dacc60d355be607fe2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-reader/3.19.0/jline-reader-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-builtins/3.19.0/jline-builtins-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-agent/1.9.7/test-agent-1.9.7.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-jawn-parser_2.12/0.9.1/shaded-jawn-parser_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-scalajson_2.12/1.0.0-M4/shaded-scalajson_2.12-1.0.0-M4.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-bridge_2.12/1.9.5/compiler-bridge_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-classfile_2.12/1.9.5/zinc-classfile_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-core_2.12/1.9.5/zinc-core_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist_2.12/1.9.5/zinc-persist_2.12-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/sjson-new-murmurhash_2.12/0.9.1/sjson-new-murmurhash_2.12-0.9.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/ipcsocket/ipcsocket/1.6.2/ipcsocket-1.6.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-parser-combinators_2.12/1.1.2/scala-parser-combinators_2.12-1.1.2.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/net/openhft/zero-allocation-hashing/0.10.1/zero-allocation-hashing-0.10.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/2.1.0/jansi-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/gigahorse-core_2.12/0.7.0/gigahorse-core_2.12-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/eed3si9n/shaded-apache-httpasyncclient/0.7.0/shaded-apache-httpasyncclient-0.7.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/jline/jline-style/3.19.0/jline-style-3.19.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-persist-core-assembly/1.9.5/zinc-persist-core-assembly-1.9.5.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbinary_2.12/0.5.1/sbinary_2.12-0.5.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/ssl-config-core_2.12/0.6.1/ssl-config-core_2.12-0.6.1.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/org/reactivestreams/reactive-streams/1.0.3/reactive-streams-1.0.3.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/typesafe/config/1.4.2/config-1.4.2.jar diff --git a/project/target/streams/compile/scalacOptions/_global/streams/out b/project/target/streams/compile/scalacOptions/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/compile/unmanagedClasspath/_global/streams/export b/project/target/streams/compile/unmanagedClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/target/streams/compile/unmanagedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/target/streams/compile/unmanagedClasspath/_global/streams/out b/project/target/streams/compile/unmanagedClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/compile/unmanagedJars/_global/streams/export b/project/target/streams/compile/unmanagedJars/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/target/streams/compile/unmanagedJars/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/target/streams/it/bloopGenerate/_global/streams/out b/project/target/streams/it/bloopGenerate/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/it/bloopPostGenerate/_global/streams/out b/project/target/streams/it/bloopPostGenerate/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/runtime/dependencyClasspath/_global/streams/export b/project/target/streams/runtime/dependencyClasspath/_global/streams/export deleted file mode 100755 index b0b5605..0000000 --- a/project/target/streams/runtime/dependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar diff --git a/project/target/streams/runtime/exportedProducts/_global/streams/export b/project/target/streams/runtime/exportedProducts/_global/streams/export deleted file mode 100755 index 4006493..0000000 --- a/project/target/streams/runtime/exportedProducts/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export deleted file mode 100755 index a7fbfb8..0000000 --- a/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar diff --git a/project/target/streams/runtime/fullClasspath/_global/streams/export b/project/target/streams/runtime/fullClasspath/_global/streams/export deleted file mode 100755 index b0b5605..0000000 --- a/project/target/streams/runtime/fullClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar diff --git a/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export b/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export deleted file mode 100755 index 4006493..0000000 --- a/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/run/media/gh0s7/Data/project/ddca2024/micore/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/target/streams/runtime/internalDependencyClasspath/_global/streams/out b/project/target/streams/runtime/internalDependencyClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/runtime/managedClasspath/_global/streams/export b/project/target/streams/runtime/managedClasspath/_global/streams/export deleted file mode 100755 index a7fbfb8..0000000 --- a/project/target/streams/runtime/managedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ -/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/sbt-bloop_2.12_1.0/2.0.6/sbt-bloop_2.12_1.0-2.0.6.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/ch/epfl/scala/bloop-config_2.12/2.1.0/bloop-config_2.12-2.1.0.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/plokhotnyuk/jsoniter-scala/jsoniter-scala-core_2.12/2.30.14/jsoniter-scala-core_2.12-2.30.14.jar:/home/gh0s7/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/unroll-annotation_2.12/0.1.12/unroll-annotation_2.12-0.1.12.jar:/home/gh0s7/.sbt/boot/scala-2.12.18/lib/scala-library.jar diff --git a/project/target/streams/runtime/unmanagedClasspath/_global/streams/export b/project/target/streams/runtime/unmanagedClasspath/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/target/streams/runtime/unmanagedClasspath/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/target/streams/runtime/unmanagedClasspath/_global/streams/out b/project/target/streams/runtime/unmanagedClasspath/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/runtime/unmanagedJars/_global/streams/export b/project/target/streams/runtime/unmanagedJars/_global/streams/export deleted file mode 100755 index 8b13789..0000000 --- a/project/target/streams/runtime/unmanagedJars/_global/streams/export +++ /dev/null @@ -1 +0,0 @@ - diff --git a/project/target/streams/test/bloopGenerate/_global/streams/out b/project/target/streams/test/bloopGenerate/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/project/target/streams/test/bloopPostGenerate/_global/streams/out b/project/target/streams/test/bloopPostGenerate/_global/streams/out deleted file mode 100755 index e69de29..0000000 diff --git a/src/hex/mem.dat b/src/hex/mem.dat new file mode 100755 index 0000000..8d7477d --- /dev/null +++ b/src/hex/mem.dat @@ -0,0 +1,9 @@ +20080001 +20100000 +20120065 +02088020 +21080001 +0112502a +1540fffc +00000000 +00114514 \ No newline at end of file diff --git a/src/main/scala/micore/Core.scala b/src/main/scala/micore/Core.scala index b154be6..43365ac 100755 --- a/src/main/scala/micore/Core.scala +++ b/src/main/scala/micore/Core.scala @@ -63,7 +63,7 @@ class Core extends Module { Seq( exe_br_flg -> exe_br_target, exe_jmp_flg -> exe_alu_out, - stall_flg -> if_reg_pc // stall + stall_flg -> if_reg_pc ) ) if_reg_pc := if_pc_next @@ -74,7 +74,7 @@ class Core extends Module { if_inst, Seq( (exe_br_flg || exe_jmp_flg) -> BUBBLE, - (stall_flg) -> id_reg_inst + stall_flg -> id_reg_inst ) ) @@ -97,28 +97,21 @@ class Core extends Module { val id_rd_addr = id_inst(15, 11) val mem_wb_data = Wire(UInt(WORD_LEN.W)) - val id_rs_data = MuxCase( - regfile(id_rs_addr), + + def getForwardedData(addr: UInt): UInt = { + MuxCase( + regfile(addr), Seq( - (id_rs_addr === 0.U) -> 0.U(WORD_LEN.W), - ((id_rs_addr === exe_reg_wb_addr) && (exe_reg_rf_wen === REN_S)) -> exe_alu_out, // Forward from EX - ((id_rs_addr === mem_reg_wb_addr) && (mem_reg_rf_wen === REN_S)) -> mem_wb_data, // Forward from MEM - ( - (id_rs_addr === wb_reg_wb_addr) && (wb_reg_rf_wen === REN_S) - ) -> wb_reg_wb_data // Forward from WB - ) - ) - val id_rt_data = MuxCase( - regfile(id_rt_addr), - Seq( - (id_rt_addr === 0.U) -> 0.U(WORD_LEN.W), - ((id_rt_addr === exe_reg_wb_addr) && (exe_reg_rf_wen === REN_S)) -> exe_alu_out, // Forward from EX - ((id_rt_addr === mem_reg_wb_addr) && (mem_reg_rf_wen === REN_S)) -> mem_wb_data, // Forward from MEM - ( - (id_rt_addr === wb_reg_wb_addr) && (wb_reg_rf_wen === REN_S) - ) -> wb_reg_wb_data // Forward from WB + (addr === 0.U) -> 0.U(WORD_LEN.W), + ((addr === exe_reg_wb_addr) && (exe_reg_rf_wen === REN_S)) -> exe_alu_out, + ((addr === mem_reg_wb_addr) && (mem_reg_rf_wen === REN_S)) -> mem_wb_data, + ((addr === wb_reg_wb_addr) && (wb_reg_rf_wen === REN_S)) -> wb_reg_wb_data ) ) +} + + val id_rs_data = getForwardedData(id_rs_addr) + val id_rt_data = getForwardedData(id_rt_addr) val id_imm_i = id_inst(15, 0) val id_imm_i_sext = Cat(Fill(16, id_imm_i(15)), id_imm_i) @@ -152,20 +145,13 @@ class Core extends Module { val id_exe_fun :: id_op1_sel :: id_op2_sel :: id_mem_wen :: id_rf_wen :: id_wb_sel :: Nil = csignals - val id_op1_data = MuxCase( - 0.U(WORD_LEN.W), - Seq( - (id_op1_sel === OP1_RS1) -> id_rs_data, - (id_op1_sel === OP1_PC) -> id_reg_pc - ) - ) + val id_op1_data = Mux(id_op1_sel === OP1_RS1, id_rs_data, Mux(id_op1_sel === OP1_PC, id_reg_pc, 0.U(WORD_LEN.W))) - val id_op2_data = MuxCase( - 0.U(WORD_LEN.W), - Seq( - (id_op2_sel === OP2_RS2) -> id_rt_data, - (id_op2_sel === OP2_IMI) -> id_imm_i_sext, - (id_op2_sel === OP2_IMJ) -> id_imm_j + val id_op2_data = Mux( + id_op2_sel === OP2_RS2, id_rt_data, + Mux( + id_op2_sel === OP2_IMI, id_imm_i_sext, + Mux(id_op2_sel === OP2_IMJ, id_imm_j, 0.U(WORD_LEN.W)) ) ) @@ -177,10 +163,7 @@ class Core extends Module { exe_reg_wb_addr := MuxCase( id_rt_addr, Seq( - (id_wb_sel === WB_ALU && id_inst( - 31, - 26 - ) === "b000000".U) -> id_rd_addr, // R-type + (id_wb_sel === WB_ALU && id_inst(31, 26) === "b000000".U) -> id_rd_addr, (id_inst === JAL) -> 31.U ) ) @@ -200,18 +183,9 @@ class Core extends Module { (exe_reg_exe_fun === ALU_AND) -> (exe_reg_op1_data & exe_reg_op2_data), (exe_reg_exe_fun === ALU_OR) -> (exe_reg_op1_data | exe_reg_op2_data), (exe_reg_exe_fun === ALU_XOR) -> (exe_reg_op1_data ^ exe_reg_op2_data), - (exe_reg_exe_fun === ALU_SLL) -> (exe_reg_op1_data << exe_reg_op2_data( - 4, - 0 - ))(31, 0), - (exe_reg_exe_fun === ALU_SRL) -> (exe_reg_op1_data >> exe_reg_op2_data( - 4, - 0 - )).asUInt, - (exe_reg_exe_fun === ALU_SRA) -> (exe_reg_op1_data.asSInt >> exe_reg_op2_data( - 4, - 0 - )).asUInt, + (exe_reg_exe_fun === ALU_SLL) -> (exe_reg_op1_data << exe_reg_op2_data(4, 0))(31, 0), + (exe_reg_exe_fun === ALU_SRL) -> (exe_reg_op1_data >> exe_reg_op2_data(4, 0)).asUInt, + (exe_reg_exe_fun === ALU_SRA) -> (exe_reg_op1_data.asSInt >> exe_reg_op2_data(4, 0)).asUInt, (exe_reg_exe_fun === ALU_SLT) -> (exe_reg_op1_data.asSInt < exe_reg_op2_data.asSInt).asUInt, (exe_reg_exe_fun === ALU_COPY1) -> exe_reg_op1_data ) @@ -225,9 +199,7 @@ class Core extends Module { ) ) - exe_br_target := exe_reg_pc + (exe_reg_imm_i_sext << 2.U( - 5.W - )) + exe_br_target := exe_reg_pc + (exe_reg_imm_i_sext << 2.U(5.W)) exe_jmp_flg := (exe_reg_wb_sel === WB_PC) // ********* Execute/Memory (EX/MEM) Stage ********* @@ -244,13 +216,10 @@ class Core extends Module { io.dmem.wen := mem_reg_mem_wen io.dmem.wdata := mem_reg_rt_data - mem_wb_data := MuxCase( - mem_reg_alu_out, - Seq( - (mem_reg_wb_sel === WB_MEM) -> io.dmem.rdata, - (mem_reg_wb_sel === WB_PC) -> (mem_reg_pc + 4.U(WORD_LEN.W)) - ) - ) + mem_wb_data := Mux( + mem_reg_wb_sel === WB_MEM, io.dmem.rdata, + Mux(mem_reg_wb_sel === WB_PC, mem_reg_pc + 4.U(WORD_LEN.W), mem_reg_alu_out) +) // ********* Memory/Write Back (MEM/WB) Stage ********* wb_reg_wb_data := mem_wb_data @@ -263,37 +232,35 @@ class Core extends Module { } io.exit := (id_reg_inst === UNIMP) - - // ********* Debugging ********* - printf(p"---------------\n") - printf(p"if_inst: 0x${Hexadecimal(if_inst)}\n") - printf(p"if_reg_pc: 0x${Hexadecimal(if_reg_pc)}\n") - printf(p"id_reg_pc: 0x${Hexadecimal(id_reg_pc)}\n") - printf(p"id_reg_inst: 0x${Hexadecimal(id_reg_inst)}\n") - printf(p"id_inst: 0x${Hexadecimal(id_inst)}\n") - printf(p"id_rs_data: 0x${Hexadecimal(id_rs_data)}\n") - printf(p"id_rt_data: 0x${Hexadecimal(id_rt_data)}\n") - printf(p"id_rs_addr: 0x${Hexadecimal(id_rs_addr)}\n") - printf(p"id_rt_addr: 0x${Hexadecimal(id_rt_addr)}\n") - printf(p"id_rd_addr: 0x${Hexadecimal(id_rd_addr)}\n") - printf(p"id_imm_i_sext: 0x${Hexadecimal(id_imm_i_sext)}\n") - printf(p"exe_br_flg: 0x${Hexadecimal(exe_br_flg)}\n") - printf(p"exe_jmp_flg: 0x${Hexadecimal(exe_jmp_flg)}\n") - printf(p"id_rs_data_hazard: 0x${Hexadecimal(id_rs_data_hazard)}\n") - printf(p"id_rt_data_hazard: 0x${Hexadecimal(id_rt_data_hazard)}\n") - printf(p"stall_flg: 0x${Hexadecimal(stall_flg)}\n") - printf(p"exe_reg_pc: 0x${Hexadecimal(exe_reg_pc)}\n") - printf(p"exe_reg_op1_data: 0x${Hexadecimal(exe_reg_op1_data)}\n") - printf(p"exe_reg_op2_data: 0x${Hexadecimal(exe_reg_op2_data)}\n") - printf(p"exe_alu_out: 0x${Hexadecimal(exe_alu_out)}\n") - printf(p"exe_br_target: 0x${Hexadecimal(exe_br_target)}\n") - printf(p"exe_reg_wb_addr: 0x${Hexadecimal(exe_reg_wb_addr)}\n") - printf(p"mem_reg_pc: 0x${Hexadecimal(mem_reg_pc)}\n") - printf(p"mem_wb_data: 0x${Hexadecimal(mem_wb_data)}\n") - printf(p"wb_reg_wb_addr: 0x${Hexadecimal(wb_reg_wb_addr)}\n") - printf(p"wb_reg_wb_data: 0x${Hexadecimal(wb_reg_wb_data)}\n") - printf(p"regfile s0: ${(regfile(16.U))}\n") - printf(p"regfile s2: ${(regfile(18.U))}\n") - printf(p"regfile t0: ${(regfile(8.U))}\n") - printf(p"---------------\n") -} + // printf(p"---------------\n") + // printf(p"if_inst: 0x${Hexadecimal(if_inst)}\n") + // printf(p"if_reg_pc: 0x${Hexadecimal(if_reg_pc)}\n") + // printf(p"id_reg_pc: 0x${Hexadecimal(id_reg_pc)}\n") + // printf(p"id_reg_inst: 0x${Hexadecimal(id_reg_inst)}\n") + // printf(p"id_inst: 0x${Hexadecimal(id_inst)}\n") + // printf(p"id_rs_data: 0x${Hexadecimal(id_rs_data)}\n") + // printf(p"id_rt_data: 0x${Hexadecimal(id_rt_data)}\n") + // printf(p"id_rs_addr: 0x${Hexadecimal(id_rs_addr)}\n") + // printf(p"id_rt_addr: 0x${Hexadecimal(id_rt_addr)}\n") + // printf(p"id_rd_addr: 0x${Hexadecimal(id_rd_addr)}\n") + // printf(p"id_imm_i_sext: 0x${Hexadecimal(id_imm_i_sext)}\n") + // printf(p"exe_br_flg: 0x${Hexadecimal(exe_br_flg)}\n") + // printf(p"exe_jmp_flg: 0x${Hexadecimal(exe_jmp_flg)}\n") + // printf(p"id_rs_data_hazard: 0x${Hexadecimal(id_rs_data_hazard)}\n") + // printf(p"id_rt_data_hazard: 0x${Hexadecimal(id_rt_data_hazard)}\n") + // printf(p"stall_flg: 0x${Hexadecimal(stall_flg)}\n") + // printf(p"exe_reg_pc: 0x${Hexadecimal(exe_reg_pc)}\n") + // printf(p"exe_reg_op1_data: 0x${Hexadecimal(exe_reg_op1_data)}\n") + // printf(p"exe_reg_op2_data: 0x${Hexadecimal(exe_reg_op2_data)}\n") + // printf(p"exe_alu_out: 0x${Hexadecimal(exe_alu_out)}\n") + // printf(p"exe_br_target: 0x${Hexadecimal(exe_br_target)}\n") + // printf(p"exe_reg_wb_addr: 0x${Hexadecimal(exe_reg_wb_addr)}\n") + // printf(p"mem_reg_pc: 0x${Hexadecimal(mem_reg_pc)}\n") + // printf(p"mem_wb_data: 0x${Hexadecimal(mem_wb_data)}\n") + // printf(p"wb_reg_wb_addr: 0x${Hexadecimal(wb_reg_wb_addr)}\n") + // printf(p"wb_reg_wb_data: 0x${Hexadecimal(wb_reg_wb_data)}\n") + // printf(p"regfile s0: ${(regfile(16.U))}\n") + // printf(p"regfile s2: ${(regfile(18.U))}\n") + // printf(p"regfile t0: ${(regfile(8.U))}\n") + // printf(p"---------------\n") +} \ No newline at end of file diff --git a/src/main/scala/micore/Memory.scala b/src/main/scala/micore/Memory.scala index aaf7b97..b1a773f 100755 --- a/src/main/scala/micore/Memory.scala +++ b/src/main/scala/micore/Memory.scala @@ -16,35 +16,50 @@ class DmemPortIo extends Bundle { val wen = Input(Bool()) val wdata = Input(UInt(WORD_LEN.W)) } - +// TODO: 把Imem和Dmem分开方便改Cache class Memory extends Module { val io = IO(new Bundle { val imem = new ImemPortIo() val dmem = new DmemPortIo() }) - val mem = Mem(4096, UInt(8.W)) - - loadMemoryFromFileInline(mem, "src/hex/mem.hex") - - io.imem.inst := Cat( - mem(io.imem.addr + 3.U(WORD_LEN.W)), - mem(io.imem.addr + 2.U(WORD_LEN.W)), - mem(io.imem.addr + 1.U(WORD_LEN.W)), - mem(io.imem.addr) - ) - - io.dmem.rdata := Cat( - mem(io.dmem.addr + 3.U(WORD_LEN.W)), - mem(io.dmem.addr + 2.U(WORD_LEN.W)), - mem(io.dmem.addr + 1.U(WORD_LEN.W)), - mem(io.dmem.addr) - ) - - when(io.dmem.wen) { - mem(io.dmem.addr) := io.dmem.wdata(7, 0) - mem(io.dmem.addr + 1.U(WORD_LEN.W)) := io.dmem.wdata(15, 8) - mem(io.dmem.addr + 2.U(WORD_LEN.W)) := io.dmem.wdata(23, 16) - mem(io.dmem.addr + 3.U(WORD_LEN.W)) := io.dmem.wdata(31, 24) + val mem = Mem(64,UInt(WORD_LEN.W)) + loadMemoryFromFileInline(mem, "src/hex/mem.dat") + io.imem.inst := mem((io.imem.addr >> 2.U)(5, 0)) + io.dmem.rdata := mem((io.dmem.addr >> 2.U)(5, 0)) + when(io.dmem.wen){ + mem((io.dmem.addr >> 2.U)(5, 0)) := io.dmem.wdata } + // * 32'h20080001, // li $t0, 1 (addi $t0, $zero, 1) + // * 32'h20100000, // li $s0, 0 (addi $s0, $zero, 0) + // * 32'h20120006, // li $s2, 6 (addi $s2, $zero, 6) + + // * 32'h02088020, // add $s0, $s0, $t0 + // * 32'h21080001, // addi $t0, $t0, 1 + // * 32'h0112502A, // slt $t2, $t0, $s2 + // * 32'h1540FFFC, // bne $t2, $zero, loop (branch back to loop if $t2 != 0) + // val mem = Mem(256, UInt(8.W)) + + // loadMemoryFromFileInline(mem, "src/hex/mem.hex") + + // io.imem.inst := Cat( + // mem(io.imem.addr + 3.U(WORD_LEN.W)), + // mem(io.imem.addr + 2.U(WORD_LEN.W)), + // mem(io.imem.addr + 1.U(WORD_LEN.W)), + // mem(io.imem.addr) + // ) + + // io.dmem.rdata := Cat( + // mem(io.dmem.addr + 3.U(WORD_LEN.W)), + // mem(io.dmem.addr + 2.U(WORD_LEN.W)), + // mem(io.dmem.addr + 1.U(WORD_LEN.W)), + // mem(io.dmem.addr) + // ) + + // when(io.dmem.wen) { + // mem(io.dmem.addr) := io.dmem.wdata(7, 0) + // mem(io.dmem.addr + 1.U(WORD_LEN.W)) := io.dmem.wdata(15, 8) + // mem(io.dmem.addr + 2.U(WORD_LEN.W)) := io.dmem.wdata(23, 16) + // mem(io.dmem.addr + 3.U(WORD_LEN.W)) := io.dmem.wdata(31, 24) + // } } diff --git a/testbench.sv b/testbench.sv index d50f81d..d13ffef 100755 --- a/testbench.sv +++ b/testbench.sv @@ -19,28 +19,56 @@ // ////////////////////////////////////////////////////////////////////////////////// - -module tb_Top(); +module Top_tb; reg clock; reg reset; + + wire io_exit; - wire io_exit; - wire [3:0] io_anodes; - wire [6:0] io_segments; + wire [31:0] if_reg_pc; + wire [31:0] id_reg_pc; + wire [31:0] _memory_io_imem_inst; + wire [31:0] id_inst; + wire [31:0] id_reg_inst; + wire [31:0] exe_reg_op1_data; + wire [31:0] exe_reg_op2_data; + wire [31:0] exe_alu_out; + wire [3:0] exe_reg_exe_fun; + wire exe_br_flg; + wire stall_flg; + wire [31:0] mem_reg_alu_out; + wire [31:0] reg_r8; + wire [31:0] reg_r10; + wire [31:0] reg_r16; + wire [31:0] reg_r18; Top uut ( - .clock(clock), - .reset(reset), - .io_exit(io_exit), - .io_anodes(io_anodes), - .io_segments(io_segments) - ); + .clock (clock), + .reset (reset), + .io_exit (io_exit) + ); + + assign if_reg_pc = uut.core.if_reg_pc; + assign id_reg_pc = uut.core.id_reg_pc; + assign _memory_io_imem_inst = uut.core._memory_io_imem_inst; + assign id_inst = uut.core.id_inst; + assign id_reg_inst = uut.core.id_reg_inst; + assign exe_reg_op1_data = uut.core.exe_reg_op1_data; + assign exe_reg_op2_data = uut.core.exe_reg_op2_data; + assign exe_alu_out = uut.core.exe_alu_out; + assign exe_reg_exe_fun = uut.core.exe_reg_exe_fun; + assign exe_br_flg = uut.core.exe_br_flg; + assign stall_flg = uut.core.stall_flg; + assign mem_reg_alu_out = uut.core.mem_reg_alu_out; + assign reg_r8 = uut.core.regfile_ext.Memory[8]; + assign reg_r10 = uut.core.regfile_ext.Memory[10]; + assign reg_r16 = uut.core.regfile_ext.Memory[16]; + assign reg_r18 = uut.core.regfile_ext.Memory[18]; initial begin clock = 0; - forever - #5 clock = ~clock; // 10ns周期，50MHz时钟 + forever #5 clock = ~clock; // 10ns end initial begin @@ -49,68 +77,31 @@ module tb_Top(); reset = 0; #1000; - - $display("Simulation finished."); $finish; end always @(posedge clock) begin if (!reset) begin - // 打印当前PC值和指令 - if (uut.core.io_imem_inst !== 32'hx) begin - $display("Time: %0t | PC: %h | Instruction: %h", $time, uut.core.if_reg_pc, uut.core.io_imem_inst); - end - - // 打印ALU输入操作数和计算结果 - if (uut.core.exe_alu_out !== 32'hx) begin - $display("Time: %0t | ALU Op1: %h | ALU Op2: %h | ALU Result: %h | ALU Fun: %h", - $time, uut.core.exe_reg_op1_data, uut.core.exe_reg_op2_data, - uut.core.exe_alu_out, uut.core.exe_reg_exe_fun); - end - - // 打印寄存器文件读写操作 - if (uut.core.regfile_ext.W0_en && uut.core.regfile_ext.W0_addr !== 5'hx) begin - $display("Time: %0t | RegFile Write | Addr: %h | Data: %h", - $time, uut.core.regfile_ext.W0_addr, uut.core.regfile_ext.W0_data); - end - if (uut.core.regfile_ext.R0_en && uut.core.regfile_ext.R0_addr !== 5'hx) begin - $display("Time: %0t | RegFile Read R0 | Addr: %h | Data: %h", - $time, uut.core.regfile_ext.R0_addr, uut.core.regfile_ext.R0_data); - end - if (uut.core.regfile_ext.R1_en && uut.core.regfile_ext.R1_addr !== 5'hx) begin - $display("Time: %0t | RegFile Read R1 | Addr: %h | Data: %h", - $time, uut.core.regfile_ext.R1_addr, uut.core.regfile_ext.R1_data); - end - - // 打印内存读写操作 - if (uut.memory.io_dmem_wen) begin - $display("Time: %0t | Memory Write | Addr: %h | Data: %h", - $time, uut.memory.io_dmem_addr, uut.memory.io_dmem_wdata); - end - if (uut.memory.io_dmem_rdata !== 32'hx) begin - $display("Time: %0t | Memory Read | Addr: %h | Data: %h", - $time, uut.memory.io_dmem_addr, uut.memory.io_dmem_rdata); - end - - // 打印流水线各阶段的状态 - $display("Time: %0t | IF Stage | PC: %h | Instruction: %h", - $time, uut.core.if_reg_pc, uut.core.io_imem_inst); - $display("Time: %0t | ID Stage | PC: %h | Instruction: %h | Op1: %h | Op2: %h", - $time, uut.core.id_reg_pc, uut.core.id_reg_inst, - uut.core.exe_reg_op1_data, uut.core.exe_reg_op2_data); - $display("Time: %0t | EXE Stage | PC: %h | ALU Result: %h", - $time, uut.core.exe_reg_pc, uut.core.exe_alu_out); - $display("Time: %0t | MEM Stage | PC: %h | Mem Addr: %h | Mem Data: %h", - $time, uut.core.mem_reg_pc, uut.memory.io_dmem_addr, uut.memory.io_dmem_rdata); - $display("Time: %0t | WB Stage | PC: %h | WB Addr: %h | WB Data: %h", - $time, uut.core.wb_reg_wb_addr, uut.core.wb_reg_wb_addr, uut.core.wb_reg_wb_data); + $display("Cycle: %0d", $time / 10); + $display("if_reg_pc: %h", if_reg_pc); + $display("id_reg_pc: %h", id_reg_pc); + $display("if_inst: %h", _memory_io_imem_inst); + $display("id_inst: %h", id_inst); + $display("id_reg_inst: %h", id_reg_inst); + $display("exe_reg_op1_data: %h", exe_reg_op1_data); + $display("exe_reg_op2_data: %h", exe_reg_op2_data); + $display("exe_reg_exe_fun: %h", exe_reg_exe_fun); + $display("exe_alu_out: %h", exe_alu_out); + $display("exe_br_flg: %h", exe_br_flg); + $display("stall_flg: %h", stall_flg); + $display("mem_reg_alu_out: %h", mem_reg_alu_out); + $display("Registers:"); + $display("R%0d: %h", 8, reg_r8); + $display("R%0d: %h", 10, reg_r10); + $display("R%0d: %h", 16, reg_r16); + $display("R%0d: %h", 18, reg_r18); + $display("-----------------------------"); end end - initial begin - $dumpfile("waveform.vcd"); - $dumpvars(0, tb_Top); // 记录所有信号 - end - -endmodule - +endmodule \ No newline at end of file