362 lines
13 KiB
C++
362 lines
13 KiB
C++
#ifndef RISCV64_LLIR_H
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#define RISCV64_LLIR_H
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#include "IR.h" // 确保包含了您自己的IR头文件
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#include <string>
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#include <iostream>
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#include <vector>
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#include <memory>
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#include <cstdint>
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#include <map>
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// 前向声明，避免循环引用
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namespace sysy {
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class Function;
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class RISCv64ISel;
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}
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namespace sysy {
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// 物理寄存器定义
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enum class PhysicalReg {
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// --- 特殊功能寄存器 ---
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ZERO, RA, SP, GP, TP,
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// --- 整数寄存器 (按调用约定分组) ---
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// 临时寄存器 (调用者保存)
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T0, T1, T2, T3, T4, T5, T6,
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// 保存寄存器 (被调用者保存)
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S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11,
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// 参数/返回值寄存器 (调用者保存)
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A0, A1, A2, A3, A4, A5, A6, A7,
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// --- 浮点寄存器 ---
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F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11,
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F12, F13, F14, F15, F16, F17, F18, F19, F20, F21,
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F22, F23, F24, F25, F26, F27, F28, F29, F30, F31,
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// 用于内部表示物理寄存器在干扰图中的节点ID（一个简单的特殊ID，确保不与vreg_counter冲突）
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// 假设 vreg_counter 不会达到这么大的值
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PHYS_REG_START_ID = 1000000,
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PHYS_REG_END_ID = PHYS_REG_START_ID + 320, // 预留足够的空间
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INVALID, ///< 无效寄存器标记
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};
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// RISC-V 指令操作码枚举
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enum class RVOpcodes {
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// 算术指令
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ADD, ADDI, ADDW, ADDIW, SUB, SUBW, MUL, MULW, MULH, DIV, DIVW, REM, REMW,
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// 逻辑指令
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XOR, XORI, OR, ORI, AND, ANDI,
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// 移位指令
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SLL, SLLI, SLLW, SLLIW, SRL, SRLI, SRLW, SRLIW, SRA, SRAI, SRAW, SRAIW,
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// 比较指令
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SLT, SLTI, SLTU, SLTIU,
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// 内存访问指令
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LW, LH, LB, LWU, LHU, LBU, SW, SH, SB, LD, SD,
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// 控制流指令
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J, JAL, JALR, RET,
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BEQ, BNE, BLT, BGE, BLTU, BGEU,
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// 伪指令
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LI, LA, MV, NEG, NEGW, SEQZ, SNEZ,
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// 函数调用
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CALL,
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// 特殊标记，非指令
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LABEL,
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// 浮点指令 (RISC-V 'F' 扩展)
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// 浮点加载与存储
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FLW, // flw rd, offset(rs1)
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FSW, // fsw rs2, offset(rs1)
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FLD, // fld rd, offset(rs1)
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FSD, // fsd rs2, offset(rs1)
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// 浮点算术运算 (单精度)
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FADD_S, // fadd.s rd, rs1, rs2
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FSUB_S, // fsub.s rd, rs1, rs2
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FMUL_S, // fmul.s rd, rs1, rs2
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FDIV_S, // fdiv.s rd, rs1, rs2
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FMADD_S, // fmadd.s rd, rs1, rs2, rs3
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// 浮点比较 (单精度)
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FEQ_S, // feq.s rd, rs1, rs2 (结果写入整数寄存器rd)
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FLT_S, // flt.s rd, rs1, rs2 (less than)
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FLE_S, // fle.s rd, rs1, rs2 (less than or equal)
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// 浮点转换
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FCVT_S_W, // fcvt.s.w rd, rs1 (有符号整数 -> 单精度浮点)
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FCVT_W_S, // fcvt.w.s rd, rs1 (单精度浮点 -> 有符号整数)
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FCVT_W_S_RTZ, // fcvt.w.s rd, rs1, rtz (使用向零截断模式)
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// 浮点传送/移动
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FMV_S, // fmv.s rd, rs1 (浮点寄存器之间)
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FMV_W_X, // fmv.w.x rd, rs1 (整数寄存器位模式 -> 浮点寄存器)
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FMV_X_W, // fmv.x.w rd, rs1 (浮点寄存器位模式 -> 整数寄存器)
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FNEG_S, // fneg.s rd, rs (浮点取负)
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// 浮点控制状态寄存器 (CSR)
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FSRMI, // fsrmi rd, imm (设置舍入模式立即数)
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// 伪指令
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FRAME_LOAD_W, // 从栈帧加载 32位 Word (对应 lw)
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FRAME_LOAD_D, // 从栈帧加载 64位 Doubleword (对应 ld)
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FRAME_STORE_W, // 保存 32位 Word 到栈帧 (对应 sw)
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FRAME_STORE_D, // 保存 64位 Doubleword 到栈帧 (对应 sd)
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FRAME_LOAD_F, // 从栈帧加载单精度浮点数
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FRAME_STORE_F, // 将单精度浮点数存入栈帧
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FRAME_ADDR, // 获取栈帧变量的地址
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PSEUDO_KEEPALIVE, // 保持寄存器活跃，防止优化器删除
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};
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inline bool isGPR(PhysicalReg reg) {
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return reg >= PhysicalReg::ZERO && reg <= PhysicalReg::T6;
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}
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// 判断一个物理寄存器是否是浮点寄存器 (FPR)
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inline bool isFPR(PhysicalReg reg) {
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return reg >= PhysicalReg::F0 && reg <= PhysicalReg::F31;
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}
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// 获取所有调用者保存的整数寄存器 (t0-t6, a0-a7)
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inline const std::vector<PhysicalReg>& getCallerSavedIntRegs() {
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static const std::vector<PhysicalReg> regs = {
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PhysicalReg::T0, PhysicalReg::T1, PhysicalReg::T2, PhysicalReg::T3,
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PhysicalReg::T4, PhysicalReg::T5, PhysicalReg::T6,
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PhysicalReg::A0, PhysicalReg::A1, PhysicalReg::A2, PhysicalReg::A3,
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PhysicalReg::A4, PhysicalReg::A5, PhysicalReg::A6, PhysicalReg::A7
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};
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return regs;
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}
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// 获取所有被调用者保存的整数寄存器 (s0-s11)
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inline const std::vector<PhysicalReg>& getCalleeSavedIntRegs() {
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static const std::vector<PhysicalReg> regs = {
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PhysicalReg::S0, PhysicalReg::S1, PhysicalReg::S2, PhysicalReg::S3,
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PhysicalReg::S4, PhysicalReg::S5, PhysicalReg::S6, PhysicalReg::S7,
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PhysicalReg::S8, PhysicalReg::S9, PhysicalReg::S10, PhysicalReg::S11
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};
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return regs;
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}
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// 获取所有调用者保存的浮点寄存器 (ft0-ft11, fa0-fa7)
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inline const std::vector<PhysicalReg>& getCallerSavedFpRegs() {
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static const std::vector<PhysicalReg> regs = {
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PhysicalReg::F0, PhysicalReg::F1, PhysicalReg::F2, PhysicalReg::F3,
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PhysicalReg::F4, PhysicalReg::F5, PhysicalReg::F6, PhysicalReg::F7,
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PhysicalReg::F8, PhysicalReg::F9, PhysicalReg::F10, PhysicalReg::F11, // ft0-ft11 和 fa0-fa7 在标准ABI中重叠
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PhysicalReg::F12, PhysicalReg::F13, PhysicalReg::F14, PhysicalReg::F15,
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PhysicalReg::F16, PhysicalReg::F17
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};
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return regs;
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}
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// 获取所有被调用者保存的浮点寄存器 (fs0-fs11)
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inline const std::vector<PhysicalReg>& getCalleeSavedFpRegs() {
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static const std::vector<PhysicalReg> regs = {
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PhysicalReg::F18, PhysicalReg::F19, PhysicalReg::F20, PhysicalReg::F21,
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PhysicalReg::F22, PhysicalReg::F23, PhysicalReg::F24, PhysicalReg::F25,
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PhysicalReg::F26, PhysicalReg::F27, PhysicalReg::F28, PhysicalReg::F29,
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PhysicalReg::F30, PhysicalReg::F31
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};
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return regs;
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}
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class MachineOperand;
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class RegOperand;
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class ImmOperand;
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class LabelOperand;
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class MemOperand;
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class MachineInstr;
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class MachineBasicBlock;
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class MachineFunction;
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// 操作数基类
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class MachineOperand {
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public:
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enum OperandKind { KIND_REG, KIND_IMM, KIND_LABEL, KIND_MEM };
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MachineOperand(OperandKind kind) : kind(kind) {}
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virtual ~MachineOperand() = default;
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OperandKind getKind() const { return kind; }
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private:
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OperandKind kind;
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};
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// 寄存器操作数
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class RegOperand : public MachineOperand {
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public:
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// 构造虚拟寄存器
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RegOperand(unsigned vreg_num)
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: MachineOperand(KIND_REG), vreg_num(vreg_num), is_virtual(true) {}
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// 构造物理寄存器
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RegOperand(PhysicalReg preg)
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: MachineOperand(KIND_REG), preg(preg), is_virtual(false) {}
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bool isVirtual() const { return is_virtual; }
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unsigned getVRegNum() const { return vreg_num; }
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PhysicalReg getPReg() const { return preg; }
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void setPReg(PhysicalReg new_preg) {
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preg = new_preg;
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is_virtual = false;
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}
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void setVRegNum(unsigned new_vreg_num) {
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vreg_num = new_vreg_num;
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is_virtual = true; // 确保设置vreg时，操作数状态正确
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}
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private:
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unsigned vreg_num = 0;
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PhysicalReg preg = PhysicalReg::ZERO;
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bool is_virtual;
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};
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// 立即数操作数
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class ImmOperand : public MachineOperand {
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public:
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ImmOperand(int64_t value) : MachineOperand(KIND_IMM), value(value) {}
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int64_t getValue() const { return value; }
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private:
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int64_t value;
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};
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// 标签操作数
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class LabelOperand : public MachineOperand {
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public:
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LabelOperand(const std::string& name) : MachineOperand(KIND_LABEL), name(name) {}
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const std::string& getName() const { return name; }
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private:
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std::string name;
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};
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// 内存操作数, 表示 offset(base_reg)
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class MemOperand : public MachineOperand {
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public:
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MemOperand(std::unique_ptr<RegOperand> base, std::unique_ptr<ImmOperand> offset)
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: MachineOperand(KIND_MEM), base(std::move(base)), offset(std::move(offset)) {}
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RegOperand* getBase() const { return base.get(); }
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ImmOperand* getOffset() const { return offset.get(); }
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private:
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std::unique_ptr<RegOperand> base;
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std::unique_ptr<ImmOperand> offset;
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};
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// 机器指令
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class MachineInstr {
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public:
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MachineInstr(RVOpcodes opcode) : opcode(opcode) {}
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RVOpcodes getOpcode() const { return opcode; }
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const std::vector<std::unique_ptr<MachineOperand>>& getOperands() const { return operands; }
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std::vector<std::unique_ptr<MachineOperand>>& getOperands() { return operands; }
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void addOperand(std::unique_ptr<MachineOperand> operand) {
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operands.push_back(std::move(operand));
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}
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/**
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* @brief （为紧急溢出模式添加）将指令中所有对特定虚拟寄存器的引用替换为指定的物理寄存器。
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* * @param old_vreg 需要被替换的虚拟寄存器号。
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* @param preg 用于替换的物理寄存器。
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*/
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void replaceVRegWithPReg(unsigned old_vreg, PhysicalReg preg);
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/**
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* @brief （为常规溢出模式添加）根据提供的映射表，重映射指令中的虚拟寄存器。
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* * @param use_remap 一个从旧vreg到新vreg的映射，用于指令的use操作数。
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* @param def_remap 一个从旧vreg到新vreg的映射，用于指令的def操作数。
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*/
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void remapVRegs(const std::map<unsigned, unsigned>& use_remap, const std::map<unsigned, unsigned>& def_remap);
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private:
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RVOpcodes opcode;
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std::vector<std::unique_ptr<MachineOperand>> operands;
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};
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// 机器基本块
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class MachineBasicBlock {
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public:
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MachineBasicBlock(const std::string& name, MachineFunction* parent)
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: name(name), parent(parent) {}
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const std::string& getName() const { return name; }
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MachineFunction* getParent() const { return parent; }
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const std::vector<std::unique_ptr<MachineInstr>>& getInstructions() const { return instructions; }
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std::vector<std::unique_ptr<MachineInstr>>& getInstructions() { return instructions; }
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void addInstruction(std::unique_ptr<MachineInstr> instr) {
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instructions.push_back(std::move(instr));
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}
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std::vector<MachineBasicBlock*> successors;
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std::vector<MachineBasicBlock*> predecessors;
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private:
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std::string name;
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std::vector<std::unique_ptr<MachineInstr>> instructions;
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MachineFunction* parent;
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};
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// 栈帧信息
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struct StackFrameInfo {
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int locals_size = 0; // 仅为AllocaInst分配的大小
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int locals_end_offset = 0; // 记录局部变量分配结束后的偏移量(相对于s0，为负)
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int spill_size = 0; // 仅为溢出分配的大小
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int total_size = 0; // 总大小
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int callee_saved_size = 0; // 保存寄存器的大小
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std::map<unsigned, int> alloca_offsets; // <AllocaInst的vreg, 栈偏移>
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std::map<unsigned, int> spill_offsets; // <溢出vreg, 栈偏移>
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std::set<PhysicalReg> used_callee_saved_regs; // 使用的保存寄存器
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std::map<unsigned, PhysicalReg> vreg_to_preg_map; // RegAlloc最终的分配结果
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std::vector<PhysicalReg> callee_saved_regs_to_store; // 已排序的、需要存取的被调用者保存寄存器
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};
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// 机器函数
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class MachineFunction {
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public:
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MachineFunction(Function* func, RISCv64ISel* isel) : F(func), name(func->getName()), isel(isel) {}
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Function* getFunc() const { return F; }
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RISCv64ISel* getISel() const { return isel; }
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const std::string& getName() const { return name; }
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StackFrameInfo& getFrameInfo() { return frame_info; }
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const std::vector<std::unique_ptr<MachineBasicBlock>>& getBlocks() const { return blocks; }
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std::vector<std::unique_ptr<MachineBasicBlock>>& getBlocks() { return blocks; }
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void dumpStackFrameInfo(std::ostream& os = std::cerr) const;
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void addBlock(std::unique_ptr<MachineBasicBlock> block) {
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blocks.push_back(std::move(block));
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}
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void addProtectedArgumentVReg(unsigned vreg) {
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protected_argument_vregs.insert(vreg);
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}
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const std::set<unsigned>& getProtectedArgumentVRegs() const {
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return protected_argument_vregs;
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}
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private:
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Function* F;
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RISCv64ISel* isel; // 指向创建它的ISel，用于获取vreg映射等信息
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std::string name;
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std::vector<std::unique_ptr<MachineBasicBlock>> blocks;
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StackFrameInfo frame_info;
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std::set<unsigned> protected_argument_vregs;
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};
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inline bool isMemoryOp(RVOpcodes opcode) {
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switch (opcode) {
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case RVOpcodes::LB: case RVOpcodes::LH: case RVOpcodes::LW: case RVOpcodes::LD:
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case RVOpcodes::LBU: case RVOpcodes::LHU: case RVOpcodes::LWU:
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case RVOpcodes::SB: case RVOpcodes::SH: case RVOpcodes::SW: case RVOpcodes::SD:
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case RVOpcodes::FLW:
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case RVOpcodes::FSW:
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case RVOpcodes::FLD:
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case RVOpcodes::FSD:
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return true;
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default:
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return false;
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}
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}
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void getInstrUseDef(const MachineInstr* instr, std::set<unsigned>& use, std::set<unsigned>& def);
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} // namespace sysy
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#endif // RISCV64_LLIR_H
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