322 lines
13 KiB
C++
322 lines
13 KiB
C++
#include "RISCv64RegAlloc.h"
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#include "RISCv64ISel.h"
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#include <algorithm>
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#include <vector>
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namespace sysy {
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RISCv64RegAlloc::RISCv64RegAlloc(MachineFunction* mfunc) : MFunc(mfunc) {
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allocable_int_regs = {
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PhysicalReg::T0, PhysicalReg::T1, PhysicalReg::T2, PhysicalReg::T3,
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PhysicalReg::T4, PhysicalReg::T5, PhysicalReg::T6,
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PhysicalReg::A0, PhysicalReg::A1, PhysicalReg::A2, PhysicalReg::A3,
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PhysicalReg::A4, PhysicalReg::A5, PhysicalReg::A6, PhysicalReg::A7,
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PhysicalReg::S0, PhysicalReg::S1, PhysicalReg::S2, PhysicalReg::S3,
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PhysicalReg::S4, PhysicalReg::S5, PhysicalReg::S6, PhysicalReg::S7,
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PhysicalReg::S8, PhysicalReg::S9, PhysicalReg::S10, PhysicalReg::S11,
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};
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}
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void RISCv64RegAlloc::run() {
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eliminateFrameIndices();
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analyzeLiveness();
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buildInterferenceGraph();
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colorGraph();
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rewriteFunction();
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}
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void RISCv64RegAlloc::eliminateFrameIndices() {
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StackFrameInfo& frame_info = MFunc->getFrameInfo();
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int current_offset = 0;
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Function* F = MFunc->getFunc();
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RISCv64ISel* isel = MFunc->getISel();
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for (auto& bb : F->getBasicBlocks()) {
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for (auto& inst : bb->getInstructions()) {
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if (auto alloca = dynamic_cast<AllocaInst*>(inst.get())) {
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int size = 4;
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if (!alloca->getDims().empty()) {
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int num_elements = 1;
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for (const auto& dim_use : alloca->getDims()) {
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if (auto const_dim = dynamic_cast<ConstantValue*>(dim_use->getValue())) {
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num_elements *= const_dim->getInt();
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}
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}
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size *= num_elements;
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}
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current_offset += size;
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unsigned alloca_vreg = isel->getVReg(alloca);
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frame_info.alloca_offsets[alloca_vreg] = -current_offset;
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}
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}
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}
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frame_info.locals_size = current_offset;
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for (auto& mbb : MFunc->getBlocks()) {
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std::vector<std::unique_ptr<MachineInstr>> new_instructions;
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for (auto& instr_ptr : mbb->getInstructions()) {
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if (instr_ptr->getOpcode() == RVOpcodes::FRAME_LOAD) {
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auto& operands = instr_ptr->getOperands();
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unsigned dest_vreg = static_cast<RegOperand*>(operands[0].get())->getVRegNum();
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unsigned alloca_vreg = static_cast<RegOperand*>(operands[1].get())->getVRegNum();
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int offset = frame_info.alloca_offsets.at(alloca_vreg);
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auto addr_vreg = isel->getNewVReg();
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auto addi = std::make_unique<MachineInstr>(RVOpcodes::ADDI);
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addi->addOperand(std::make_unique<RegOperand>(addr_vreg));
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addi->addOperand(std::make_unique<RegOperand>(PhysicalReg::S0));
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addi->addOperand(std::make_unique<ImmOperand>(offset));
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new_instructions.push_back(std::move(addi));
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auto lw = std::make_unique<MachineInstr>(RVOpcodes::LW);
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lw->addOperand(std::make_unique<RegOperand>(dest_vreg));
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lw->addOperand(std::make_unique<MemOperand>(
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std::make_unique<RegOperand>(addr_vreg),
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std::make_unique<ImmOperand>(0)));
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new_instructions.push_back(std::move(lw));
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} else if (instr_ptr->getOpcode() == RVOpcodes::FRAME_STORE) {
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auto& operands = instr_ptr->getOperands();
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unsigned src_vreg = static_cast<RegOperand*>(operands[0].get())->getVRegNum();
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unsigned alloca_vreg = static_cast<RegOperand*>(operands[1].get())->getVRegNum();
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int offset = frame_info.alloca_offsets.at(alloca_vreg);
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auto addr_vreg = isel->getNewVReg();
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auto addi = std::make_unique<MachineInstr>(RVOpcodes::ADDI);
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addi->addOperand(std::make_unique<RegOperand>(addr_vreg));
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addi->addOperand(std::make_unique<RegOperand>(PhysicalReg::S0));
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addi->addOperand(std::make_unique<ImmOperand>(offset));
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new_instructions.push_back(std::move(addi));
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auto sw = std::make_unique<MachineInstr>(RVOpcodes::SW);
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sw->addOperand(std::make_unique<RegOperand>(src_vreg));
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sw->addOperand(std::make_unique<MemOperand>(
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std::make_unique<RegOperand>(addr_vreg),
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std::make_unique<ImmOperand>(0)));
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new_instructions.push_back(std::move(sw));
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} else {
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new_instructions.push_back(std::move(instr_ptr));
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}
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}
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mbb->getInstructions() = std::move(new_instructions);
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}
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}
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void RISCv64RegAlloc::getInstrUseDef(MachineInstr* instr, LiveSet& use, LiveSet& def) {
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bool is_def = true;
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auto opcode = instr->getOpcode();
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// 预定义def和use规则
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if (opcode == RVOpcodes::SW || opcode == RVOpcodes::SD ||
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opcode == RVOpcodes::BEQ || opcode == RVOpcodes::BNE ||
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opcode == RVOpcodes::BLT || opcode == RVOpcodes::BGE ||
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opcode == RVOpcodes::RET || opcode == RVOpcodes::J) {
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is_def = false;
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}
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if (opcode == RVOpcodes::CALL) {
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// CALL会杀死所有调用者保存寄存器，这是一个简化处理
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// 同时也使用了传入a0-a7的参数
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}
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for (const auto& op : instr->getOperands()) {
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if (op->getKind() == MachineOperand::KIND_REG) {
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auto reg_op = static_cast<RegOperand*>(op.get());
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if (reg_op->isVirtual()) {
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if (is_def) {
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def.insert(reg_op->getVRegNum());
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is_def = false;
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} else {
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use.insert(reg_op->getVRegNum());
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}
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}
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} else if (op->getKind() == MachineOperand::KIND_MEM) {
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auto mem_op = static_cast<MemOperand*>(op.get());
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if (mem_op->getBase()->isVirtual()) {
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use.insert(mem_op->getBase()->getVRegNum());
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}
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}
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}
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}
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void RISCv64RegAlloc::analyzeLiveness() {
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bool changed = true;
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while (changed) {
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changed = false;
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for (auto it = MFunc->getBlocks().rbegin(); it != MFunc->getBlocks().rend(); ++it) {
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auto& mbb = *it;
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LiveSet live_out;
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for (auto succ : mbb->successors) {
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if (!succ->getInstructions().empty()) {
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auto first_instr = succ->getInstructions().front().get();
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if (live_in_map.count(first_instr)) {
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live_out.insert(live_in_map.at(first_instr).begin(), live_in_map.at(first_instr).end());
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}
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}
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}
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for (auto instr_it = mbb->getInstructions().rbegin(); instr_it != mbb->getInstructions().rend(); ++instr_it) {
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MachineInstr* instr = instr_it->get();
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LiveSet old_live_in = live_in_map[instr];
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live_out_map[instr] = live_out;
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LiveSet use, def;
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getInstrUseDef(instr, use, def);
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LiveSet live_in = use;
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LiveSet diff = live_out;
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for (auto vreg : def) {
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diff.erase(vreg);
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}
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live_in.insert(diff.begin(), diff.end());
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live_in_map[instr] = live_in;
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live_out = live_in;
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if (live_in_map[instr] != old_live_in) {
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changed = true;
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}
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}
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}
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}
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}
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void RISCv64RegAlloc::buildInterferenceGraph() {
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std::set<unsigned> all_vregs;
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for (auto& mbb : MFunc->getBlocks()) {
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for(auto& instr : mbb->getInstructions()) {
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LiveSet use, def;
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getInstrUseDef(instr.get(), use, def);
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for(auto u : use) all_vregs.insert(u);
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for(auto d : def) all_vregs.insert(d);
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}
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}
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for (auto vreg : all_vregs) { interference_graph[vreg] = {}; }
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for (auto& mbb : MFunc->getBlocks()) {
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for (auto& instr : mbb->getInstructions()) {
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LiveSet def, use;
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getInstrUseDef(instr.get(), use, def);
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const LiveSet& live_out = live_out_map.at(instr.get());
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for (unsigned d : def) {
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for (unsigned l : live_out) {
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if (d != l) {
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interference_graph[d].insert(l);
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interference_graph[l].insert(d);
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}
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}
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}
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}
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}
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}
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void RISCv64RegAlloc::colorGraph() {
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std::vector<unsigned> sorted_vregs;
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for (auto const& [vreg, neighbors] : interference_graph) {
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sorted_vregs.push_back(vreg);
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}
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std::sort(sorted_vregs.begin(), sorted_vregs.end(), [&](unsigned a, unsigned b) {
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return interference_graph[a].size() > interference_graph[b].size();
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});
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for (unsigned vreg : sorted_vregs) {
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std::set<PhysicalReg> used_colors;
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for (unsigned neighbor : interference_graph.at(vreg)) {
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if (color_map.count(neighbor)) {
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used_colors.insert(color_map.at(neighbor));
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}
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}
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bool colored = false;
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for (PhysicalReg preg : allocable_int_regs) {
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if (used_colors.find(preg) == used_colors.end()) {
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color_map[vreg] = preg;
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colored = true;
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break;
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}
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}
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if (!colored) {
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spilled_vregs.insert(vreg);
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}
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}
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}
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void RISCv64RegAlloc::rewriteFunction() {
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StackFrameInfo& frame_info = MFunc->getFrameInfo();
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int current_offset = frame_info.locals_size;
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for (unsigned vreg : spilled_vregs) {
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current_offset += 4;
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frame_info.spill_offsets[vreg] = -current_offset;
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}
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frame_info.spill_size = current_offset - frame_info.locals_size;
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for (auto& mbb : MFunc->getBlocks()) {
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std::vector<std::unique_ptr<MachineInstr>> new_instructions;
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for (auto& instr_ptr : mbb->getInstructions()) {
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LiveSet use, def;
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getInstrUseDef(instr_ptr.get(), use, def);
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for (unsigned vreg : use) {
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if (spilled_vregs.count(vreg)) {
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int offset = frame_info.spill_offsets.at(vreg);
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auto load = std::make_unique<MachineInstr>(RVOpcodes::LW);
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load->addOperand(std::make_unique<RegOperand>(vreg));
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load->addOperand(std::make_unique<MemOperand>(
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std::make_unique<RegOperand>(PhysicalReg::S0),
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std::make_unique<ImmOperand>(offset)
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));
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new_instructions.push_back(std::move(load));
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}
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}
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new_instructions.push_back(std::move(instr_ptr));
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for (unsigned vreg : def) {
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if (spilled_vregs.count(vreg)) {
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int offset = frame_info.spill_offsets.at(vreg);
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auto store = std::make_unique<MachineInstr>(RVOpcodes::SW);
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store->addOperand(std::make_unique<RegOperand>(vreg));
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store->addOperand(std::make_unique<MemOperand>(
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std::make_unique<RegOperand>(PhysicalReg::S0),
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std::make_unique<ImmOperand>(offset)
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));
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new_instructions.push_back(std::move(store));
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}
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}
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}
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mbb->getInstructions() = std::move(new_instructions);
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}
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for (auto& mbb : MFunc->getBlocks()) {
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for (auto& instr_ptr : mbb->getInstructions()) {
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for (auto& op_ptr : instr_ptr->getOperands()) {
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if(op_ptr->getKind() == MachineOperand::KIND_REG) {
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auto reg_op = static_cast<RegOperand*>(op_ptr.get());
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if (reg_op->isVirtual()) {
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unsigned vreg = reg_op->getVRegNum();
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if (color_map.count(vreg)) {
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reg_op->setPReg(color_map.at(vreg));
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} else if (spilled_vregs.count(vreg)) {
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reg_op->setPReg(PhysicalReg::T6); // 溢出统一用t6
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}
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}
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} else if (op_ptr->getKind() == MachineOperand::KIND_MEM) {
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auto mem_op = static_cast<MemOperand*>(op_ptr.get());
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auto base_reg_op = mem_op->getBase();
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if(base_reg_op->isVirtual()){
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unsigned vreg = base_reg_op->getVRegNum();
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if(color_map.count(vreg)) {
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base_reg_op->setPReg(color_map.at(vreg));
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} else if (spilled_vregs.count(vreg)) {
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base_reg_op->setPReg(PhysicalReg::T6);
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}
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}
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}
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}
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}
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}
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}
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} // namespace sysy
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