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64
kernel/memlayout.h
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64
kernel/memlayout.h
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// Physical memory layout
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// qemu -machine virt is set up like this,
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// based on qemu's hw/riscv/virt.c:
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//
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// 00001000 -- boot ROM, provided by qemu
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// 02000000 -- CLINT
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// 0C000000 -- PLIC
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// 10000000 -- uart0
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// 10001000 -- virtio disk
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// 80000000 -- boot ROM jumps here in machine mode
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// -kernel loads the kernel here
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// unused RAM after 80000000.
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// the kernel uses physical memory thus:
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// 80000000 -- entry.S, then kernel text and data
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// end -- start of kernel page allocation area
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// PHYSTOP -- end RAM used by the kernel
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// qemu puts UART registers here in physical memory.
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#define UART0 0x10000000L
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#define UART0_IRQ 10
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// virtio mmio interface
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#define VIRTIO0 0x10001000
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#define VIRTIO0_IRQ 1
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// core local interruptor (CLINT), which contains the timer.
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#define CLINT 0x2000000L
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#define CLINT_MTIMECMP(hartid) (CLINT + 0x4000 + 8*(hartid))
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#define CLINT_MTIME (CLINT + 0xBFF8) // cycles since boot.
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// qemu puts platform-level interrupt controller (PLIC) here.
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#define PLIC 0x0c000000L
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#define PLIC_PRIORITY (PLIC + 0x0)
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#define PLIC_PENDING (PLIC + 0x1000)
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#define PLIC_SENABLE(hart) (PLIC + 0x2080 + (hart)*0x100)
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#define PLIC_SPRIORITY(hart) (PLIC + 0x201000 + (hart)*0x2000)
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#define PLIC_SCLAIM(hart) (PLIC + 0x201004 + (hart)*0x2000)
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// the kernel expects there to be RAM
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// for use by the kernel and user pages
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// from physical address 0x80000000 to PHYSTOP.
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#define KERNBASE 0x80000000L
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#define PHYSTOP (KERNBASE + 128*1024*1024)
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// map the trampoline page to the highest address,
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// in both user and kernel space.
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#define TRAMPOLINE (MAXVA - PGSIZE)
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// map kernel stacks beneath the trampoline,
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// each surrounded by invalid guard pages.
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#define KSTACK(p) (TRAMPOLINE - ((p)+1)* 2*PGSIZE)
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// User memory layout.
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// Address zero first:
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// text
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// original data and bss
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// fixed-size stack
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// expandable heap
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// ...
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// TRAPFRAME (p->trapframe, used by the trampoline)
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// TRAMPOLINE (the same page as in the kernel)
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#define TRAPFRAME (TRAMPOLINE - PGSIZE)
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