Fix typos

This commit is contained in:
Jerry Zhao
2023-04-19 19:52:46 -07:00
parent cf87641031
commit 104a5299a9
4 changed files with 17 additions and 12 deletions

View File

@@ -156,7 +156,12 @@ Loadmem files should be ELF files. In the most common use case, this can be the
.. code-block:: shell .. code-block:: shell
make run-binary BINARY=test.riscv LOADMEM=test.riscv make run-binary BINARY=test.riscv LOADMEM=test.riscv
make run-binary BINART=test.riscv LOADMEM=1
Usually the ``LOADMEM`` ELF is the same as the ``BINARY`` ELF, so ``LOADMEM=1`` can be used as a shortcut.
.. code-block:: shell
make run-binary BINARY=test.riscv LOADMEM=1
Generating Waveforms Generating Waveforms
----------------------- -----------------------

View File

@@ -185,7 +185,7 @@ class WithBlackBoxSimMem(additionalLatency: Int = 0) extends OverrideHarnessBind
(system: CanHaveMasterAXI4MemPort, th: HasHarnessSignalReferences, ports: Seq[ClockedAndResetIO[AXI4Bundle]]) => { (system: CanHaveMasterAXI4MemPort, th: HasHarnessSignalReferences, ports: Seq[ClockedAndResetIO[AXI4Bundle]]) => {
val p: Parameters = chipyard.iobinders.GetSystemParameters(system) val p: Parameters = chipyard.iobinders.GetSystemParameters(system)
(ports zip system.memAXI4Node.edges.in).map { case (port, edge) => (ports zip system.memAXI4Node.edges.in).map { case (port, edge) =>
// TODO FIX: This currently makes each SimDRAM contian the entire memory space // TODO FIX: This currently makes each SimDRAM contain the entire memory space
val memSize = p(ExtMem).get.master.size val memSize = p(ExtMem).get.master.size
val memBase = p(ExtMem).get.master.base val memBase = p(ExtMem).get.master.base
val lineSize = p(CacheBlockBytes) val lineSize = p(CacheBlockBytes)

View File

@@ -7,18 +7,18 @@ usage() {
echo "" echo ""
echo "Options" echo "Options"
echo " --help -h : Display this message" echo " --help -h : Display this message"
echo " -n <n> : Mumber of harts" echo " -n <n> : Number of harts"
echo " -b <elf> : Binary to run in spike" echo " -b <elf> : Binary to run in spike"
echo " -p <pc> : PC to take checkpoint at [default 0x80000000]" echo " -p <pc> : PC to take checkpoint at [default 0x80000000]"
echo " -c <cycles>: Cycles after PC to take checkpoint at [default 0]" echo " -i <insns> : Instructions after PC to take checkpoint at [default 0]"
echo " -m <isa> : ISA to pass to spike for checkpoint generation [defualt rv64gc]" echo " -m <isa> : ISA to pass to spike for checkpoint generation [default rv64gc]"
exit "$1" exit "$1"
} }
NHARTS=1 NHARTS=1
BINARY="" BINARY=""
PC="0x80000000" PC="0x80000000"
CYCLES=0 INSNS=0
ISA="rv64gc" ISA="rv64gc"
while [ "$1" != "" ]; while [ "$1" != "" ];
do do
@@ -34,9 +34,9 @@ do
-p ) -p )
shift shift
PC=$1 ;; PC=$1 ;;
-c ) -i )
shift shift
CYCLES=$1 ;; INSNS=$1 ;;
-m ) -m )
shift shift
ISA=$1 ;; ISA=$1 ;;
@@ -50,7 +50,7 @@ BASEMEM="$((0x80000000)):$((0x10000000))"
SPIKEFLAGS="-p$NHARTS --pmpregions=0 --isa=$ISA -m$BASEMEM" SPIKEFLAGS="-p$NHARTS --pmpregions=0 --isa=$ISA -m$BASEMEM"
BASENAME=$(basename -- $BINARY) BASENAME=$(basename -- $BINARY)
DIRNAME=$BASENAME.$PC.$CYCLES.loadarch DIRNAME=$BASENAME.$PC.$INSNS.loadarch
echo "Generating loadarch directory $DIRNAME" echo "Generating loadarch directory $DIRNAME"
rm -rf $DIRNAME rm -rf $DIRNAME
mkdir -p $DIRNAME mkdir -p $DIRNAME
@@ -63,7 +63,7 @@ SPIKECMD_FILE=$DIRNAME/spikecmd.sh
echo "Generating state capture spike interactive commands in $CMDS_FILE" echo "Generating state capture spike interactive commands in $CMDS_FILE"
echo "until pc 0 $PC" >> $CMDS_FILE echo "until pc 0 $PC" >> $CMDS_FILE
echo "rs $CYCLES" >> $CMDS_FILE echo "rs $INSNS" >> $CMDS_FILE
echo "dump" >> $CMDS_FILE echo "dump" >> $CMDS_FILE
for (( h=0; h<$NHARTS; h++ )) for (( h=0; h<$NHARTS; h++ ))
do do
@@ -113,8 +113,6 @@ do
done done
echo "quit" >> $CMDS_FILE echo "quit" >> $CMDS_FILE
#cat $CMDS_FILE
echo "spike -d --debug-cmd=$CMDS_FILE $SPIKEFLAGS $BINARY" > $SPIKECMD_FILE echo "spike -d --debug-cmd=$CMDS_FILE $SPIKEFLAGS $BINARY" > $SPIKECMD_FILE
echo "Capturing state at checkpoint to spikeout" echo "Capturing state at checkpoint to spikeout"

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@@ -25,6 +25,8 @@ HELP_PROJECT_VARIABLES = \
HELP_SIMULATION_VARIABLES = \ HELP_SIMULATION_VARIABLES = \
" BINARY = riscv elf binary that the simulator will run when using the run-binary* targets" \ " BINARY = riscv elf binary that the simulator will run when using the run-binary* targets" \
" LOADMEM = riscv elf binary that should be loaded directly into simulated DRAM. LOADMEM=1 will load the BINARY elf" \
" LOADARCH = path to a architectural checkpoint directory that should end in .loadarch/, for restoring from a checkpoint" \
" VERBOSE_FLAGS = flags used when doing verbose simulation [$(VERBOSE_FLAGS)]" \ " VERBOSE_FLAGS = flags used when doing verbose simulation [$(VERBOSE_FLAGS)]" \
" timeout_cycles = number of clock cycles before simulator times out, defaults to 10000000" \ " timeout_cycles = number of clock cycles before simulator times out, defaults to 10000000" \
" bmark_timeout_cycles = number of clock cycles before benchmark simulator times out, defaults to 100000000" " bmark_timeout_cycles = number of clock cycles before benchmark simulator times out, defaults to 100000000"