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Update gpu binaries to vecaddloop

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This commit is contained in:
Hansung Kim
2024-01-25 23:26:49 -08:00
parent 6768d6939e
commit 127ba43fc0
2 changed files with 5 additions and 5 deletions
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8
.github/scripts/copy-gpu-binaries.sh vendored
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@@ -14,11 +14,11 @@ source $SCRIPT_DIR/defaults.sh
echo "$0: REMOTE_CHIPYARD_DIR=$REMOTE_CHIPYARD_DIR"
cd $REMOTE_CHIPYARD_DIR
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecadd.bin.elf \
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecaddloop.bin.elf \
$REMOTE_CHIPYARD_DIR/sims/
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecadd.args.size64.romAddr.core1.bin \
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecaddloop.args.n256.cores1.romAddr.bin \
$REMOTE_CHIPYARD_DIR/sims/args.bin
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecadd.input.a.size64.bin \
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecaddloop.input.a.size256.bin \
$REMOTE_CHIPYARD_DIR/sims/op_a.bin
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecadd.input.b.size64.bin \
cp -av $REMOTE_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecaddloop.input.b.size256.bin \
$REMOTE_CHIPYARD_DIR/sims/op_b.bin

2
.github/scripts/run-tests.sh vendored
View File

@@ -142,7 +142,7 @@ case $1 in
run_binary LOADMEM=1 BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/dhrystone.riscv
;;
chipyard-radiance)
run_binary BINARY=$LOCAL_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecadd.bin.elf
run_binary BINARY=$LOCAL_CHIPYARD_DIR/generators/rocket-gpu/stimuli/vecaddloop.bin.elf
;;
chipyard-coalescer)
run_binary BINARY=none EXTRA_SIM_FLAGS="+memtracefile=$LOCAL_CHIPYARD_DIR/generators/rocket-gpu/tracefiles/vecadd.core1.thread4.trace"