From f3d1bb8219a41d4d347a4680d2b07ea1c3d99734 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Thu, 27 Feb 2020 16:34:39 -0800 Subject: [PATCH 01/14] WIP: Add the ability to generate a hammer-sim config for gate-level sims Still need to work on the asm-test/benchmark integration --- sims/vcs/Makefile | 5 +- vcs.mk | 35 ++++++++++++++ vlsi/Makefile | 114 +++++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 149 insertions(+), 5 deletions(-) create mode 100644 vcs.mk diff --git a/sims/vcs/Makefile b/sims/vcs/Makefile index 86c28f23..e8a30b0c 100644 --- a/sims/vcs/Makefile +++ b/sims/vcs/Makefile @@ -25,10 +25,7 @@ sim_prefix = simv sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG) sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug -PERMISSIVE_ON=+permissive -PERMISSIVE_OFF=+permissive-off - -WAVEFORM_FLAG=+vcdplusfile=$(sim_out_name).vpd +include $(base_dir)/vcs.mk .PHONY: default debug default: $(sim) diff --git a/vcs.mk b/vcs.mk new file mode 100644 index 00000000..c0450da5 --- /dev/null +++ b/vcs.mk @@ -0,0 +1,35 @@ +PERMISSIVE_ON=+permissive +PERMISSIVE_OFF=+permissive-off + +WAVEFORM_FLAG=+vcdplusfile=$(sim_out_name).vpd + +VCS_CC_OPTS = \ + -CC "-I$(VCS_HOME)/include" \ + -CC "-I$(RISCV)/include" \ + -CC "-std=c++11" + +VCS_NONCC_OPTS = \ + $(RISCV)/lib/libfesvr.a \ + +lint=all,noVCDE,noONGS,noUI \ + -error=PCWM-L \ + -timescale=1ns/10ps \ + -quiet \ + -q \ + +rad \ + +v2k \ + +vcs+lic+wait \ + +vc+list \ + -f $(sim_common_files) \ + -sverilog \ + +incdir+$(build_dir) \ + $(sim_vsrcs) \ + +libext+.v + +VCS_DEFINE_OPTS = \ + +define+CLOCK_PERIOD=1.0 \ + +define+PRINTF_COND=$(TB).printf_cond \ + +define+STOP_COND=!$(TB).reset \ + +define+RANDOMIZE_MEM_INIT \ + +define+RANDOMIZE_REG_INIT \ + +define+RANDOMIZE_GARBAGE_ASSIGN \ + +define+RANDOMIZE_INVALID_ASSIGN diff --git a/vlsi/Makefile b/vlsi/Makefile index a41368c5..800411bd 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -87,11 +87,123 @@ $(SRAM_CONF): $(SRAM_GENERATOR_CONF) cd $(vlsi_dir) && $(HAMMER_EXEC) -e $(ENV_YML) $(foreach x,$(INPUT_CONFS) $(SRAM_GENERATOR_CONF), -p $(x)) --obj_dir $(build_dir) sram_generator cd $(vlsi_dir) && cp output.json $@ +######################################################################################### +# simulation input configuration +######################################################################################### +include $(base_dir)/vcs.mk +SIM_CONF = $(OBJ_DIR)/sim-inputs.yml +SIM_DEBUG_CONF = $(OBJ_DIR)/sim-debug-inputs.yml + +$(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) + mkdir -p $(dir $@) + echo "sim.inputs:" > $@ + echo " level: 'gl'" >> $@ + echo " input_files:" >> $@ + for x in $(HARNESS_FILE) $(HARNESS_SMEMS_FILE); do \ + echo ' - "'$$x'"' >> $@; \ + done + echo " input_files_meta: 'append'" >> $@ + echo " timescale: '1ns/10ps'" >> $@ + echo " options: [" >> $@ + echo " '$(RISCV)/lib/libfesvr.a'," >> $@ + echo " '+lint=all,noVCDE,noONGS,noUI'," >> $@ + echo " '-error=PCWM-L'," >> $@ + echo " '-quiet'," >> $@ + echo " '-q'," >> $@ + echo " '+rad'," >> $@ + echo " '+v2k'," >> $@ + echo " '+vcs+lic+wait'," >> $@ + echo " '+vc+list'," >> $@ + echo " '-f $(sim_common_files)'," >> $@ + echo " '-sverilog']" >> $@ + echo " options_meta: 'append'" >> $@ + echo " defines: [" >> $@ + echo " 'CLOCK_PERIOD=1.0'," >> $@ + echo " 'PRINTF_COND=$(TB).printf_cond'," >> $@ + echo " 'STOP_COND=!$(TB).reset'," >> $@ + echo " 'RANDOMIZE_MEM_INIT'," >> $@ + echo " 'RANDOMIZE_REG_INIT'," >> $@ + echo " 'RANDOMIZE_GARBAGE_ASSIGN'," >> $@ + echo " 'RANDOMIZE_INVALID_ASSIGN']" >> $@ + echo " defines_meta: 'append'" >> $@ + echo " compiler_opts: [" >> $@ + echo " '-I$(RISCV)/include'," >> $@ + echo " '-std=c++11']" >> $@ + echo " compiler_opts_meta: 'append'" >> $@ + echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@ + echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@ + echo " execution_flags: [" >> $@ + echo " '+max-cycles=$(timeout_cycles)'," >> $@ + for x in $(SIM_FLAGS) $(VERBOSE_FLAGS); do \ + echo ' "'$$x'",' >> $@; \ + done + echo " ]" >> $@ + echo " execution_flags_meta: 'append'" >> $@ + echo " benchmarks: ['$(RISCV)/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-dgemm-opt.riscv']" >> $@ + +$(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) + mkdir -p $(dir $@) + echo "sim.inputs:" > $@ + echo " level: 'gl'" >> $@ + echo " input_files:" >> $@ + for x in $(HARNESS_FILE) $(HARNESS_SMEMS_FILE); do \ + echo ' - "'$$x'"' >> $@; \ + done + echo " input_files_meta: 'append'" >> $@ + echo " timescale: '1ns/10ps'" >> $@ + echo " options: [" >> $@ + echo " '$(RISCV)/lib/libfesvr.a'," >> $@ + echo " '+lint=all,noVCDE,noONGS,noUI'," >> $@ + echo " '-error=PCWM-L'," >> $@ + echo " '-quiet'," >> $@ + echo " '-q'," >> $@ + echo " '+rad'," >> $@ + echo " '+v2k'," >> $@ + echo " '+vcs+lic+wait'," >> $@ + echo " '+vc+list'," >> $@ + echo " '-f $(sim_common_files)'," >> $@ + echo " '-sverilog'," >> $@ + echo " '-debug_pp']" >> $@ + echo " options_meta: 'append'" >> $@ + echo " defines: [" >> $@ + echo " 'DEBUG'," >> $@ + echo " 'CLOCK_PERIOD=1.0'," >> $@ + echo " 'PRINTF_COND=$(TB).printf_cond'," >> $@ + echo " 'STOP_COND=!$(TB).reset'," >> $@ + echo " 'RANDOMIZE_MEM_INIT'," >> $@ + echo " 'RANDOMIZE_REG_INIT'," >> $@ + echo " 'RANDOMIZE_GARBAGE_ASSIGN'," >> $@ + echo " 'RANDOMIZE_INVALID_ASSIGN']" >> $@ + echo " defines_meta: 'append'" >> $@ + echo " compiler_opts: [" >> $@ + echo " '-I$(RISCV)/include'," >> $@ + echo " '-std=c++11']" >> $@ + echo " compiler_opts_meta: 'append'" >> $@ + echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@ + echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@ + echo " execution_flags: [" >> $@ + echo " '+max-cycles=$(timeout_cycles)'," >> $@ + for x in $(SIM_FLAGS) $(VERBOSE_FLAGS); do \ + echo ' "'$$x'",' >> $@; \ + done + echo " '+vcdplusfile=$(OBJ_DIR)/sim-tool-output.vpd']" >> $@ + echo " execution_flags_meta: 'append'" >> $@ + echo " tb_dut: 'testHarness.top'" >> $@ + echo " benchmarks: ['$(RISCV)/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-dgemm-opt.riscv']" >> $@ + + #echo " benchmarks: ['$(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add']" >> $@ + +$(POWER_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) + mkdir -p $(dir $@) + echo "power.inputs:" > $@ + +sim_conf_temp: $(SIM_CONF) $(SIM_DEBUG_CONF) + ######################################################################################### # synthesis input configuration ######################################################################################### SYN_CONF = $(OBJ_DIR)/inputs.yml -GENERATED_CONFS = $(SYN_CONF) +GENERATED_CONFS = $(SYN_CONF) $(SIM_CONF) ifeq ($(CUSTOM_VLOG), ) GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF)) endif From 86a5c47ef94505b18edc1fe8899cb5c7baa2afba Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Mon, 2 Mar 2020 11:10:18 -0800 Subject: [PATCH 02/14] Bump Hammer --- vlsi/hammer | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vlsi/hammer b/vlsi/hammer index 2f37cd31..2d3890bf 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 2f37cd3121d9a9e775efbe4554d9b74c30d01f61 +Subproject commit 2d3890bfca2ef8a8e8c74ed447bddbb30789fd5c From e7730f667c5a202d00cc694bb7cb16c8589f49d1 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Tue, 17 Mar 2020 18:04:48 -0700 Subject: [PATCH 03/14] WIP: Fix hammer-sim makefile integration to support debug builds --- vlsi/Makefile | 119 ++++++++++++++++++----------------- vlsi/hammer | 2 +- vlsi/hammer-cadence-plugins | 2 +- vlsi/hammer-synopsys-plugins | 2 +- 4 files changed, 64 insertions(+), 61 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 800411bd..42ca934a 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -94,57 +94,45 @@ include $(base_dir)/vcs.mk SIM_CONF = $(OBJ_DIR)/sim-inputs.yml SIM_DEBUG_CONF = $(OBJ_DIR)/sim-debug-inputs.yml +.PHONY: $(SIM_CONF) $(SIM_DEBUG_CONF) +# Update hammer top-level sim targets to include our generated sim configs +redo-sim: $(SIM_CONF) +redo-sim: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-debug: $(SIM_DEBUG_CONF) redo-sim +redo-sim-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) + +redo-sim-syn: $(SIM_CONF) +redo-sim-syn: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-syn-debug: $(SIM_DEBUG_CONF) redo-sim-syn +redo-sim-syn-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) + +redo-sim-par: $(SIM_CONF) +redo-sim-par: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-par-debug: $(SIM_DEBUG_CONF) redo-sim-par +redo-sim-par-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) + +sim: $(SIM_CONF) +sim: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-debug: $(SIM_DEBUG_CONF) sim +sim-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +$(OBJ_DIR)/sim-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) + +sim-syn: $(SIM_CONF) +sim-syn: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-syn-debug: $(SIM_DEBUG_CONF) sim-syn +sim-syn-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +$(OBJ_DIR)/sim-syn-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) + +sim-par: $(SIM_CONF) +sim-par: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-par-debug: $(SIM_DEBUG_CONF) sim-par +sim-par-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +$(OBJ_DIR)/sim-par-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) + $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) mkdir -p $(dir $@) echo "sim.inputs:" > $@ - echo " level: 'gl'" >> $@ - echo " input_files:" >> $@ - for x in $(HARNESS_FILE) $(HARNESS_SMEMS_FILE); do \ - echo ' - "'$$x'"' >> $@; \ - done - echo " input_files_meta: 'append'" >> $@ - echo " timescale: '1ns/10ps'" >> $@ - echo " options: [" >> $@ - echo " '$(RISCV)/lib/libfesvr.a'," >> $@ - echo " '+lint=all,noVCDE,noONGS,noUI'," >> $@ - echo " '-error=PCWM-L'," >> $@ - echo " '-quiet'," >> $@ - echo " '-q'," >> $@ - echo " '+rad'," >> $@ - echo " '+v2k'," >> $@ - echo " '+vcs+lic+wait'," >> $@ - echo " '+vc+list'," >> $@ - echo " '-f $(sim_common_files)'," >> $@ - echo " '-sverilog']" >> $@ - echo " options_meta: 'append'" >> $@ - echo " defines: [" >> $@ - echo " 'CLOCK_PERIOD=1.0'," >> $@ - echo " 'PRINTF_COND=$(TB).printf_cond'," >> $@ - echo " 'STOP_COND=!$(TB).reset'," >> $@ - echo " 'RANDOMIZE_MEM_INIT'," >> $@ - echo " 'RANDOMIZE_REG_INIT'," >> $@ - echo " 'RANDOMIZE_GARBAGE_ASSIGN'," >> $@ - echo " 'RANDOMIZE_INVALID_ASSIGN']" >> $@ - echo " defines_meta: 'append'" >> $@ - echo " compiler_opts: [" >> $@ - echo " '-I$(RISCV)/include'," >> $@ - echo " '-std=c++11']" >> $@ - echo " compiler_opts_meta: 'append'" >> $@ - echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@ - echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@ - echo " execution_flags: [" >> $@ - echo " '+max-cycles=$(timeout_cycles)'," >> $@ - for x in $(SIM_FLAGS) $(VERBOSE_FLAGS); do \ - echo ' "'$$x'",' >> $@; \ - done - echo " ]" >> $@ - echo " execution_flags_meta: 'append'" >> $@ - echo " benchmarks: ['$(RISCV)/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-dgemm-opt.riscv']" >> $@ - -$(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) - mkdir -p $(dir $@) - echo "sim.inputs:" > $@ - echo " level: 'gl'" >> $@ + echo " top_module: $(VLSI_TOP)" >> $@ echo " input_files:" >> $@ for x in $(HARNESS_FILE) $(HARNESS_SMEMS_FILE); do \ echo ' - "'$$x'"' >> $@; \ @@ -166,7 +154,6 @@ $(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_commo echo " '-debug_pp']" >> $@ echo " options_meta: 'append'" >> $@ echo " defines: [" >> $@ - echo " 'DEBUG'," >> $@ echo " 'CLOCK_PERIOD=1.0'," >> $@ echo " 'PRINTF_COND=$(TB).printf_cond'," >> $@ echo " 'STOP_COND=!$(TB).reset'," >> $@ @@ -183,34 +170,50 @@ $(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_commo echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@ echo " execution_flags: [" >> $@ echo " '+max-cycles=$(timeout_cycles)'," >> $@ - for x in $(SIM_FLAGS) $(VERBOSE_FLAGS); do \ + for x in $(SIM_FLAGS); do \ echo ' "'$$x'",' >> $@; \ done - echo " '+vcdplusfile=$(OBJ_DIR)/sim-tool-output.vpd']" >> $@ + echo " ]" >> $@ echo " execution_flags_meta: 'append'" >> $@ + echo " benchmarks: ['$(BINARY)']" >> $@ echo " tb_dut: 'testHarness.top'" >> $@ - echo " benchmarks: ['$(RISCV)/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-dgemm-opt.riscv']" >> $@ - #echo " benchmarks: ['$(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add']" >> $@ +$(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) + mkdir -p $(dir $@) + echo "sim.inputs:" > $@ + echo " defines: [" >> $@ + echo " 'DEBUG']" >> $@ + echo " defines_meta: 'append'" >> $@ + echo " execution_flags: [" >> $@ + for x in $(VERBOSE_FLAGS) $(WAVEFORM_FLAG); do \ + echo ' "'$$x'",' >> $@; \ + done + echo " ]" >> $@ + echo " execution_flags_meta: 'append'" >> $@ + $(POWER_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) mkdir -p $(dir $@) echo "power.inputs:" > $@ -sim_conf_temp: $(SIM_CONF) $(SIM_DEBUG_CONF) - ######################################################################################### # synthesis input configuration ######################################################################################### SYN_CONF = $(OBJ_DIR)/inputs.yml -GENERATED_CONFS = $(SYN_CONF) $(SIM_CONF) +GENERATED_CONFS = $(SYN_CONF) ifeq ($(CUSTOM_VLOG), ) GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF)) endif $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) mkdir -p $(dir $@) - echo "synthesis.inputs:" > $@ + echo "sim.inputs:" > $@ + echo " input_files:" >> $@ + for x in $(VLSI_RTL); do \ + echo ' - "'$$x'"' >> $@; \ + done + echo " input_files_meta: 'append'" >> $@ + echo "synthesis.inputs:" >> $@ echo " top_module: $(VLSI_TOP)" >> $@ echo " input_files:" >> $@ for x in $(VLSI_RTL) `cat $(VLSI_BB)`; do \ @@ -236,4 +239,4 @@ $(OBJ_DIR)/hammer.d: $(HAMMER_D_DEPS) ######################################################################################### .PHONY: clean clean: - rm -rf $(VLSI_OBJ_DIR) hammer-vlsi*.log __pycache__ output.json $(GENERATED_CONFS) $(gen_dir) + rm -rf $(VLSI_OBJ_DIR) hammer-vlsi*.log __pycache__ output.json $(GENERATED_CONFS) $(gen_dir) $(SIM_CONF) $(SIM_DEBUG_CONF) diff --git a/vlsi/hammer b/vlsi/hammer index 2d3890bf..b1aebbef 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 2d3890bfca2ef8a8e8c74ed447bddbb30789fd5c +Subproject commit b1aebbef2f53da746e86f93f945302eb97abec6d diff --git a/vlsi/hammer-cadence-plugins b/vlsi/hammer-cadence-plugins index 8f23bfa8..fdc3ad05 160000 --- a/vlsi/hammer-cadence-plugins +++ b/vlsi/hammer-cadence-plugins @@ -1 +1 @@ -Subproject commit 8f23bfa8c971ceb39b10aa52d6c9f446c5303cd3 +Subproject commit fdc3ad051a2c2edae8346730ce7c0f569aaa97b0 diff --git a/vlsi/hammer-synopsys-plugins b/vlsi/hammer-synopsys-plugins index f812f8ce..f8579e55 160000 --- a/vlsi/hammer-synopsys-plugins +++ b/vlsi/hammer-synopsys-plugins @@ -1 +1 @@ -Subproject commit f812f8ce85b5f77b563807bbb490b46ce82c1711 +Subproject commit f8579e55b96208758c0ed43f3bdba0bbc67ef6b5 From b17de6a4ddb9c9edf61c1d689b2f0dddeec8c7d4 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Fri, 20 Mar 2020 16:29:05 -0700 Subject: [PATCH 04/14] Hide my sins Also begin power integration --- vlsi/Makefile | 62 ++++++++++++++++++++++----------------------------- vlsi/hammer | 2 +- vlsi/power.mk | 6 +++++ vlsi/sim.mk | 38 +++++++++++++++++++++++++++++++ 4 files changed, 72 insertions(+), 36 deletions(-) create mode 100644 vlsi/power.mk create mode 100644 vlsi/sim.mk diff --git a/vlsi/Makefile b/vlsi/Makefile index 42ca934a..cbeceb3e 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -93,42 +93,9 @@ $(SRAM_CONF): $(SRAM_GENERATOR_CONF) include $(base_dir)/vcs.mk SIM_CONF = $(OBJ_DIR)/sim-inputs.yml SIM_DEBUG_CONF = $(OBJ_DIR)/sim-debug-inputs.yml +SIM_TIMING_CONF = $(OBJ_DIR)/sim-timing-inputs.yml -.PHONY: $(SIM_CONF) $(SIM_DEBUG_CONF) -# Update hammer top-level sim targets to include our generated sim configs -redo-sim: $(SIM_CONF) -redo-sim: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) -redo-sim-debug: $(SIM_DEBUG_CONF) redo-sim -redo-sim-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) - -redo-sim-syn: $(SIM_CONF) -redo-sim-syn: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) -redo-sim-syn-debug: $(SIM_DEBUG_CONF) redo-sim-syn -redo-sim-syn-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) - -redo-sim-par: $(SIM_CONF) -redo-sim-par: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) -redo-sim-par-debug: $(SIM_DEBUG_CONF) redo-sim-par -redo-sim-par-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) - -sim: $(SIM_CONF) -sim: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) -sim-debug: $(SIM_DEBUG_CONF) sim -sim-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) -$(OBJ_DIR)/sim-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) - -sim-syn: $(SIM_CONF) -sim-syn: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) -sim-syn-debug: $(SIM_DEBUG_CONF) sim-syn -sim-syn-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) -$(OBJ_DIR)/sim-syn-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) - -sim-par: $(SIM_CONF) -sim-par: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) -sim-par-debug: $(SIM_DEBUG_CONF) sim-par -sim-par-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) -$(OBJ_DIR)/sim-par-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) - +include $(vlsi_dir)/sim.mk $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) mkdir -p $(dir $@) echo "sim.inputs:" > $@ @@ -190,11 +157,36 @@ $(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_commo done echo " ]" >> $@ echo " execution_flags_meta: 'append'" >> $@ + echo "sim.outputs.waveforms: ['$(sim_out_name).vpd']" >> $@ +$(SIM_TIMING_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) + mkdir -p $(dir $@) + echo "sim.inputs:" > $@ + echo " defines: [" >> $@ + echo " 'NTC']" >> $@ + echo " defines_meta: 'append'" >> $@ + echo " timing_annotated: 'true'" >> $@ +POWER_CONF = $(OBJ_DIR)/power-inputs.yml +include $(vlsi_dir)/power.mk +LOWER_VLSI_TOP = $(shell echo $(VLSI_TOP) | tr A-Z a-z) $(POWER_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) mkdir -p $(dir $@) echo "power.inputs:" > $@ + echo " tb_dut: 'testHarness/$(LOWER_VLSI_TOP)'" >> $@ + echo " database: '$(OBJ_DIR)/par-rundir/$(VLSI_TOP)_FINAL'" >> $@ + echo " saifs: [" >> $@ + echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/ucli.saif'" >> $@ + echo " ]" >> $@ + echo " waveforms: [" >> $@ + echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/$(sim_out_name).vcd'" >> $@ + echo " ]" >> $@ + echo " start_times: [" >> $@ + echo " 0" >> $@ + echo " ]" >> $@ + echo " end_times: [" >> $@ + echo " 15000" >> $@ #timeout_cycles * clock_period + echo " ]" >> $@ ######################################################################################### # synthesis input configuration diff --git a/vlsi/hammer b/vlsi/hammer index b1aebbef..493657c1 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit b1aebbef2f53da746e86f93f945302eb97abec6d +Subproject commit 493657c1ac1a6764a592bd013208648ba19d4fbd diff --git a/vlsi/power.mk b/vlsi/power.mk new file mode 100644 index 00000000..a5e1633b --- /dev/null +++ b/vlsi/power.mk @@ -0,0 +1,6 @@ +.PHONY: $(POWER_CONF) +power: $(POWER_CONF) +power: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) +redo-power: $(POWER_CONF) +redo-power: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) +$(OBJ_DIR)/power-rundir/power-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_POWER_EXTRA_ARGS) diff --git a/vlsi/sim.mk b/vlsi/sim.mk new file mode 100644 index 00000000..71b05ae7 --- /dev/null +++ b/vlsi/sim.mk @@ -0,0 +1,38 @@ +.PHONY: $(SIM_CONF) $(SIM_DEBUG_CONF) $(SIM_TIMING_CONF) +# Update hammer top-level sim targets to include our generated sim configs +redo-sim: $(SIM_CONF) +redo-sim: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-debug: $(SIM_DEBUG_CONF) redo-sim +redo-sim-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) + +redo-sim-syn: $(SIM_CONF) +redo-sim-syn: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-syn-debug: $(SIM_DEBUG_CONF) redo-sim-syn +redo-sim-syn-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) + +redo-sim-par: $(SIM_CONF) +redo-sim-par: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-par-debug: $(SIM_DEBUG_CONF) redo-sim-par +redo-sim-par-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +redo-sim-par-timing-debug: $(SIM_TIMING_CONF) redo-sim-par-debug +redo-sim-par-timing-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_TIMING_CONF) + +sim: $(SIM_CONF) +sim: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-debug: $(SIM_DEBUG_CONF) sim +sim-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +$(OBJ_DIR)/sim-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) + +sim-syn: $(SIM_CONF) +sim-syn: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-syn-debug: $(SIM_DEBUG_CONF) sim-syn +sim-syn-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +$(OBJ_DIR)/sim-syn-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) + +sim-par: $(SIM_CONF) +sim-par: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-par-debug: $(SIM_DEBUG_CONF) sim-par +sim-par-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +sim-par-timing-debug: $(SIM_TIMING_CONF) sim-par-debug +sim-par-timing-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_TIMING_CONF) +$(OBJ_DIR)/sim-par-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) From d198ef06fd951e338c73500513755ae2bbd03c51 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 15 Apr 2020 09:34:45 -0700 Subject: [PATCH 05/14] Hammer bump --- vlsi/hammer | 2 +- vlsi/hammer-cadence-plugins | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/vlsi/hammer b/vlsi/hammer index 493657c1..e9232084 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 493657c1ac1a6764a592bd013208648ba19d4fbd +Subproject commit e9232084e7682cd263dab9d887d59900b4242379 diff --git a/vlsi/hammer-cadence-plugins b/vlsi/hammer-cadence-plugins index fdc3ad05..6715c3de 160000 --- a/vlsi/hammer-cadence-plugins +++ b/vlsi/hammer-cadence-plugins @@ -1 +1 @@ -Subproject commit fdc3ad051a2c2edae8346730ce7c0f569aaa97b0 +Subproject commit 6715c3deb074a90860fb151564e83e04bbd24e44 From bbe296be51db298fce4fda2bf3fe992387db4714 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 20 May 2020 09:32:54 -0700 Subject: [PATCH 06/14] Force power to depend on sim-par, bump hammer for saif trigger Dependency is to have the power rerun on sim include the right yaml --- vlsi/Makefile | 4 ++-- vlsi/hammer | 2 +- vlsi/hammer-synopsys-plugins | 2 +- vlsi/power.mk | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index cbeceb3e..6eea3c64 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -67,8 +67,8 @@ include $(base_dir)/common.mk ######################################################################################### # srams ######################################################################################### -SRAM_GENERATOR_CONF = $(build_dir)/sram_generator-input.yml -SRAM_CONF=$(build_dir)/sram_generator-output.json +SRAM_GENERATOR_CONF = $(OBJ_DIR)/sram_generator-input.yml +SRAM_CONF=$(OBJ_DIR)/sram_generator-output.json ## SRAM Generator .PHONY: sram_generator srams diff --git a/vlsi/hammer b/vlsi/hammer index e9232084..ec0171a8 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit e9232084e7682cd263dab9d887d59900b4242379 +Subproject commit ec0171a88950414f4d6dc59407cc3493f2705d9d diff --git a/vlsi/hammer-synopsys-plugins b/vlsi/hammer-synopsys-plugins index f8579e55..b2d4233f 160000 --- a/vlsi/hammer-synopsys-plugins +++ b/vlsi/hammer-synopsys-plugins @@ -1 +1 @@ -Subproject commit f8579e55b96208758c0ed43f3bdba0bbc67ef6b5 +Subproject commit b2d4233f4f6ca9df776931dc32c15c69c48bd93e diff --git a/vlsi/power.mk b/vlsi/power.mk index a5e1633b..f394ced7 100644 --- a/vlsi/power.mk +++ b/vlsi/power.mk @@ -1,5 +1,5 @@ .PHONY: $(POWER_CONF) -power: $(POWER_CONF) +power: $(POWER_CONF) sim-par power: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) redo-power: $(POWER_CONF) redo-power: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) From 5407018bb4aebcdbddfa6309d6f19aadd7449a58 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Thu, 21 May 2020 12:26:45 -0700 Subject: [PATCH 07/14] Respond to PR comments clean up usage of vcs.mk Bump hammer and plugins for updated API --- sims/vcs/Makefile | 31 +----------------- vcs.mk | 8 +++-- vlsi/Makefile | 62 +++++++++++++----------------------- vlsi/hammer | 2 +- vlsi/hammer-cadence-plugins | 2 +- vlsi/hammer-synopsys-plugins | 2 +- 6 files changed, 32 insertions(+), 75 deletions(-) diff --git a/sims/vcs/Makefile b/sims/vcs/Makefile index e8a30b0c..6b388164 100644 --- a/sims/vcs/Makefile +++ b/sims/vcs/Makefile @@ -41,36 +41,7 @@ include $(base_dir)/common.mk ######################################################################################### VCS = vcs -full64 -VCS_CC_OPTS = \ - -CC "-I$(VCS_HOME)/include" \ - -CC "-I$(RISCV)/include" \ - -CC "-std=c++11" \ - $(RISCV)/lib/libfesvr.a - -VCS_NONCC_OPTS = \ - +lint=all,noVCDE,noONGS,noUI \ - -error=PCWM-L \ - -timescale=1ns/10ps \ - -quiet \ - -q \ - +rad \ - +v2k \ - +vcs+lic+wait \ - +vc+list \ - -f $(sim_common_files) \ - -sverilog \ - +incdir+$(build_dir) \ - +define+CLOCK_PERIOD=1.0 \ - $(sim_vsrcs) \ - +define+PRINTF_COND=$(TB).printf_cond \ - +define+STOP_COND=!$(TB).reset \ - +define+RANDOMIZE_MEM_INIT \ - +define+RANDOMIZE_REG_INIT \ - +define+RANDOMIZE_GARBAGE_ASSIGN \ - +define+RANDOMIZE_INVALID_ASSIGN \ - +libext+.v - -VCS_OPTS = -notice -line $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) +VCS_OPTS = -notice -line $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) $(VCS_DEFINE_OPTS) ######################################################################################### # vcs simulator rules diff --git a/vcs.mk b/vcs.mk index c0450da5..fb1e6781 100644 --- a/vcs.mk +++ b/vcs.mk @@ -3,8 +3,10 @@ PERMISSIVE_OFF=+permissive-off WAVEFORM_FLAG=+vcdplusfile=$(sim_out_name).vpd +CLOCK_PERIOD ?= 1.0 +RESET_DELAY ?= 777.7 + VCS_CC_OPTS = \ - -CC "-I$(VCS_HOME)/include" \ -CC "-I$(RISCV)/include" \ -CC "-std=c++11" @@ -21,12 +23,14 @@ VCS_NONCC_OPTS = \ +vc+list \ -f $(sim_common_files) \ -sverilog \ + -debug_pp \ +incdir+$(build_dir) \ $(sim_vsrcs) \ +libext+.v VCS_DEFINE_OPTS = \ - +define+CLOCK_PERIOD=1.0 \ + +define+CLOCK_PERIOD=$(CLOCK_PERIOD) \ + +define+RESET_DELAY=$(RESET_DELAY) \ +define+PRINTF_COND=$(TB).printf_cond \ +define+STOP_COND=!$(TB).reset \ +define+RANDOMIZE_MEM_INIT \ diff --git a/vlsi/Makefile b/vlsi/Makefile index 6eea3c64..533a4598 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -106,41 +106,28 @@ $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_file done echo " input_files_meta: 'append'" >> $@ echo " timescale: '1ns/10ps'" >> $@ - echo " options: [" >> $@ - echo " '$(RISCV)/lib/libfesvr.a'," >> $@ - echo " '+lint=all,noVCDE,noONGS,noUI'," >> $@ - echo " '-error=PCWM-L'," >> $@ - echo " '-quiet'," >> $@ - echo " '-q'," >> $@ - echo " '+rad'," >> $@ - echo " '+v2k'," >> $@ - echo " '+vcs+lic+wait'," >> $@ - echo " '+vc+list'," >> $@ - echo " '-f $(sim_common_files)'," >> $@ - echo " '-sverilog'," >> $@ - echo " '-debug_pp']" >> $@ + echo " options:" >> $@ + for x in $(VCS_NONCC_OPTS); do \ + echo ' - "'$$x'"' >> $@; \ + done echo " options_meta: 'append'" >> $@ - echo " defines: [" >> $@ - echo " 'CLOCK_PERIOD=1.0'," >> $@ - echo " 'PRINTF_COND=$(TB).printf_cond'," >> $@ - echo " 'STOP_COND=!$(TB).reset'," >> $@ - echo " 'RANDOMIZE_MEM_INIT'," >> $@ - echo " 'RANDOMIZE_REG_INIT'," >> $@ - echo " 'RANDOMIZE_GARBAGE_ASSIGN'," >> $@ - echo " 'RANDOMIZE_INVALID_ASSIGN']" >> $@ + echo " defines:" >> $@ + for x in $(VCS_DEFINE_OPTS); do \ + echo ' - "'$$x'"' >> $@; \ + done echo " defines_meta: 'append'" >> $@ - echo " compiler_opts: [" >> $@ - echo " '-I$(RISCV)/include'," >> $@ - echo " '-std=c++11']" >> $@ + echo " compiler_opts:" >> $@ + for x in $(filter-out -CC,$(VCS_CC_OPTS)); do \ + echo ' - "'$$x'"' >> $@; \ + done echo " compiler_opts_meta: 'append'" >> $@ echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@ echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@ - echo " execution_flags: [" >> $@ - echo " '+max-cycles=$(timeout_cycles)'," >> $@ + echo " execution_flags:" >> $@ + echo " - '+max-cycles=$(timeout_cycles)'" >> $@ for x in $(SIM_FLAGS); do \ - echo ' "'$$x'",' >> $@; \ + echo ' - "'$$x'"' >> $@; \ done - echo " ]" >> $@ echo " execution_flags_meta: 'append'" >> $@ echo " benchmarks: ['$(BINARY)']" >> $@ echo " tb_dut: 'testHarness.top'" >> $@ @@ -148,22 +135,19 @@ $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_file $(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) mkdir -p $(dir $@) echo "sim.inputs:" > $@ - echo " defines: [" >> $@ - echo " 'DEBUG']" >> $@ + echo " defines: ['DEBUG']" >> $@ echo " defines_meta: 'append'" >> $@ - echo " execution_flags: [" >> $@ + echo " execution_flags:" >> $@ for x in $(VERBOSE_FLAGS) $(WAVEFORM_FLAG); do \ - echo ' "'$$x'",' >> $@; \ + echo ' - "'$$x'"' >> $@; \ done - echo " ]" >> $@ echo " execution_flags_meta: 'append'" >> $@ echo "sim.outputs.waveforms: ['$(sim_out_name).vpd']" >> $@ $(SIM_TIMING_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) mkdir -p $(dir $@) echo "sim.inputs:" > $@ - echo " defines: [" >> $@ - echo " 'NTC']" >> $@ + echo " defines: ['NTC']" >> $@ echo " defines_meta: 'append'" >> $@ echo " timing_annotated: 'true'" >> $@ @@ -179,13 +163,11 @@ $(POWER_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_fi echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/ucli.saif'" >> $@ echo " ]" >> $@ echo " waveforms: [" >> $@ - echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/$(sim_out_name).vcd'" >> $@ - echo " ]" >> $@ - echo " start_times: [" >> $@ - echo " 0" >> $@ + #echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/$(sim_out_name).vcd'" >> $@ echo " ]" >> $@ + echo " start_times: ['0ns']" >> $@ echo " end_times: [" >> $@ - echo " 15000" >> $@ #timeout_cycles * clock_period + echo " '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@ echo " ]" >> $@ ######################################################################################### diff --git a/vlsi/hammer b/vlsi/hammer index ec0171a8..41feaed2 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit ec0171a88950414f4d6dc59407cc3493f2705d9d +Subproject commit 41feaed2d42e59280538a4dc041af625f88a0edc diff --git a/vlsi/hammer-cadence-plugins b/vlsi/hammer-cadence-plugins index 6715c3de..cf2304c2 160000 --- a/vlsi/hammer-cadence-plugins +++ b/vlsi/hammer-cadence-plugins @@ -1 +1 @@ -Subproject commit 6715c3deb074a90860fb151564e83e04bbd24e44 +Subproject commit cf2304c21166cea140cc8e039824feeb51c89e0d diff --git a/vlsi/hammer-synopsys-plugins b/vlsi/hammer-synopsys-plugins index b2d4233f..451e0721 160000 --- a/vlsi/hammer-synopsys-plugins +++ b/vlsi/hammer-synopsys-plugins @@ -1 +1 @@ -Subproject commit b2d4233f4f6ca9df776931dc32c15c69c48bd93e +Subproject commit 451e072193f13f4a25cfa891426a52dbd7556c03 From 6ec2fb0de5ebbbea2be0a69628afdf23ae08926a Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Fri, 22 May 2020 16:25:06 -0700 Subject: [PATCH 08/14] Remove +define+ from front of defines since sim plugin does that already --- vlsi/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 533a4598..5138c48d 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -112,7 +112,7 @@ $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_file done echo " options_meta: 'append'" >> $@ echo " defines:" >> $@ - for x in $(VCS_DEFINE_OPTS); do \ + for x in $(subst +define+,,$(VCS_DEFINE_OPTS)); do \ echo ' - "'$$x'"' >> $@; \ done echo " defines_meta: 'append'" >> $@ From 106165e278d707f954bc43e55acda89be319fc78 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Sat, 23 May 2020 20:29:50 -0700 Subject: [PATCH 09/14] Also clean up new generated yamls. Bump hammer for new makefile --- vlsi/Makefile | 2 +- vlsi/hammer | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 5138c48d..d41a66ee 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -213,4 +213,4 @@ $(OBJ_DIR)/hammer.d: $(HAMMER_D_DEPS) ######################################################################################### .PHONY: clean clean: - rm -rf $(VLSI_OBJ_DIR) hammer-vlsi*.log __pycache__ output.json $(GENERATED_CONFS) $(gen_dir) $(SIM_CONF) $(SIM_DEBUG_CONF) + rm -rf $(VLSI_OBJ_DIR) hammer-vlsi*.log __pycache__ output.json $(GENERATED_CONFS) $(gen_dir) $(SIM_CONF) $(SIM_DEBUG_CONF) $(SIM_TIMING_CONF) $(POWER_CONF) diff --git a/vlsi/hammer b/vlsi/hammer index 41feaed2..d5b522ad 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 41feaed2d42e59280538a4dc041af625f88a0edc +Subproject commit d5b522ad1aace2a534c677bdca7b16f473efe217 From 0b1707c117c599777ee22f7ae7928bedf1c67fcd Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Sat, 23 May 2020 23:27:01 -0700 Subject: [PATCH 10/14] Filter out cc files and SimDRAM.v from hammer syn inputs This should probably be handled in a more generic way. I'm not sure why the SimDRAM stuff is showing up anywhere but the harness file includes --- vlsi/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index d41a66ee..4c637fdb 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -190,7 +190,7 @@ $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) echo "synthesis.inputs:" >> $@ echo " top_module: $(VLSI_TOP)" >> $@ echo " input_files:" >> $@ - for x in $(VLSI_RTL) `cat $(VLSI_BB)`; do \ + for x in $(VLSI_RTL) $(filter-out %SimDRAM.v,$(filter-out %.cc,$(shell cat $(VLSI_BB)))); do \ echo ' - "'$$x'"' >> $@; \ done From 422e7fd4e6aadba94016be3a0b8f3fa0156ac2cd Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Tue, 26 May 2020 13:36:13 -0700 Subject: [PATCH 11/14] Bump hammer for last pre-merge fixes, update make target names --- vlsi/Makefile | 1 + vlsi/hammer | 2 +- vlsi/hammer-cadence-plugins | 2 +- vlsi/hammer-synopsys-plugins | 2 +- vlsi/power.mk | 8 ++++---- vlsi/sim.mk | 16 ++++++++-------- 6 files changed, 16 insertions(+), 15 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 4c637fdb..cd2d3d91 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -179,6 +179,7 @@ ifeq ($(CUSTOM_VLOG), ) GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF)) endif +#TODO: remove filter-out once PR#572 is merged $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) mkdir -p $(dir $@) echo "sim.inputs:" > $@ diff --git a/vlsi/hammer b/vlsi/hammer index d5b522ad..c917e938 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit d5b522ad1aace2a534c677bdca7b16f473efe217 +Subproject commit c917e9386f1005bd5307bd45acd58f4a5fe27aab diff --git a/vlsi/hammer-cadence-plugins b/vlsi/hammer-cadence-plugins index cf2304c2..427e5ca3 160000 --- a/vlsi/hammer-cadence-plugins +++ b/vlsi/hammer-cadence-plugins @@ -1 +1 @@ -Subproject commit cf2304c21166cea140cc8e039824feeb51c89e0d +Subproject commit 427e5ca3057dd56ab2282a1ec5e45e912dffd7fb diff --git a/vlsi/hammer-synopsys-plugins b/vlsi/hammer-synopsys-plugins index 451e0721..b76ed57f 160000 --- a/vlsi/hammer-synopsys-plugins +++ b/vlsi/hammer-synopsys-plugins @@ -1 +1 @@ -Subproject commit 451e072193f13f4a25cfa891426a52dbd7556c03 +Subproject commit b76ed57f2ab2fa43dfe58d0f5c9a4d4748bf59c1 diff --git a/vlsi/power.mk b/vlsi/power.mk index f394ced7..d1c56e2c 100644 --- a/vlsi/power.mk +++ b/vlsi/power.mk @@ -1,6 +1,6 @@ .PHONY: $(POWER_CONF) -power: $(POWER_CONF) sim-par -power: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -redo-power: $(POWER_CONF) -redo-power: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) +power-par: $(POWER_CONF) sim-par +power-par: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) +redo-power-par: $(POWER_CONF) +redo-power-par: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) $(OBJ_DIR)/power-rundir/power-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_POWER_EXTRA_ARGS) diff --git a/vlsi/sim.mk b/vlsi/sim.mk index 71b05ae7..6abd7995 100644 --- a/vlsi/sim.mk +++ b/vlsi/sim.mk @@ -1,9 +1,9 @@ .PHONY: $(SIM_CONF) $(SIM_DEBUG_CONF) $(SIM_TIMING_CONF) # Update hammer top-level sim targets to include our generated sim configs -redo-sim: $(SIM_CONF) -redo-sim: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) -redo-sim-debug: $(SIM_DEBUG_CONF) redo-sim -redo-sim-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +redo-sim-rtl: $(SIM_CONF) +redo-sim-rtl: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) +redo-sim-rtl-debug: $(SIM_DEBUG_CONF) redo-sim-rtl +redo-sim-rtl-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) redo-sim-syn: $(SIM_CONF) redo-sim-syn: override HAMMER_EXTRA_ARGS += -p $(SIM_CONF) @@ -17,10 +17,10 @@ redo-sim-par-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) redo-sim-par-timing-debug: $(SIM_TIMING_CONF) redo-sim-par-debug redo-sim-par-timing-debug: override HAMMER_EXTRA_ARGS += -p $(SIM_TIMING_CONF) -sim: $(SIM_CONF) -sim: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) -sim-debug: $(SIM_DEBUG_CONF) sim -sim-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) +sim-rtl: $(SIM_CONF) +sim-rtl: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_CONF) +sim-rtl-debug: $(SIM_DEBUG_CONF) sim-rtl +sim-rtl-debug: override HAMMER_SIM_EXTRA_ARGS += -p $(SIM_DEBUG_CONF) $(OBJ_DIR)/sim-rundir/sim-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_SIM_EXTRA_ARGS) sim-syn: $(SIM_CONF) From d1875224400e70c39e619859f30d8d3184f82515 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Tue, 26 May 2020 15:51:00 -0700 Subject: [PATCH 12/14] Bump hammer post merge --- vlsi/hammer | 2 +- vlsi/hammer-cadence-plugins | 2 +- vlsi/hammer-synopsys-plugins | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/vlsi/hammer b/vlsi/hammer index c917e938..9d83bbad 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit c917e9386f1005bd5307bd45acd58f4a5fe27aab +Subproject commit 9d83bbadc0caaa7f81b4929c4e32333fc5a8d900 diff --git a/vlsi/hammer-cadence-plugins b/vlsi/hammer-cadence-plugins index 427e5ca3..f644138b 160000 --- a/vlsi/hammer-cadence-plugins +++ b/vlsi/hammer-cadence-plugins @@ -1 +1 @@ -Subproject commit 427e5ca3057dd56ab2282a1ec5e45e912dffd7fb +Subproject commit f644138bab11075f267a3f1d72108da13c8a05ab diff --git a/vlsi/hammer-synopsys-plugins b/vlsi/hammer-synopsys-plugins index b76ed57f..ef163445 160000 --- a/vlsi/hammer-synopsys-plugins +++ b/vlsi/hammer-synopsys-plugins @@ -1 +1 @@ -Subproject commit b76ed57f2ab2fa43dfe58d0f5c9a4d4748bf59c1 +Subproject commit ef163445eec6362fa6a9bf6be0bd18a5d36c707e From 7e0e4555f92c57338391747dc48e48c6b9ec1ac5 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 27 May 2020 10:50:53 -0700 Subject: [PATCH 13/14] Remove redundancy in flags after merge --- vcs.mk | 3 --- vlsi/Makefile | 1 - 2 files changed, 4 deletions(-) diff --git a/vcs.mk b/vcs.mk index 5851e98c..96cd0636 100644 --- a/vcs.mk +++ b/vcs.mk @@ -1,6 +1,3 @@ -PERMISSIVE_ON=+permissive -PERMISSIVE_OFF=+permissive-off - WAVEFORM_FLAG=+vcdplusfile=$(sim_out_name).vpd CLOCK_PERIOD ?= 1.0 diff --git a/vlsi/Makefile b/vlsi/Makefile index cd2d3d91..66813871 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -124,7 +124,6 @@ $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_file echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@ echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@ echo " execution_flags:" >> $@ - echo " - '+max-cycles=$(timeout_cycles)'" >> $@ for x in $(SIM_FLAGS); do \ echo ' - "'$$x'"' >> $@; \ done From b67c58ed1514317a14728b2520e78a6866263fe4 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 27 May 2020 11:07:41 -0700 Subject: [PATCH 14/14] ChipTop is now synthesizeable again :tada: --- vlsi/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 66813871..a724f6f1 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -178,7 +178,6 @@ ifeq ($(CUSTOM_VLOG), ) GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF)) endif -#TODO: remove filter-out once PR#572 is merged $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) mkdir -p $(dir $@) echo "sim.inputs:" > $@ @@ -190,7 +189,7 @@ $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) echo "synthesis.inputs:" >> $@ echo " top_module: $(VLSI_TOP)" >> $@ echo " input_files:" >> $@ - for x in $(VLSI_RTL) $(filter-out %SimDRAM.v,$(filter-out %.cc,$(shell cat $(VLSI_BB)))); do \ + for x in $(VLSI_RTL) $(shell cat $(VLSI_BB)); do \ echo ' - "'$$x'"' >> $@; \ done