updated skywater tutorials

This commit is contained in:
nayiri-k
2023-03-09 11:35:41 -08:00
parent d5f1dd9bcb
commit 15d001fe0c
3 changed files with 198 additions and 62 deletions

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@@ -47,7 +47,25 @@ Prerequisites
* Python 3.9+
* Genus, Innovus, Voltus, VCS, and Calibre licenses
* Sky130 PDK, install using `these directions <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
* Sky130A PDK, install `using conda <https://anaconda.org/litex-hub/open_pdks.sky130a>`__ or `these directions <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
* `Sram22 Sky130 SRAM macros <https://github.com/rahulk29/sram22_sky130_macros>`__
* These SRAM macros were generated using the `Sram22 SRAM generator <https://github.com/rahulk29/sram22>`__ (still very heavily under development)
Prerequisite Setup with Conda
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
As of recently, most of the prerequisites of this tutorial may now be installed as conda packages.
The setup of these tools may eventually be scripted, but for now here are the directions to set them up:
.. code-block:: shell
# create conda environment named "osflow"
conda create -n osflow
# download all files for Sky130A PDK
conda install -n osflow -c litex-hub open_pdks.sky130a
# clone the SRAM22 Sky130 SRAM macros to a convenient location
git clone https://github.com/rahulk29/sram22_sky130_macros
Initial Setup
-------------
@@ -59,6 +77,38 @@ In the Chipyard root, ensure that you have the Chipyard conda environment activa
to pull and install the plugin submodules. Note that for technologies other than ``sky130`` or ``asap7``, the tech submodule must be added in the ``vlsi`` folder first.
Now navigate to the ``vlsi`` directory. The remainder of the tutorial will assume you are in this directory.
We will summarize a few files in this directory that will be important for the rest of the tutorial.
.. code-block:: shell
cd ~chipyard/vlsi
example-vlsi-sky130
^^^^^^^^^^^^^^^^^^^
This is the entry script with placeholders for hooks. In the ``ExampleDriver`` class, a list of hooks is passed in the ``get_extra_par_hooks``. Hooks are additional snippets of python and TCL (via ``x.append()``) to extend the Hammer APIs. Hooks can be inserted using the ``make_pre/post/replacement_hook`` methods as shown in this example. Refer to the Hammer documentation on hooks for a detailed description of how these are injected into the VLSI flow.
example-sky130.yml
^^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for this example project. Example clock constraints, power straps definitions, placement constraints, and pin constraints are given. Additional configuration for the extra libraries and tools are at the bottom.
Add the following YAML keys to the top of this file to specify the location of the Sky130A PDK and SRAM macros.
.. code-block:: yaml
# all ~ should be replaced with absolute paths to these directories
# technology paths
technology.sky130.sky130A: ~conda/envs/osflow/share/pdk/sky130A
technology.sky130.sram22_sky130_macros: ~sram22_sky130_macros
example-tools.yml
^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for a commercial tool flow.
It selects tools for synthesis (Cadence Genus), place and route (Cadence Innovus), DRC and LVS (Mentor Calibre).
Building the Design
--------------------
To elaborate the ``TinyRocketConfig`` and set up all prerequisites for the build system to push the design and SRAM macros through the flow:
@@ -76,7 +126,7 @@ which will cause additional variables to be set in ``tutorial.mk``, a few of whi
* ``CONFIG=TinyRocketConfig`` selects the target generator config in the same manner as the rest of the Chipyard framework. This elaborates a stripped-down Rocket Chip in the interest of minimizing tool runtime.
* ``tech_name=sky130`` sets a few more necessary paths in the ``Makefile``, such as the appropriate Hammer plugin
* ``TOOLS_CONF`` and ``TECH_CONF`` select the approproate YAML configuration files, ``example-tools.yml`` and ``example-sky130.yml``, which are described below
* ``TOOLS_CONF`` and ``TECH_CONF`` select the approproate YAML configuration files, ``example-tools.yml`` and ``example-sky130.yml``, which are described above
* ``DESIGN_CONF`` and ``EXTRA_CONFS`` allow for additonal design-specific overrides of the Hammer IR in ``example-sky130.yml``
* ``VLSI_OBJ_DIR=build-sky130-commercial`` gives the build directory a unique name to allow running multiple flows in the same repo. Note that for the rest of the tutorial we will still refer to this directory in file paths as ``build``, again for brevity.
* ``VLSI_TOP`` is by default ``ChipTop``, which is the name of the top-level Verilog module generated in the Chipyard SoC configs. By instead setting ``VLSI_TOP=Rocket``, we can use the Rocket core as the top-level module for the VLSI flow, which consists only of a single RISC-V core (and no caches, peripherals, buses, etc). This is useful to run through this tutorial quickly, and does not rely on any SRAMs.
@@ -84,24 +134,6 @@ which will cause additional variables to be set in ``tutorial.mk``, a few of whi
Running the VLSI Flow
---------------------
example-vlsi-sky130
^^^^^^^^^^^^^^^^^^^
This is the entry script with placeholders for hooks. In the ``ExampleDriver`` class, a list of hooks is passed in the ``get_extra_par_hooks``. Hooks are additional snippets of python and TCL (via ``x.append()``) to extend the Hammer APIs. Hooks can be inserted using the ``make_pre/post/replacement_hook`` methods as shown in this example. Refer to the Hammer documentation on hooks for a detailed description of how these are injected into the VLSI flow.
example-sky130.yml
^^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for this example project. Example clock constraints, power straps definitions, placement constraints, and pin constraints are given. Additional configuration for the extra libraries and tools are at the bottom.
First, set ``technology.sky130.sky130A/sky130_nda/openram_lib`` to the absolute path of the respective directories containing the Sky130 PDK and SRAM files. See the
`Sky130 Hammer plugin README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
for details about the PDK setup.
example-tools.yml
^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for a commercial tool flow.
It selects tools for synthesis (Cadence Genus), place and route (Cadence Innovus), DRC and LVS (Mentor Calibre).
Synthesis
^^^^^^^^^
.. code-block:: shell
@@ -129,9 +161,9 @@ To run DRC & LVS, and view the results in Calibre:
.. code-block:: shell
make drc tutorial=sky130-commercial
./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/drc-rundir/generated-scripts/view_drc
./build/drc-rundir/generated-scripts/view_drc
make lvs tutorial=sky130-commercial
./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/lvs-rundir/generated-scripts/view_lvs
./build/lvs-rundir/generated-scripts/view_lvs
Some DRC errors are expected from this PDK, especially with regards to the SRAMs, as explained in the
`Sky130 Hammer plugin README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__.
@@ -160,3 +192,20 @@ Post-P&R power and rail (IR drop) analysis is supported with Voltus:
If you append the ``BINARY`` variable to the command, it will use the activity file generated from a ``sim-<syn/par>-debug`` run and report dynamic power & IR drop from the toggles encoded in the waveform.
To bypass gate-level simulation, you will need to run the power tool manually (see the generated commands in the generated ``hammer.d`` buildfile). Static and active (vectorless) power & IR drop will be reported.
VLSI Flow Control
^^^^^^^^^^^^^^^^^
Firt, refer to the :ref:`VLSI/Hammer:VLSI Flow Control` documentation. The below examples use the ``redo-par`` Make target to re-run only place-and-route. ``redo-`` may be prepended to any of the VLSI flow actions to re-run only that action.
.. code-block:: shell
# the following two statements are equivalent because the
# extraction step immediately precedes the write_design step
make redo-par HAMMER_EXTRA_ARGS="--start_after_step extraction"
make redo-par HAMMER_EXTRA_ARGS="--start_before_step write_design"
# example of re-running only floorplanning to test out a new floorplan configuration
# the "-p file.yml" causes file.yml to override any previous yaml/json configurations
make redo-par \
HAMMER_EXTRA_ARGS="--only_step floorplan_design -p example-designs/sky130-openroad.yml"

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@@ -20,7 +20,7 @@ This example gives a suggested file structure and build system. The ``vlsi/`` fo
* ``env.yml``
* A template file for tool environment configuration. Fill in the install and license server paths for your environment. For SLICE and BWRC affiliates, example environment configs are found `here <https://github.com/ucb-bar/hammer/tree/master/e2e/env>`__.
* This file is not used in this tutorial, but is required for the commercial tool flow. A template file for tool environment configuration. Fill in the install and license server paths for your environment. For SLICE and BWRC affiliates, example environment configs are found `here <https://github.com/ucb-bar/hammer/tree/master/e2e/env>`__.
* ``example-vlsi-sky130``
@@ -28,7 +28,7 @@ This example gives a suggested file structure and build system. The ``vlsi/`` fo
* ``example-sky130.yml``, ``example-openroad.yml``, ``example-designs/sky130-openroad.yml``
* Hammer IR for this tutorial. For SLICE and BWRC affiliates, an example ASAP7 config is found `here <https://github.com/ucb-bar/hammer/tree/master/e2e/pdks>`__.
* Hammer IR for this tutorial. For SLICE and BWRC affiliates, an example Sky130 config is found `here <https://github.com/ucb-bar/hammer/tree/master/e2e/pdks>`__.
* ``example-design.yml``, ``example-asap7.yml``, ``example-tech.yml``
@@ -48,12 +48,36 @@ Prerequisites
* Python 3.9+
* OpenROAD flow tools:
* Yosys (synthesis), install `from source <https://yosyshq.net/yosys/download.html>`__ or `using conda <https://anaconda.org/TimVideos/yosys>`__
* OpenROAD (place-and-route), install `from source <https://openroad.readthedocs.io/en/latest/main/README.html#install-dependencies>`__
* Magic (DRC), install `from source <http://www.opencircuitdesign.com/magic/install.html>`__
* NetGen (LVS), install `from source <http://www.opencircuitdesign.com/netgen/install.html>`__ or `using conda <https://anaconda.org/conda-forge/netgen>`__
* Yosys (synthesis), install `using conda <https://anaconda.org/litex-hub/yosys>`__ or `from source <https://yosyshq.net/yosys/download.html>`__
* OpenROAD (place-and-route), install `using conda <https://anaconda.org/litex-hub/openroad>`__ (note that GUI is disabled in conda package) or `from source <https://openroad.readthedocs.io/en/latest/main/README.html#install-dependencies>`__
* KLayout (DEF to GDSII conversion), install `using conda <https://anaconda.org/litex-hub/klayout>`__ or `from source <https://www.klayout.de/build.html>`__
* Magic (DRC), , install `using conda <https://anaconda.org/litex-hub/magic>`__ or `from source <http://www.opencircuitdesign.com/magic/install.html>`__
* NetGen (LVS), , install `using conda <https://anaconda.org/litex-hub/netgen>`__ or `from source <http://www.opencircuitdesign.com/netgen/install.html>`__
* Sky130 PDK, install using `these directions <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
* Sky130A PDK, install `using conda <https://anaconda.org/litex-hub/open_pdks.sky130a>`__ or `these directions <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
* `Sram22 Sky130 SRAM macros <https://github.com/rahulk29/sram22_sky130_macros>`__
* These SRAM macros were generated using the `Sram22 SRAM generator <https://github.com/rahulk29/sram22>`__ (still very heavily under development)
Prerequisite Setup with Conda
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
As of recently, most of the prerequisites of this tutorial may now be installed as conda packages.
The setup of these tools may eventually be scripted, but for now here are the directions to set them up:
.. code-block:: shell
# create conda environment named "osflow"
conda create -n osflow
# download all files for Sky130A PDK
conda install -n osflow -c litex-hub open_pdks.sky130a
# install all VLSI tools
conda install -n osflow -c litex-hub yosys
conda install -n osflow -c litex-hub openroad
conda install -n osflow -c litex-hub klayout
conda install -n osflow -c litex-hub magic
conda install -n osflow -c litex-hub netgen
# clone the SRAM22 Sky130 SRAM macros to a convenient location
git clone https://github.com/rahulk29/sram22_sky130_macros
Initial Setup
-------------
@@ -66,31 +90,13 @@ In the Chipyard root, ensure that you have the Chipyard conda environment activa
to pull and install the plugin submodules. Note that for technologies other than ``sky130`` or ``asap7``, the tech submodule is cloned in the ``vlsi`` folder,
and for the commercial tool flow (set up by omitting the ``openroad`` argument), the tool plugin submodules are cloned into the ``vlsi`` folder.
Building the Design
--------------------
To elaborate the ``TinyRocketConfig`` and set up all prerequisites for the build system to push the design and SRAM macros through the flow:
Now navigate to the ``vlsi`` directory. The remainder of the tutorial will assume you are in this directory.
We will summarize a few files in this directory that will be important for the rest of the tutorial.
.. code-block:: shell
make buildfile tutorial=sky130-openroad
cd ~chipyard/vlsi
The command ``make buildfile`` generates a set of Make targets in ``build/hammer.d``.
It needs to be re-run if environment variables are changed.
It is recommended that you edit these variables directly in the Makefile rather than exporting them to your shell environment.
For the purpose of brevity, in this tutorial we will set the Make variable ``tutorial=sky130-openroad``,
which will cause additional variables to be set in ``tutorial.mk``, a few of which are summarized as follows:
* ``CONFIG=TinyRocketConfig`` selects the target generator config in the same manner as the rest of the Chipyard framework. This elaborates a stripped-down Rocket Chip in the interest of minimizing tool runtime.
* ``tech_name=sky130`` sets a few more necessary paths in the ``Makefile``, such as the appropriate Hammer plugin
* ``TOOLS_CONF`` and ``TECH_CONF`` select the approproate YAML configuration files, ``example-openroad.yml`` and ``example-sky130.yml``, which are described below
* ``DESIGN_CONF`` and ``EXTRA_CONFS`` allow for additonal design-specific overrides of the Hammer IR in ``example-sky130.yml``
* ``VLSI_OBJ_DIR=build-sky130-openroad`` gives the build directory a unique name to allow running multiple flows in the same repo. Note that for the rest of the tutorial we will still refer to this directory in file paths as ``build``, again for brevity.
* ``VLSI_TOP`` is by default ``ChipTop``, which is the name of the top-level Verilog module generated in the Chipyard SoC configs. By instead setting ``VLSI_TOP=Rocket``, we can use the Rocket core as the top-level module for the VLSI flow, which consists only of a single RISC-V core (and no caches, peripherals, buses, etc). This is useful to run through this tutorial quickly, and does not rely on any SRAMs.
* ``ENABLE_CUSTOM_FIRRTL_PASS = 1`` is required for synthesis through Yosys. This reverts to the Scala FIRRTL Compiler so that unsupported multidimensional arrays are not generated in the Verilog.
Running the VLSI Flow
---------------------
example-vlsi-sky130
^^^^^^^^^^^^^^^^^^^
@@ -101,16 +107,61 @@ example-sky130.yml
^^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for this example project. Example clock constraints, power straps definitions, placement constraints, and pin constraints are given. Additional configuration for the extra libraries and tools are at the bottom.
First, set ``technology.sky130.<sky130A, openram_lib>`` to the absolute path of the respective directories containing the Sky130 PDK and SRAM files. See the
`Sky130 Hammer plugin README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
for details about the PDK setup.
Add the following YAML keys to the top of this file to specify the location of the Sky130A PDK and SRAM macros.
.. code-block:: yaml
# all ~ should be replaced with absolute paths to these directories
# technology paths
technology.sky130.sky130A: ~conda/envs/osflow/share/pdk/sky130A
technology.sky130.sram22_sky130_macros: ~sram22_sky130_macros
example-openroad.yml
^^^^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for the OpenROAD tool flow.
It selects tools for synthesis (Yosys), place and route (OpenROAD), DRC (Magic), and LVS (NetGen).
Add the following YAML keys to the top of this file to specify the locations of the tool binaries.
Note that this is not required if the tools are already on your PATH.
.. code-block:: yaml
# all ~ should be replaced with absolute paths to these directories
# tool binary paths
synthesis.yosys.yosys_bin: ~conda/envs/osflow/bin/yosys
par.openroad.openroad_bin: ~conda/envs/osflow/bin/openroad
par.openroad.klayout_bin: ~conda/envs/osflow/bin/klayout
drc.magic.magic_bin: ~conda/envs/osflow/bin/magic
lvs.netgen.netgen_bin: ~conda/envs/osflow/bin/netgen
Building the Design
--------------------
To elaborate the ``TinyRocketConfig`` and set up all prerequisites for the build system to push the design and SRAM macros through the flow:
.. code-block:: shell
make buildfile tutorial=sky130-openroad
The command ``make buildfile`` generates a set of Make targets in ``build/hammer.d``.
It needs to be re-run if environment variables are changed.
It is recommended that you edit these variables directly in the Makefile rather than exporting them to your shell environment.
For the sake of brevity, in this tutorial we will set the Make variable ``tutorial=sky130-openroad``,
which will cause additional variables to be set in ``tutorial.mk``, a few of which are summarized as follows:
* ``CONFIG=TinyRocketConfig`` selects the target generator config in the same manner as the rest of the Chipyard framework. This elaborates a stripped-down Rocket Chip in the interest of minimizing tool runtime.
* ``tech_name=sky130`` sets a few more necessary paths in the ``Makefile``, such as the appropriate Hammer plugin
* ``TOOLS_CONF`` and ``TECH_CONF`` select the approproate YAML configuration files, ``example-openroad.yml`` and ``example-sky130.yml``, which are described above
* ``DESIGN_CONF`` and ``EXTRA_CONFS`` allow for additonal design-specific overrides of the Hammer IR in ``example-sky130.yml``
* ``VLSI_OBJ_DIR=build-sky130-openroad`` gives the build directory a unique name to allow running multiple flows in the same repo. Note that for the rest of the tutorial we will still refer to this directory in file paths as ``build``, again for brevity.
* ``VLSI_TOP`` is by default ``ChipTop``, which is the name of the top-level Verilog module generated in the Chipyard SoC configs. By instead setting ``VLSI_TOP=Rocket``, we can use the Rocket core as the top-level module for the VLSI flow, which consists only of a single RISC-V core (and no caches, peripherals, buses, etc). This is useful to run through this tutorial quickly, and does not rely on any SRAMs.
* ``ENABLE_YOSYS_FLOW = 1`` is required for synthesis through Yosys. This reverts to the Scala FIRRTL Compiler so that unsupported multidimensional arrays are not generated in the Verilog.
Running the VLSI Flow
---------------------
Synthesis
^^^^^^^^^
@@ -129,37 +180,73 @@ Place-and-Route
make par tutorial=sky130-openroad
After completion, the final database can be opened in an interactive OpenROAD session.
Hammer generates a convenient script to launch these sessions
.. code-block:: shell
cd ./build/par-rundir
./generated-scripts/open_chip
Note that the conda OpenROAD package was compiled with the GUI disabled, so in order to view the layout,
you will need to install OpenROAD from source.
Below is the post-PnR layout for the TinyRocketConfig in Sky130 generated by OpenROAD.
.. image:: ../_static/images/vlsi-openroad-par-tinyrocketconfig.png
Intermediate databases are written in ``build/par-rundir`` between each step of the ``par`` action. These databases can be restored in an interactive OpenROAD session as desired for debugging purposes.
Intermediate databases are written in ``build/par-rundir`` between each step of the ``par`` action,
These databases can be restored using the same ``open_chip`` script for debugging purposes.
.. code-block:: shell
openroad # launch OpenROAD tool
openroad> read_db pre_global_route
cd build/par-rundir
./generated_scripts/open_chip -h
"
Usage: ./generated-scripts/open_chip [-t] [openroad_db_name]
Options
openroad_db_name : Name of database to load (default=latest)
-t, --timing : Load timing info (default=disabled because of slow load time)
-h, --help : Display this message
"
# load pre-global route database without timing information
./generated_scripts/open_chip pre_global_route
# load post-clock tree database with timing inforamtion
./generated_scripts/open_chip -t post_clock_tree
.. Timing reports are found in ``build/par-rundir/timingReports``. They are gzipped text files.
See the `OpenROAD tool plugin <https://github.com/ucb-bar/hammer/blob/master/hammer/par/openroad>`__ for the full list of OpenROAD tool steps and their implementations.
DRC & LVS
^^^^^^^^^
To run DRC & LVS:
As a note, this tutorial has been run extensively through commercial signoff tools,
thus the open-source signoff flow is not stable or guaranteed to produce useful results.
We welcome any contributions to improving both our `Magic tool plugin <https://github.com/ucb-bar/hammer/blob/master/hammer/drc/magic>`__
and `Netgen tool plugin <https://github.com/ucb-bar/hammer/blob/master/hammer/lvs/netgen>`__.
To run DRC & LVS in Magic & Netgen, respectively:
.. code-block:: shell
make drc tutorial=sky130-openroad
./build/drc-rundir/generated-scripts/view_drc
make lvs tutorial=sky130-openroad
./build/lvs-rundir/generated-scripts/view_lvs
Some DRC errors are expected from this PDK, especially with regards to the SRAMs, as explained in the
`Sky130 Hammer plugin README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__.
Note that in ``sky130-openroad.yml`` we have set the following YAML keys:
.. code-block:: yaml
drc.magic.generate_only: true
lvs.netgen.generate_only: true
These keys cause the Hammer plugin to only generate all necessary scripts, without executing them with the respective tool.
This is because Magic and Netgen, as of the writing of this tutorial, do not have a database format that may be loaded interactively,
so to view the DRC/LVS results for debugging you must launch the tool interactively, then run DRC/LVS checks,
which is done by the ``generated-scripts/view_[drc|lvs]`` scripts.
VLSI Flow Control
@@ -174,9 +261,9 @@ Firt, refer to the :ref:`VLSI/Hammer:VLSI Flow Control` documentation. The below
make redo-par HAMMER_EXTRA_ARGS="--start_before_step write_design"
# example of re-running only floorplanning to test out a new floorplan configuration
make redo-par HAMMER_EXTRA_ARGS="--only_step floorplan_design -p example-sky130.yml"
See the `OpenROAD tool plugin <https://github.com/ucb-bar/hammer/blob/master/hammer/par/openroad>`__ for the full list of OpenROAD tool steps and their implementations.
# the "-p file.yml" causes file.yml to override any previous yaml/json configurations
make redo-par \
HAMMER_EXTRA_ARGS="--only_step floorplan_design -p example-designs/sky130-openroad.yml"
Documentation
-------------

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