renamed clock_clock to clock_uncore_clock

2023-06-30 15:04:38 -07:00
parent dcaca02e14
commit 222059941e
7 changed files with 8 additions and 8 deletions
--- a/vlsi/example-designs/sky130-commercial.yml
+++ b/vlsi/example-designs/sky130-commercial.yml
@@ -2,7 +2,7 @@

 # Specify clock signals
 vlsi.inputs.clocks: [
-  {name: "clock_clock", period: "30ns", uncertainty: "2ns"}
+  {name: "clock_uncore_clock", period: "30ns", uncertainty: "2ns"}
 ]

 # Placement Constraints
@@ -16,4 +16,4 @@ vlsi.inputs.clocks: [
 #     - path: "ChipTop"
 #       ...
 #       margins:
-#         right: 0  # or left: 0
+#         right: 0  # or left: 0