Add verbose to debug runs (#148)

* Add verbose to debug runs

* Reorg simulator flags for consistency, extensibility, and ease of use
This commit is contained in:
Colin Schmidt
2019-07-15 22:15:57 -07:00
committed by GitHub
parent f7d0e19b75
commit 26a67fdbad
4 changed files with 23 additions and 18 deletions

View File

@@ -148,7 +148,8 @@ output_dir=$(sim_dir)/output/$(long_name)
# helper variables to run binaries
#########################################################################################
BINARY ?=
SIM_FLAGS ?= +max-cycles=$(timeout_cycles)
SIM_FLAGS ?=
VERBOSE_FLAGS ?= +verbose
sim_out_name = $(notdir $(basename $(BINARY))).$(long_name)
#########################################################################################