diff --git a/generators/chipyard/src/main/scala/config/RocketConfigs.scala b/generators/chipyard/src/main/scala/config/RocketConfigs.scala
index 308ebc39..7c4de6f5 100644
--- a/generators/chipyard/src/main/scala/config/RocketConfigs.scala
+++ b/generators/chipyard/src/main/scala/config/RocketConfigs.scala
@@ -34,6 +34,12 @@ class GemminiRocketConfig extends Config(
   new chipyard.config.AbstractConfig)
 // DOC include end: GemminiRocketConfig
 
+class FPGemminiRocketConfig extends Config(
+  new gemmini.GemminiFP32DefaultConfig ++                         // use FP32Gemmini systolic array GEMM accelerator
+  new freechips.rocketchip.subsystem.WithNBigCores(1) ++
+  new chipyard.config.AbstractConfig)
+
+
 // DOC include start: DmiRocket
 class dmiRocketConfig extends Config(
   new chipyard.harness.WithSerialAdapterTiedOff ++               // don't attach an external SimSerial
diff --git a/generators/gemmini b/generators/gemmini
index e6e14f71..1a6ed243 160000
--- a/generators/gemmini
+++ b/generators/gemmini
@@ -1 +1 @@
-Subproject commit e6e14f711760b976d8eb00c32d0fe2423aeda211
+Subproject commit 1a6ed243874c8306e747d0f80b7773d3e2e1a3cc
diff --git a/toolchains/esp-tools/riscv-isa-sim b/toolchains/esp-tools/riscv-isa-sim
index fa94e84d..a4ed25a9 160000
--- a/toolchains/esp-tools/riscv-isa-sim
+++ b/toolchains/esp-tools/riscv-isa-sim
@@ -1 +1 @@
-Subproject commit fa94e84d4ff3e23ba909a63376b294e444234752
+Subproject commit a4ed25a96fdb47642b39d893b7e1ca36d07700aa