From 283111113468b039edbb0493f9f76a2261cfa2a0 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Mon, 20 Mar 2023 11:20:31 -0700 Subject: [PATCH] Mention custom ChipTop in documentation' --- docs/Advanced-Concepts/Top-Testharness.rst | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/docs/Advanced-Concepts/Top-Testharness.rst b/docs/Advanced-Concepts/Top-Testharness.rst index 23f3f56a..e412eeff 100644 --- a/docs/Advanced-Concepts/Top-Testharness.rst +++ b/docs/Advanced-Concepts/Top-Testharness.rst @@ -18,6 +18,13 @@ The ``IOBinders`` are responsible for instantiating the IO cells for ``ChipTop`` The ``HarnessBinders`` are responsible for instantiating test harness collateral that connects to the ``ChipTop`` ports. Most types of devices and testing collateral can be instantiated using custom ``IOBinders`` and ``HarnessBinders``. +Custom ChipTops +^^^^^^^^^^^^^^^^^^^^^^^^^ + +The default standard ``ChipTop`` provides a mimimal, barebones template for ``IOBinders`` to generate IOCells around ``DigitalTop`` traits. +For tapeouts, integrating Analog IP, or other non-standard use cases, Chipyard supports specifying a custom ``ChipTop`` using the ``BuildTop`` key. +An example of a custom ChipTop which uses non-standard IOCells is provided in `generators/chipyard/src/main/scala/example/CustomChipTop.scala `__ + System/DigitalTop -------------------------