Remove Dromajo + documentation
This commit is contained in:
3
.gitmodules
vendored
3
.gitmodules
vendored
@@ -64,9 +64,6 @@
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[submodule "software/nvdla-workload"]
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[submodule "software/nvdla-workload"]
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path = software/nvdla-workload
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path = software/nvdla-workload
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url = https://github.com/ucb-bar/nvdla-workload.git
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url = https://github.com/ucb-bar/nvdla-workload.git
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[submodule "tools/dromajo/dromajo-src"]
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path = tools/dromajo/dromajo-src
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url = https://github.com/riscv-boom/dromajo.git
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[submodule "generators/riscv-sodor"]
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[submodule "generators/riscv-sodor"]
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path = generators/riscv-sodor
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path = generators/riscv-sodor
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url = https://github.com/ucb-bar/riscv-sodor.git
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url = https://github.com/ucb-bar/riscv-sodor.git
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@@ -68,7 +68,6 @@ include $(base_dir)/generators/cva6/cva6.mk
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include $(base_dir)/generators/ibex/ibex.mk
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include $(base_dir)/generators/ibex/ibex.mk
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include $(base_dir)/generators/tracegen/tracegen.mk
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include $(base_dir)/generators/tracegen/tracegen.mk
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include $(base_dir)/generators/nvdla/nvdla.mk
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include $(base_dir)/generators/nvdla/nvdla.mk
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include $(base_dir)/tools/dromajo/dromajo.mk
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include $(base_dir)/tools/torture.mk
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include $(base_dir)/tools/torture.mk
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#########################################################################################
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#########################################################################################
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@@ -29,7 +29,6 @@ dependencies:
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- conda-gcc-specs
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- conda-gcc-specs
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- binutils
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- binutils
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- dromajo # from ucb-bar channel - https://github.com/riscv-boom/dromajo
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- firtool==1.30.0 # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock
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- firtool==1.30.0 # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock
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# misc
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# misc
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,33 +0,0 @@
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Debugging BOOM
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======================
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In addition to the default debugging techniques specified in :ref:`Advanced-Concepts/Debugging-RTL:Debugging RTL`,
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single-core BOOM designs can utilize the Dromajo co-simulator (see :ref:`Tools/Dromajo:Dromajo`)
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to verify functionality.
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.. warning:: Dromajo currently only works in single-core BOOM systems without accelerators.
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.. warning:: Dromajo currently only works in VCS simulation and FireSim.
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Setting up Dromajo Co-simulation
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--------------------------------------
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Dromajo co-simulation is setup to work when three config fragments are added to a BOOM config.
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* A ``chipyard.config.WithTraceIO`` config fragment must be added so that BOOM's traceport is enabled.
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* A ``chipyard.iobinders.WithTraceIOPunchthrough`` config fragment must be added to add the ``TraceIO`` to the ``ChipTop``
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* A ``chipyard.harness.WithSimDromajoBridge`` config fragment must be added to instantiate a Dromajo cosimulator in the ``TestHarness`` and connect it to the ``ChipTop``'s ``TraceIO``
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Once all config fragments are added Dromajo should be enabled.
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To build/run Dromajo with a BOOM design, run your configuration the following make commands:
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.. code-block:: shell
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# build the default Dromajo BOOM config without waveform dumps
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# replace "DromajoBoomConfig" with your particular config
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make CONFIG=DromajoBoomConfig ENABLE_DROMAJO=1
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# run a simulation with Dromajo
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make CONFIG=DromajoBoomConfig ENABLE_DROMAJO=1 BINARY=<YOUR-BIN> run-binary
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@@ -100,6 +100,6 @@ You can find the overnight options in `overnight/src/main/scala/main.scala` in t
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Firesim Debugging
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Firesim Debugging
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---------------------------
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---------------------------
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Chisel printfs, asserts, Dromajo co-simulation, and waveform generation are also available in FireSim
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Chisel printfs, asserts, Cospike co-simulation, and waveform generation are also available in FireSim
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FPGA-accelerated simulation. See the FireSim
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FPGA-accelerated simulation. See the FireSim
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`documentation <https://docs.fires.im/en/latest/>`__ for more detail.
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`documentation <https://docs.fires.im/en/latest/>`__ for more detail.
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@@ -86,10 +86,6 @@ Tools
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**Dsptools**
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**Dsptools**
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A Chisel library for writing custom signal processing hardware, as well as integrating custom signal processing hardware into an SoC (especially a Rocket-based SoC).
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A Chisel library for writing custom signal processing hardware, as well as integrating custom signal processing hardware into an SoC (especially a Rocket-based SoC).
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**Dromajo**
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A RV64GC emulator primarily used for co-simulation and was originally developed by Esperanto Technologies.
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See :ref:`Tools/Dromajo:Dromajo` for more information.
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Toolchains
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Toolchains
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-------------------------------------------
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-------------------------------------------
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@@ -1,22 +0,0 @@
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Dromajo
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===============================
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`Dromajo <https://github.com/chipsalliance/dromajo/>`__ is a RV64GC functional simulator designed for co-simulation.
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To use it as a co-simulator, it requires you to pass the committed trace of instructions coming from the core into the tool.
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Within Chipyard, this is done by connecting to the `TracePort`` signals that are piped to the top level of the DUT.
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While the Rocket core does have a `TracePort`, it does not provide the committed write data that Dromajo requires.
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Thus, Dromajo uses the `ExtendedTracePort` only probided by BOOM (BOOM is the only core that supports Dromajo co-simulation).
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An example of a divergence and Dromajo's printout is shown below.
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.. code-block:: shell
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[error] EMU PC ffffffe001055d84, DUT PC ffffffe001055d84
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[error] EMU INSN 14102973, DUT INSN 14102973
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[error] EMU WDATA 00000000000220d6, DUT WDATA 00000000000220d4
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[error] EMU MSTATUS a000000a0, DUT MSTATUS 00000000
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[error] DUT pending exception -1 pending interrupt -1
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Dromajo shows the divergence compared to simulation (PC, inst, inst-bits, write data, etc) and also provides the register state on failure.
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It is useful to catch bugs that affect architectural state before a simulation hangs or crashes.
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To use Dromajo with BOOM, refer to :ref:`Advanced-Concepts/Debugging-RTL:Debugging RTL` section on Dromajo.
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@@ -13,4 +13,3 @@ The following pages will introduce them, and how we can use them in order to gen
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Treadle
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Treadle
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Dsptools
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Dsptools
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Barstools
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Barstools
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Dromajo
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@@ -24,7 +24,7 @@ import freechips.rocketchip.amba.axi4._
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import boom.common.{BoomTile}
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import boom.common.{BoomTile}
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import testchipip.{DromajoHelper, CanHavePeripheryTLSerial, SerialTLKey}
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import testchipip.{CanHavePeripheryTLSerial, SerialTLKey}
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trait CanHaveHTIF { this: BaseSubsystem =>
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trait CanHaveHTIF { this: BaseSubsystem =>
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// Advertise HTIF if system can communicate with fesvr
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// Advertise HTIF if system can communicate with fesvr
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@@ -124,7 +124,4 @@ class ChipyardSubsystem(implicit p: Parameters) extends BaseSubsystem
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class ChipyardSubsystemModuleImp[+L <: ChipyardSubsystem](_outer: L) extends BaseSubsystemModuleImp(_outer)
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class ChipyardSubsystemModuleImp[+L <: ChipyardSubsystem](_outer: L) extends BaseSubsystemModuleImp(_outer)
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with HasTilesModuleImp
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with HasTilesModuleImp
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{
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{
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// Generate C header with relevant information for Dromajo
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// This is included in the `dromajo_params.h` header file
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DromajoHelper.addArtefacts(InSubsystem)
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}
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}
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@@ -41,13 +41,6 @@ class LoopbackNICLargeBoomConfig extends Config(
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new chipyard.config.WithSystemBusWidth(128) ++
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new chipyard.config.WithSystemBusWidth(128) ++
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new chipyard.config.AbstractConfig)
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new chipyard.config.AbstractConfig)
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class DromajoBoomConfig extends Config(
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new chipyard.harness.WithSimDromajoBridge ++ // attach Dromajo
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new chipyard.config.WithTraceIO ++ // enable the traceio
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new boom.common.WithNSmallBooms(1) ++
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new chipyard.config.WithSystemBusWidth(128) ++
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new chipyard.config.AbstractConfig)
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class MediumBoomCosimConfig extends Config(
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class MediumBoomCosimConfig extends Config(
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new chipyard.harness.WithCospike ++ // attach spike-cosim
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new chipyard.harness.WithCospike ++ // attach spike-cosim
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new chipyard.config.WithTraceIO ++ // enable the traceio
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new chipyard.config.WithTraceIO ++ // enable the traceio
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@@ -352,12 +352,6 @@ class WithTraceGenSuccess extends OverrideHarnessBinder({
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}
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}
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})
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})
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class WithSimDromajoBridge extends ComposeHarnessBinder({
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(system: CanHaveTraceIOModuleImp, th: HasHarnessInstantiators, ports: Seq[TraceOutputTop]) => {
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ports.map { p => p.traces.map(tileTrace => SimDromajoBridge(tileTrace)(system.p)) }
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}
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})
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class WithCospike extends ComposeHarnessBinder({
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class WithCospike extends ComposeHarnessBinder({
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(system: CanHaveTraceIOModuleImp, th: HasHarnessInstantiators, ports: Seq[TraceOutputTop]) => {
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(system: CanHaveTraceIOModuleImp, th: HasHarnessInstantiators, ports: Seq[TraceOutputTop]) => {
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implicit val p = chipyard.iobinders.GetSystemParameters(system)
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implicit val p = chipyard.iobinders.GetSystemParameters(system)
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@@ -14,5 +14,5 @@ for TOOLCHAIN_TYPE in riscv-tools esp-tools; do
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# note: lock file must end in .conda-lock.yml - see https://github.com/conda-incubator/conda-lock/issues/154
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# note: lock file must end in .conda-lock.yml - see https://github.com/conda-incubator/conda-lock/issues/154
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LOCKFILE=$REQS_DIR/conda-lock-reqs/conda-requirements-$TOOLCHAIN_TYPE-linux-64.conda-lock.yml
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LOCKFILE=$REQS_DIR/conda-lock-reqs/conda-requirements-$TOOLCHAIN_TYPE-linux-64.conda-lock.yml
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conda-lock --conda $(which conda) -f "$REQS_DIR/chipyard.yaml" -f "$REQS_DIR/$TOOLCHAIN_TYPE.yaml" -p linux-64 --lockfile $LOCKFILE
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conda-lock -f "$REQS_DIR/chipyard.yaml" -f "$REQS_DIR/$TOOLCHAIN_TYPE.yaml" -p linux-64 --lockfile $LOCKFILE
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done
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done
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Submodule tools/dromajo/dromajo-src deleted from 09fbef4565
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##############################################################
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# extra variables/targets ingested by the chipyard make system
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##############################################################
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DROMAJO_DIR = $(base_dir)/tools/dromajo/dromajo-src/src
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DROMAJO_LIB_NAME = dromajo_cosim
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DROMAJO_LIB = $(CONDA_PREFIX)/lib/lib$(DROMAJO_LIB_NAME).a
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# Dromajo assumes using the default bootrom
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DROMAJO_ROM = $(build_dir)/bootrom.rv64.img
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DTS_FILE = $(build_dir)/$(long_name).dts
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DROMAJO_DTB = $(build_dir)/$(long_name).dtb
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$(DTS_FILE): $(FIRRTL_FILE)
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$(DROMAJO_DTB): $(DTS_FILE)
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dtc -I dts -O dtb -o $(DROMAJO_DTB) $(DTS_FILE)
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DROMAJO_SRCS = $(call lookup_srcs,$(DROMAJO_DIR),cc) $(call lookup_srcs,$(DROMAJO_DIR),h)
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$(DROMAJO_LIB): $(DROMAJO_SRCS)
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$(MAKE) -C $(DROMAJO_DIR)
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# depending on where the simulation is done, use the auto-variable or the hardcoded defined one
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ifeq ($(BINARY),)
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DROMAJO_BIN = $(<)
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else
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DROMAJO_BIN = $(BINARY)
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endif
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DROMAJO_FLAGS = +drj_dtb=$(DROMAJO_DTB) +drj_rom=$(DROMAJO_ROM) +drj_bin=$(DROMAJO_BIN)
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DROMAJO_PARAMS_FILE = $(build_dir)/$(long_name).dromajo_params.h
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DROMAJO_PARAMS_SYMLINK = $(build_dir)/dromajo_params.h
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$(DROMAJO_PARAMS_FILE): $(FIRRTL_FILE)
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$(DROMAJO_PARAMS_SYMLINK): $(DROMAJO_PARAMS_FILE)
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rm -rf $(DROMAJO_PARAMS_SYMLINK)
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ln -s $(DROMAJO_PARAMS_FILE) $(DROMAJO_PARAMS_SYMLINK)
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##################################################################
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# THE FOLLOWING MUST BE += operators
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##################################################################
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# simargs needed (i.e. like +drj_test=hello)
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ifdef ENABLE_DROMAJO
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EXTRA_SIM_FLAGS += $(DROMAJO_FLAGS)
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# CC flags needed for all simulations
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EXTRA_SIM_CXXFLAGS += -I$(DROMAJO_DIR)
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# sourced needed for simulation
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EXTRA_SIM_SOURCES += $(DROMAJO_LIB)
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# requirements needed for simulation
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EXTRA_SIM_REQS += $(DROMAJO_PARAMS_SYMLINK) $(DROMAJO_LIB) $(DROMAJO_DTB)
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endif
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