Remove Dromajo + documentation

This commit is contained in:
abejgonzalez
2023-09-06 13:30:24 -07:00
parent 12248a221c
commit 284f276fbb
16 changed files with 1570 additions and 1461 deletions

3
.gitmodules vendored
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@@ -64,9 +64,6 @@
[submodule "software/nvdla-workload"] [submodule "software/nvdla-workload"]
path = software/nvdla-workload path = software/nvdla-workload
url = https://github.com/ucb-bar/nvdla-workload.git url = https://github.com/ucb-bar/nvdla-workload.git
[submodule "tools/dromajo/dromajo-src"]
path = tools/dromajo/dromajo-src
url = https://github.com/riscv-boom/dromajo.git
[submodule "generators/riscv-sodor"] [submodule "generators/riscv-sodor"]
path = generators/riscv-sodor path = generators/riscv-sodor
url = https://github.com/ucb-bar/riscv-sodor.git url = https://github.com/ucb-bar/riscv-sodor.git

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@@ -68,7 +68,6 @@ include $(base_dir)/generators/cva6/cva6.mk
include $(base_dir)/generators/ibex/ibex.mk include $(base_dir)/generators/ibex/ibex.mk
include $(base_dir)/generators/tracegen/tracegen.mk include $(base_dir)/generators/tracegen/tracegen.mk
include $(base_dir)/generators/nvdla/nvdla.mk include $(base_dir)/generators/nvdla/nvdla.mk
include $(base_dir)/tools/dromajo/dromajo.mk
include $(base_dir)/tools/torture.mk include $(base_dir)/tools/torture.mk
######################################################################################### #########################################################################################

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@@ -29,7 +29,6 @@ dependencies:
- conda-gcc-specs - conda-gcc-specs
- binutils - binutils
- dromajo # from ucb-bar channel - https://github.com/riscv-boom/dromajo
- firtool==1.30.0 # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock - firtool==1.30.0 # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock
# misc # misc

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@@ -1,33 +0,0 @@
Debugging BOOM
======================
In addition to the default debugging techniques specified in :ref:`Advanced-Concepts/Debugging-RTL:Debugging RTL`,
single-core BOOM designs can utilize the Dromajo co-simulator (see :ref:`Tools/Dromajo:Dromajo`)
to verify functionality.
.. warning:: Dromajo currently only works in single-core BOOM systems without accelerators.
.. warning:: Dromajo currently only works in VCS simulation and FireSim.
Setting up Dromajo Co-simulation
--------------------------------------
Dromajo co-simulation is setup to work when three config fragments are added to a BOOM config.
* A ``chipyard.config.WithTraceIO`` config fragment must be added so that BOOM's traceport is enabled.
* A ``chipyard.iobinders.WithTraceIOPunchthrough`` config fragment must be added to add the ``TraceIO`` to the ``ChipTop``
* A ``chipyard.harness.WithSimDromajoBridge`` config fragment must be added to instantiate a Dromajo cosimulator in the ``TestHarness`` and connect it to the ``ChipTop``'s ``TraceIO``
Once all config fragments are added Dromajo should be enabled.
To build/run Dromajo with a BOOM design, run your configuration the following make commands:
.. code-block:: shell
# build the default Dromajo BOOM config without waveform dumps
# replace "DromajoBoomConfig" with your particular config
make CONFIG=DromajoBoomConfig ENABLE_DROMAJO=1
# run a simulation with Dromajo
make CONFIG=DromajoBoomConfig ENABLE_DROMAJO=1 BINARY=<YOUR-BIN> run-binary

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@@ -100,6 +100,6 @@ You can find the overnight options in `overnight/src/main/scala/main.scala` in t
Firesim Debugging Firesim Debugging
--------------------------- ---------------------------
Chisel printfs, asserts, Dromajo co-simulation, and waveform generation are also available in FireSim Chisel printfs, asserts, Cospike co-simulation, and waveform generation are also available in FireSim
FPGA-accelerated simulation. See the FireSim FPGA-accelerated simulation. See the FireSim
`documentation <https://docs.fires.im/en/latest/>`__ for more detail. `documentation <https://docs.fires.im/en/latest/>`__ for more detail.

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@@ -86,10 +86,6 @@ Tools
**Dsptools** **Dsptools**
A Chisel library for writing custom signal processing hardware, as well as integrating custom signal processing hardware into an SoC (especially a Rocket-based SoC). A Chisel library for writing custom signal processing hardware, as well as integrating custom signal processing hardware into an SoC (especially a Rocket-based SoC).
**Dromajo**
A RV64GC emulator primarily used for co-simulation and was originally developed by Esperanto Technologies.
See :ref:`Tools/Dromajo:Dromajo` for more information.
Toolchains Toolchains
------------------------------------------- -------------------------------------------

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@@ -1,22 +0,0 @@
Dromajo
===============================
`Dromajo <https://github.com/chipsalliance/dromajo/>`__ is a RV64GC functional simulator designed for co-simulation.
To use it as a co-simulator, it requires you to pass the committed trace of instructions coming from the core into the tool.
Within Chipyard, this is done by connecting to the `TracePort`` signals that are piped to the top level of the DUT.
While the Rocket core does have a `TracePort`, it does not provide the committed write data that Dromajo requires.
Thus, Dromajo uses the `ExtendedTracePort` only probided by BOOM (BOOM is the only core that supports Dromajo co-simulation).
An example of a divergence and Dromajo's printout is shown below.
.. code-block:: shell
[error] EMU PC ffffffe001055d84, DUT PC ffffffe001055d84
[error] EMU INSN 14102973, DUT INSN 14102973
[error] EMU WDATA 00000000000220d6, DUT WDATA 00000000000220d4
[error] EMU MSTATUS a000000a0, DUT MSTATUS 00000000
[error] DUT pending exception -1 pending interrupt -1
Dromajo shows the divergence compared to simulation (PC, inst, inst-bits, write data, etc) and also provides the register state on failure.
It is useful to catch bugs that affect architectural state before a simulation hangs or crashes.
To use Dromajo with BOOM, refer to :ref:`Advanced-Concepts/Debugging-RTL:Debugging RTL` section on Dromajo.

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@@ -13,4 +13,3 @@ The following pages will introduce them, and how we can use them in order to gen
Treadle Treadle
Dsptools Dsptools
Barstools Barstools
Dromajo

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@@ -24,7 +24,7 @@ import freechips.rocketchip.amba.axi4._
import boom.common.{BoomTile} import boom.common.{BoomTile}
import testchipip.{DromajoHelper, CanHavePeripheryTLSerial, SerialTLKey} import testchipip.{CanHavePeripheryTLSerial, SerialTLKey}
trait CanHaveHTIF { this: BaseSubsystem => trait CanHaveHTIF { this: BaseSubsystem =>
// Advertise HTIF if system can communicate with fesvr // Advertise HTIF if system can communicate with fesvr
@@ -124,7 +124,4 @@ class ChipyardSubsystem(implicit p: Parameters) extends BaseSubsystem
class ChipyardSubsystemModuleImp[+L <: ChipyardSubsystem](_outer: L) extends BaseSubsystemModuleImp(_outer) class ChipyardSubsystemModuleImp[+L <: ChipyardSubsystem](_outer: L) extends BaseSubsystemModuleImp(_outer)
with HasTilesModuleImp with HasTilesModuleImp
{ {
// Generate C header with relevant information for Dromajo
// This is included in the `dromajo_params.h` header file
DromajoHelper.addArtefacts(InSubsystem)
} }

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@@ -41,13 +41,6 @@ class LoopbackNICLargeBoomConfig extends Config(
new chipyard.config.WithSystemBusWidth(128) ++ new chipyard.config.WithSystemBusWidth(128) ++
new chipyard.config.AbstractConfig) new chipyard.config.AbstractConfig)
class DromajoBoomConfig extends Config(
new chipyard.harness.WithSimDromajoBridge ++ // attach Dromajo
new chipyard.config.WithTraceIO ++ // enable the traceio
new boom.common.WithNSmallBooms(1) ++
new chipyard.config.WithSystemBusWidth(128) ++
new chipyard.config.AbstractConfig)
class MediumBoomCosimConfig extends Config( class MediumBoomCosimConfig extends Config(
new chipyard.harness.WithCospike ++ // attach spike-cosim new chipyard.harness.WithCospike ++ // attach spike-cosim
new chipyard.config.WithTraceIO ++ // enable the traceio new chipyard.config.WithTraceIO ++ // enable the traceio

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@@ -352,12 +352,6 @@ class WithTraceGenSuccess extends OverrideHarnessBinder({
} }
}) })
class WithSimDromajoBridge extends ComposeHarnessBinder({
(system: CanHaveTraceIOModuleImp, th: HasHarnessInstantiators, ports: Seq[TraceOutputTop]) => {
ports.map { p => p.traces.map(tileTrace => SimDromajoBridge(tileTrace)(system.p)) }
}
})
class WithCospike extends ComposeHarnessBinder({ class WithCospike extends ComposeHarnessBinder({
(system: CanHaveTraceIOModuleImp, th: HasHarnessInstantiators, ports: Seq[TraceOutputTop]) => { (system: CanHaveTraceIOModuleImp, th: HasHarnessInstantiators, ports: Seq[TraceOutputTop]) => {
implicit val p = chipyard.iobinders.GetSystemParameters(system) implicit val p = chipyard.iobinders.GetSystemParameters(system)

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@@ -14,5 +14,5 @@ for TOOLCHAIN_TYPE in riscv-tools esp-tools; do
# note: lock file must end in .conda-lock.yml - see https://github.com/conda-incubator/conda-lock/issues/154 # note: lock file must end in .conda-lock.yml - see https://github.com/conda-incubator/conda-lock/issues/154
LOCKFILE=$REQS_DIR/conda-lock-reqs/conda-requirements-$TOOLCHAIN_TYPE-linux-64.conda-lock.yml LOCKFILE=$REQS_DIR/conda-lock-reqs/conda-requirements-$TOOLCHAIN_TYPE-linux-64.conda-lock.yml
conda-lock --conda $(which conda) -f "$REQS_DIR/chipyard.yaml" -f "$REQS_DIR/$TOOLCHAIN_TYPE.yaml" -p linux-64 --lockfile $LOCKFILE conda-lock -f "$REQS_DIR/chipyard.yaml" -f "$REQS_DIR/$TOOLCHAIN_TYPE.yaml" -p linux-64 --lockfile $LOCKFILE
done done

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@@ -1,59 +0,0 @@
##############################################################
# extra variables/targets ingested by the chipyard make system
##############################################################
DROMAJO_DIR = $(base_dir)/tools/dromajo/dromajo-src/src
DROMAJO_LIB_NAME = dromajo_cosim
DROMAJO_LIB = $(CONDA_PREFIX)/lib/lib$(DROMAJO_LIB_NAME).a
# Dromajo assumes using the default bootrom
DROMAJO_ROM = $(build_dir)/bootrom.rv64.img
DTS_FILE = $(build_dir)/$(long_name).dts
DROMAJO_DTB = $(build_dir)/$(long_name).dtb
$(DTS_FILE): $(FIRRTL_FILE)
$(DROMAJO_DTB): $(DTS_FILE)
dtc -I dts -O dtb -o $(DROMAJO_DTB) $(DTS_FILE)
DROMAJO_SRCS = $(call lookup_srcs,$(DROMAJO_DIR),cc) $(call lookup_srcs,$(DROMAJO_DIR),h)
$(DROMAJO_LIB): $(DROMAJO_SRCS)
$(MAKE) -C $(DROMAJO_DIR)
# depending on where the simulation is done, use the auto-variable or the hardcoded defined one
ifeq ($(BINARY),)
DROMAJO_BIN = $(<)
else
DROMAJO_BIN = $(BINARY)
endif
DROMAJO_FLAGS = +drj_dtb=$(DROMAJO_DTB) +drj_rom=$(DROMAJO_ROM) +drj_bin=$(DROMAJO_BIN)
DROMAJO_PARAMS_FILE = $(build_dir)/$(long_name).dromajo_params.h
DROMAJO_PARAMS_SYMLINK = $(build_dir)/dromajo_params.h
$(DROMAJO_PARAMS_FILE): $(FIRRTL_FILE)
$(DROMAJO_PARAMS_SYMLINK): $(DROMAJO_PARAMS_FILE)
rm -rf $(DROMAJO_PARAMS_SYMLINK)
ln -s $(DROMAJO_PARAMS_FILE) $(DROMAJO_PARAMS_SYMLINK)
##################################################################
# THE FOLLOWING MUST BE += operators
##################################################################
# simargs needed (i.e. like +drj_test=hello)
ifdef ENABLE_DROMAJO
EXTRA_SIM_FLAGS += $(DROMAJO_FLAGS)
# CC flags needed for all simulations
EXTRA_SIM_CXXFLAGS += -I$(DROMAJO_DIR)
# sourced needed for simulation
EXTRA_SIM_SOURCES += $(DROMAJO_LIB)
# requirements needed for simulation
EXTRA_SIM_REQS += $(DROMAJO_PARAMS_SYMLINK) $(DROMAJO_LIB) $(DROMAJO_DTB)
endif