diff --git a/common.mk b/common.mk
index bc5ace81..7c9bd0c0 100644
--- a/common.mk
+++ b/common.mk
@@ -323,7 +323,7 @@ get_common_sim_flags = $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(call get_l
 
 # run normal binary with hardware-logged insn dissassembly
 run-binary: check-binary $(BINARY).run
-run-binaries: check-binaries $(addsuffix .run,$(BINARIES))
+run-binaries: check-binaries $(addsuffix .run,$(wildcard $(BINARIES)))
 
 %.run: %.check-exists $(SIM_PREREQ) | $(output_dir)
 	(set -o pipefail && $(NUMA_PREFIX) $(sim) \
@@ -337,7 +337,7 @@ run-binaries: check-binaries $(addsuffix .run,$(BINARIES))
 
 # run simulator as fast as possible (no insn disassembly)
 run-binary-fast: check-binary $(BINARY).run.fast
-run-binaries-fast: check-binaries $(addsuffix .run.fast,$(BINARIES))
+run-binaries-fast: check-binaries $(addsuffix .run.fast,$(wildcard $(BINARIES)))
 
 %.run.fast: %.check-exists $(SIM_PREREQ) | $(output_dir)
 	(set -o pipefail && $(NUMA_PREFIX) $(sim) \
@@ -350,7 +350,7 @@ run-binaries-fast: check-binaries $(addsuffix .run.fast,$(BINARIES))
 
 # run simulator with as much debug info as possible
 run-binary-debug: check-binary $(BINARY).run.debug
-run-binaries-debug: check-binaries $(addsuffix .run.debug,$(BINARIES))
+run-binaries-debug: check-binaries $(addsuffix .run.debug,$(wildcard $(BINARIES)))
 
 %.run.debug: %.check-exists $(SIM_DEBUG_PREREQ) | $(output_dir)
 	if [ "$*" != "none" ]; then riscv64-unknown-elf-objdump -D -S $* > $(call get_sim_out_name,$*).dump ; fi
diff --git a/generators/chipyard/src/main/scala/config/RadianceConfigs.scala b/generators/chipyard/src/main/scala/config/RadianceConfigs.scala
index 8c74ca3a..c890e6af 100644
--- a/generators/chipyard/src/main/scala/config/RadianceConfigs.scala
+++ b/generators/chipyard/src/main/scala/config/RadianceConfigs.scala
@@ -19,7 +19,7 @@ class WithRadROMs(address: BigInt, size: Int, filename: String) extends Config((
 })
 
 class WithRadBootROM(address: BigInt = 0x10000, size: Int = 0x10000, hang: BigInt = 0x10100) extends Config((site, here, up) => {
-  case BootROMLocated(x) => up(BootROMLocated(x), site)
+  case BootROMLocated(x) => up(BootROMLocated(x))
     .map(_.copy(
       address = address,
       size = size,
@@ -39,8 +39,8 @@ class RadianceBaseConfig(argsBinFilename: String = "args.bin") extends Config(
   new chipyard.config.WithSystemBusWidth(bitWidth = 256) ++
   new WithExtMemSize(BigInt("80000000", 16)) ++
   new WithRadBootROM() ++
-  new WithRadROMs(0x7FFF0000L, 0x10000, s"sims/${argsBinFilename}") ++
-//  new chipyard.harness.WithCeaseSuccess ++
+  // new WithRadROMs(0x7FFF0000L, 0x10000, s"sims/${argsBinFilename}") ++
+  // new chipyard.harness.WithCeaseSuccess ++
   new chipyard.iobinders.WithCeasePunchThrough ++
   new radiance.subsystem.WithRadianceSimParams(true) ++
   new WithCacheBlockBytes(64) ++
@@ -54,21 +54,33 @@ class RadianceClusterConfig extends Config(
   new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 16, tileSize = 8) ++
   new radiance.subsystem.WithRadianceCores(4, location = InCluster(0), useVxCache = false) ++
 //  new radiance.subsystem.WithRadianceFrameBuffer(x"ff018000", 16, 0x8000, x"ff011000", "fb0") ++
-  new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 64 << 10, numBanks = 4, numWords = 8) ++
+  new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 64 << 10, numBanks = 4, numWords = 8, serializeUnaligned = true) ++
   new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
   new radiance.subsystem.WithVortexL1Banks(nBanks = 8)++
   new radiance.subsystem.WithRadianceCluster(0) ++
   new RadianceBaseConfig)
 
-class Radiance16KClusterConfig extends Config(
+class RadianceClusterSmem16KConfig extends Config(
   new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 4, tileSize = 4) ++
   new radiance.subsystem.WithRadianceCores(2, location = InCluster(0), useVxCache = false) ++
-  new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 16 << 10, numBanks = 4, numWords = 8) ++
+  new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 16 << 10, numBanks = 4, numWords = 8, serializeUnaligned = false) ++
   new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
   new radiance.subsystem.WithVortexL1Banks(nBanks = 8)++
   new radiance.subsystem.WithRadianceCluster(0) ++
   new RadianceBaseConfig)
 
+class RadianceTwoClustersSmem16KConfig extends Config(
+  new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 4, tileSize = 4) ++
+  new radiance.subsystem.WithRadianceCores(2, location = InCluster(0), useVxCache = false) ++
+  new radiance.subsystem.WithRadianceGemmini(location = InCluster(1), dim = 8, accSizeInKB = 4, tileSize = 4) ++
+  new radiance.subsystem.WithRadianceCores(2, location = InCluster(1), useVxCache = false) ++
+  new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 16 << 10, numBanks = 4, numWords = 8, serializeUnaligned = false) ++
+  new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
+  new radiance.subsystem.WithVortexL1Banks(nBanks = 8)++
+  new radiance.subsystem.WithRadianceCluster(0) ++
+  new radiance.subsystem.WithRadianceCluster(1) ++
+  new RadianceBaseConfig)
+
 class RadianceClusterConfig0 extends Config(
   new radiance.subsystem.WithRadianceCores(2, location=InCluster(0), useVxCache = false) ++
   // new radiance.subsystem.WithCoalescer(nNewSrcIds = 8, enable = false) ++
diff --git a/generators/radiance b/generators/radiance
index 17756d5f..1401c4a0 160000
--- a/generators/radiance
+++ b/generators/radiance
@@ -1 +1 @@
-Subproject commit 17756d5f530d0d2c2869531834038a20baef2311
+Subproject commit 1401c4a0908e8ec2e77109d8039d9a67024ff0d9
diff --git a/generators/rocket-chip b/generators/rocket-chip
index cf654499..c6fa6b91 160000
--- a/generators/rocket-chip
+++ b/generators/rocket-chip
@@ -1 +1 @@
-Subproject commit cf654499abf9a616cad5a235a5973d826f5ea18e
+Subproject commit c6fa6b918d91ec053424bfdec3ba47177c4c1b1c