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Adds initial Nexys Video board support.

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Co-authored-by: pznikola <p.z.nikola@etf.rs>
This commit is contained in:
Vladimir Milovanović
2023-10-05 23:01:29 +02:00
parent 7debb5f52d
commit 3d96cf5bc9
9 changed files with 290 additions and 17 deletions
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7
.github/scripts/defaults.sh vendored
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@@ -34,7 +34,7 @@ grouping["group-accels"]="chipyard-mempress chipyard-sha3 chipyard-hwacha chipya
grouping["group-constellation"]="chipyard-constellation"
grouping["group-tracegen"]="tracegen tracegen-boom"
grouping["group-other"]="icenet testchipip constellation rocketchip-amba rocketchip-tlsimple rocketchip-tlwidth rocketchip-tlxbar"
grouping["group-fpga"]="arty vcu118 vc707 arty100t"
grouping["group-fpga"]="arty arty100t nexysvideo vc707 vcu118"
# key value store to get the build strings
declare -A mapping
@@ -79,6 +79,7 @@ mapping["rocketchip-tlwidth"]="SUB_PROJECT=rocketchip CONFIG=TLWidthUnitTestConf
mapping["rocketchip-tlxbar"]="SUB_PROJECT=rocketchip CONFIG=TLXbarUnitTestConfig"
mapping["arty"]="SUB_PROJECT=arty verilog"
mapping["vcu118"]="SUB_PROJECT=vcu118 verilog"
mapping["vc707"]="SUB_PROJECT=vc707 verilog"
mapping["arty100t"]="SUB_PROJECT=arty100t verilog"
mapping["nexysvideo"]="SUB_PROJECT=nexysvideo verilog"
mapping["vc707"]="SUB_PROJECT=vc707 verilog"
mapping["vcu118"]="SUB_PROJECT=vcu118 verilog"