From 42912a196b3912591457f0d8bec82db6c5905718 Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Mon, 30 Aug 2021 15:35:02 -0700 Subject: [PATCH] Print line entirely for Verilator --- common.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common.mk b/common.mk index d756813e..65bc7129 100644 --- a/common.mk +++ b/common.mk @@ -173,7 +173,7 @@ harness_macro_temp: $(HARNESS_SMEMS_CONF) | top_macro_temp # remove duplicate files and headers in list of simulation file inputs ######################################################################################## $(sim_common_files): $(sim_files) $(sim_top_blackboxes) $(sim_harness_blackboxes) - awk '{print $$1;}' $^ | sort -u | grep -v '.*\.\(svh\|h\)$$' > $@ + awk '{print}' $^ | sort -u | grep -v '.*\.\(svh\|h\)$$' > $@ ######################################################################################### # helper rule to just make verilog files