wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Gemmini Integration (#356)

Browse Source 
* gemmini submodule

* fix build.sbt

* firechip gemmini config

* bump gemmini

* bump gemmini

* bump gemmini

* fix hwacha typo

* start gemmini docs

* bump gemmini

* gemmini docs

* Update Gemmini RST. Add quick-build instructions to Gemmini RST

* start gemmini CI

* bump gemmini

* gemmini CI fixes

* bump gemmini

* fix simulator name in gemmini CI

* cleanup gemmini CI

* bump esp-isa-sim to include gemmini

* update gemmini docs

* [ci skip] fix gemmini docs typos

* Update Gemmini.rst

Add instructions on building Gemmini programs, or writing your own programs.

* Changed order of VCS and Verilator in Gemmini docs

* Remove "make your own tests" from Gemmini README

* bump gemmini

* try to fix midasexamples CI
This commit is contained in:
alonamid
2019-12-14 01:36:42 -08:00
committed by GitHub
parent 72f9730cbd
commit 56770a1a4c
19 changed files with 205 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
.circleci/defaults.sh
View File

@@ -47,6 +47,7 @@ mapping["boom"]="SUB_PROJECT=example CONFIG=SmallBoomConfig"
mapping["rocketchip"]="SUB_PROJECT=rocketchip"
mapping["blockdevrocketchip"]="SUB_PROJECT=example CONFIG=SimBlockDeviceRocketConfig TOP=TopWithBlockDevice"
mapping["hwacha"]="SUB_PROJECT=example CONFIG=HwachaRocketConfig"
mapping["gemmini"]="SUB_PROJECT=example CONFIG=GemminiRocketConfig"
mapping["tracegen"]="SUB_PROJECT=tracegen CONFIG=NonBlockingTraceGenL2Config"
mapping["firesim"]="DESIGN=FireSim TARGET_CONFIG=DDR3FRFCFSLLC4MB_FireSimRocketChipConfig PLATFORM_CONFIG=BaseF1Config"
mapping["fireboom"]="DESIGN=FireSim TARGET_CONFIG=DDR3FRFCFSLLC4MB_FireSimBoomConfig PLATFORM_CONFIG=BaseF1Config"