diff --git a/docs/Generators/Rocket.rst b/docs/Generators/Rocket.rst index 401b9e36..53ff0575 100644 --- a/docs/Generators/Rocket.rst +++ b/docs/Generators/Rocket.rst @@ -1,8 +1,9 @@ -Rocket +Rocket Core ==================================== -`Rocket `__ is a 5-stage in-order scalar core generator that is supported by `SiFive `__. -It supports the open source RV64GC RISC-V instruction set and is written in the Chisel hardware construction language. +`Rocket `__ is a 5-stage in-order scalar processor core generator, originally developed at UC Berkeley an currently supported by `SiFive `__. The Rocket core is used as a component (a `tile`) within the Rocket Chip SoC generator. + +The Rocket core supports the open source RV64GC RISC-V instruction set and is written in the Chisel hardware construction language. It has an MMU that supports page-based virtual memory, a non-blocking data cache, and a front-end with branch prediction. Branch prediction is configurable and provided by a branch target buffer (BTB), branch history table (BHT), and a return address stack (RAS). For floating-point, Rocket makes use of Berkeley’s Chisel implementations of floating-point units. diff --git a/docs/Generators/RocketChip.rst b/docs/Generators/RocketChip.rst index b6050534..8ef12746 100644 --- a/docs/Generators/RocketChip.rst +++ b/docs/Generators/RocketChip.rst @@ -1,15 +1,15 @@ -RocketChip -========== +Rocket Chip +=========== -RocketChip is an SoC generator developed at Berkeley and now supported by -SiFive. Chipyard uses RocketChip as the basis for producing a RISC-V SoC. +Rocket Chip generator is an SoC generator developed at Berkeley and now supported by +SiFive. Chipyard uses the Rocket Chip generator as the basis for producing a RISC-V SoC. -RocketChip is distinct from Rocket, the in-order RISC-V CPU generator. -RocketChip includes many parts of the SoC besides the CPU. Though RocketChip -uses Rocket CPUs by default, it can also be configured to use the BOOM +`Rocket Chip` is distinct from `Rocket core`, the in-order RISC-V CPU generator. +Rocket Chip includes many parts of the SoC besides the CPU. Though Rocket Chip +uses Rocket core CPUs by default, it can also be configured to use the BOOM out-of-order core generator or some other custom CPU generator instead. -A detailed diagram of a typical RocketChip system is shown below. +A detailed diagram of a typical Rocket Chip system is shown below. .. image:: ../_static/images/rocketchip-diagram.png diff --git a/docs/Generators/index.rst b/docs/Generators/index.rst index a147ffeb..cd7d55ec 100644 --- a/docs/Generators/index.rst +++ b/docs/Generators/index.rst @@ -11,7 +11,7 @@ The following pages introduce the generators integrated with the Chipyard framew :maxdepth: 2 :caption: Generators: - Rocket - BOOM + Rocket Chip + Rocket Core + BOOM Core Hwacha - RocketChip