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Use "tile" instead of "core" to assign freq's

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abejgonzalez
2021-02-25 21:25:03 -08:00
parent 86fef9abd4
commit 6145b1df40
1 changed files with 1 additions and 1 deletions
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generators/chipyard/src/main/scala/ConfigFragments.scala
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@@ -193,7 +193,7 @@ class WithTLBackingMemory extends Config((site, here, up) => {
case ExtTLMem => up(ExtMem, site) // enable TL backing memory case ExtTLMem => up(ExtMem, site) // enable TL backing memory
}) })
class WithTileFrequency(fMHz: Double) extends ClockNameContainsAssignment("core", fMHz) class WithTileFrequency(fMHz: Double) extends ClockNameContainsAssignment("tile", fMHz)
class WithPeripheryBusFrequencyAsDefault extends Config((site, here, up) => { class WithPeripheryBusFrequencyAsDefault extends Config((site, here, up) => {
case DefaultClockFrequencyKey => (site(PeripheryBusKey).dtsFrequency.get / (1000 * 1000)).toDouble case DefaultClockFrequencyKey => (site(PeripheryBusKey).dtsFrequency.get / (1000 * 1000)).toDouble