From 65bad16ef45ca2fa5aca4119918afd3226f6eb1d Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 17 Jan 2023 11:07:28 -0800 Subject: [PATCH] Add brief text on spike-as-a-tile to docs: --- docs/Software/Spike.rst | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/docs/Software/Spike.rst b/docs/Software/Spike.rst index 5c022471..bdaa4750 100644 --- a/docs/Software/Spike.rst +++ b/docs/Software/Spike.rst @@ -21,3 +21,15 @@ full cycle-accurate simulation using software RTL simulators or FireSim. Spike comes pre-packaged in the RISC-V toolchain and is available on the path as ``spike``. More information can be found in the `Spike repository `__. + +Spike-as-a-Tile +----------------- + +Chipyard contains experimental support for simulating a Spike processor model with the uncore, similar to a virtual-platform. +In this configuration, Spike is cache-coherent, and communicates with the uncore through a C++ TileLink private cache model. + +.. code-block:: shell + + make CONFIG=SpikeConfig run-binary BINARY=hello.riscv + +