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Add to help target | Cleanup build.sbt a bit more

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This commit is contained in:
abejgonzalez
2020-12-04 14:18:51 -08:00
parent 70fa0a037d
commit 714687c962
3 changed files with 14 additions and 16 deletions
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21
build.sbt
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@@ -13,7 +13,7 @@ lazy val commonSettings = Seq(
case PathList("META-INF", "MANIFEST.MF") => MergeStrategy.discard
case _ => MergeStrategy.first}},
scalacOptions ++= Seq("-deprecation","-unchecked","-Xsource:2.11"),
addCompilerPlugin("org.scalamacros" % "paradise" % "2.1.0" cross CrossVersion.full), // TODO: Needed for just Rocket?
addCompilerPlugin("org.scalamacros" % "paradise" % "2.1.0" cross CrossVersion.full),
unmanagedBase := (chipyardRoot / unmanagedBase).value,
allDependencies := {
// drop dependencies (org, name)
@@ -71,6 +71,7 @@ def isolateAllTests(tests: Seq[TestDefinition]) = tests map { test =>
// -- Rocket Chip --
// This needs to stay in sync with the chisel3 and firrtl git submodules
val chiselVersion = "3.4.0"
lazy val chiselRef = ProjectRef(workspaceDirectory / "chisel3", "chisel")
lazy val chiselLib = "edu.berkeley.cs" %% "chisel3" % chiselVersion
@@ -83,16 +84,10 @@ lazy val chiselPluginLib = "edu.berkeley.cs" % "chisel3-plugin" % chiselVersion
val firrtlVersion = "1.4.+"
lazy val firrtlRef = ProjectRef(workspaceDirectory / "firrtl", "firrtl")
lazy val firrtlLib = "edu.berkeley.cs" %% "firrtl" % firrtlVersion
//lazy val firrtlLibDeps = (firrtlRef / Keys.libraryDependencies) // TODO: Won't work because of antlr plugin
lazy val firrtlLibDeps = Seq(
"org.scalatest" %% "scalatest" % "3.2.0" % "test",
"org.scalatestplus" %% "scalacheck-1-14" % "3.1.3.0" % "test",
"com.github.scopt" %% "scopt" % "3.7.1",
"net.jcazevedo" %% "moultingyaml" % "0.4.2",
"org.json4s" %% "json4s-native" % "3.6.9",
"org.apache.commons" % "commons-text" % "1.8",
"org.antlr" % "antlr4-runtime" % "4.7.1"
)
val firrtlLibDeps = settingKey[Seq[sbt.librarymanagement.ModuleID]]("FIRRTL Library Dependencies sans antlr4")
Global / firrtlLibDeps := {
(firrtlRef / Keys.libraryDependencies).value.filterNot(_.name == "antlr4")
}
// Rocket-chip dependencies (subsumes making RC a RootProject)
lazy val hardfloat = (project in rocketChipDir / "hardfloat")
@@ -153,14 +148,14 @@ lazy val rocketLibDeps = (rocketchip / Keys.libraryDependencies)
lazy val firrtl_interpreter = (project in file("tools/firrtl-interpreter"))
.sourceDependency(firrtlRef, firrtlLib)
.settings(libraryDependencies ++= firrtlLibDeps)
.settings(commonSettings)
.settings(libraryDependencies ++= (Global / firrtlLibDeps).value)
lazy val firrtlInterpreterLibDeps = (firrtl_interpreter / Keys.libraryDependencies)
lazy val treadle = (project in file("tools/treadle"))
.sourceDependency(firrtlRef, firrtlLib)
.settings(libraryDependencies ++= firrtlLibDeps)
.settings(commonSettings)
.settings(libraryDependencies ++= (Global / firrtlLibDeps).value)
lazy val treadleLibDeps = (treadle / Keys.libraryDependencies)
lazy val chisel_testers = (project in file("tools/chisel-testers"))

7
common.mk
View File

@@ -17,7 +17,8 @@ HELP_COMPILATION_VARIABLES += \
" EXTRA_SIM_CXXFLAGS = additional CXXFLAGS for building simulators" \
" EXTRA_SIM_LDFLAGS = additional LDFLAGS for building simulators" \
" EXTRA_SIM_SOURCES = additional simulation sources needed for simulator" \
" EXTRA_SIM_REQS = additional make requirements to build the simulator"
" EXTRA_SIM_REQS = additional make requirements to build the simulator" \
" ENABLE_SBT_THIN_CLIENT = if set, use sbt's experimental thin client"
EXTRA_GENERATOR_REQS ?=
EXTRA_SIM_CXXFLAGS ?=
@@ -41,7 +42,9 @@ HELP_COMMANDS += \
" run-binary-fast = run [./$(shell basename $(sim))] and don't log instructions" \
" run-binary-debug = run [./$(shell basename $(sim_debug))] and log instructions and waveform to files" \
" verilog = generate intermediate verilog files from chisel elaboration and firrtl passes" \
" run-tests = run all assembly and benchmark tests"
" firrtl = generate intermediate firrtl files from chisel elaboration" \
" run-tests = run all assembly and benchmark tests" \
" launch-sbt = start sbt terminal"
#########################################################################################
# include additional subproject make fragments

2
sims/firesim

Submodule sims/firesim updated: 2addd72598...7ab7bc4a2b