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Bump to scala 2.13.10/chisel 3.5.5/latest rocketchip

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This commit is contained in:
Jerry Zhao
2023-01-04 01:46:45 -08:00
parent 749f84418e
commit 7780ed23bf
33 changed files with 86 additions and 70 deletions
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41
scripts/build-setup.sh
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@@ -4,10 +4,10 @@
set -e
set -o pipefail
RDIR=$(git rev-parse --show-toplevel)
CYDIR=$(git rev-parse --show-toplevel)
# get helpful utilities
source $RDIR/scripts/utils.sh
source $CYDIR/scripts/utils.sh
common_setup
@@ -90,7 +90,7 @@ run_step() {
# setup and install conda environment
if run_step "1"; then
# note: lock file must end in .conda-lock.yml - see https://github.com/conda-incubator/conda-lock/issues/154
CONDA_REQS=$RDIR/conda-reqs
CONDA_REQS=$CYDIR/conda-reqs
CONDA_LOCK_REQS=$CONDA_REQS/conda-lock-reqs
LOCKFILE=$CONDA_LOCK_REQS/conda-requirements-$TOOLCHAIN_TYPE-linux-64.conda-lock.yml
@@ -100,10 +100,10 @@ if run_step "1"; then
fi
# use conda-lock to create env
conda-lock install -p $RDIR/.conda-env $LOCKFILE
conda-lock install -p $CYDIR/.conda-env $LOCKFILE
source $RDIR/.conda-env/etc/profile.d/conda.sh
conda activate $RDIR/.conda-env
source $CYDIR/.conda-env/etc/profile.d/conda.sh
conda activate $CYDIR/.conda-env
fi
if [ -z "$FORCE_FLAG" ]; then
@@ -115,8 +115,8 @@ fi
# initialize all submodules (without the toolchain submodules)
if run_step "2"; then
$RDIR/scripts/init-submodules-no-riscv-tools.sh $FORCE_FLAG
$RDIR/scripts/init-fpga.sh $FORCE_FLAG
$CYDIR/scripts/init-submodules-no-riscv-tools.sh $FORCE_FLAG
$CYDIR/scripts/init-fpga.sh $FORCE_FLAG
fi
# build extra toolchain collateral (i.e. spike, pk, riscv-tests, libgloss)
@@ -130,17 +130,17 @@ if run_step "3"; then
fi
PREFIX=$RISCV
fi
$RDIR/scripts/build-toolchain-extra.sh $TOOLCHAIN_TYPE -p $PREFIX
$CYDIR/scripts/build-toolchain-extra.sh $TOOLCHAIN_TYPE -p $PREFIX
fi
# run ctags for code navigation
if run_step "4"; then
$RDIR/scripts/gen-tags.sh
$CYDIR/scripts/gen-tags.sh
fi
# precompile chipyard scala sources
if run_step "5"; then
pushd $RDIR/sims/verilator
pushd $CYDIR/sims/verilator
make launch-sbt SBT_COMMAND=";project chipyard; compile"
make launch-sbt SBT_COMMAND=";project tapeout; compile"
popd
@@ -148,16 +148,17 @@ fi
# setup firesim
if run_step "6"; then
$RDIR/scripts/firesim-setup.sh
$RDIR/sims/firesim/gen-tags.sh
$CYDIR/scripts/firesim-setup.sh
$CYDIR/sims/firesim/gen-tags.sh
# precompile firesim scala sources
if run_step "7"; then
pushd $RDIR/sims/firesim
pushd $CYDIR/sims/firesim
(
echo $CYDIR
source sourceme-f1-manager.sh --skip-ssh-setup
pushd sim
make sbt SBT_COMMAND="project firechip; compile" TARGET_PROJECT=firesim
make sbt SBT_COMMAND="project {file:$CYDIR}firechip; compile" TARGET_PROJECT=firesim
popd
)
popd
@@ -166,12 +167,12 @@ fi
# setup firemarshal
if run_step "8"; then
pushd $RDIR/software/firemarshal
pushd $CYDIR/software/firemarshal
./init-submodules.sh
# precompile firemarshal buildroot sources
if run_step "9"; then
source $RDIR/scripts/fix-open-files.sh
source $CYDIR/scripts/fix-open-files.sh
./marshal $VERBOSE_FLAG build br-base.json
./marshal $VERBOSE_FLAG clean br-base.json
fi
@@ -180,13 +181,13 @@ fi
# do misc. cleanup for a "clean" git status
if run_step "10"; then
$RDIR/scripts/repo-clean.sh
$CYDIR/scripts/repo-clean.sh
fi
cat <<EOT >> env.sh
# line auto-generated by $0
conda activate $RDIR/.conda-env
source $RDIR/scripts/fix-open-files.sh
conda activate $CYDIR/.conda-env
source $CYDIR/scripts/fix-open-files.sh
EOT
echo "Setup complete!"