NVDLA Integration + Cleanup Ariane Preprocessing (#505)

* [nvdla] initial nvdla integration

* [nvdla] add firesim configs

* [nvdla] re-add accidentally deleted line

* [nvdla] works on master with small

* [nvdla] use master branch of nvdla

* [nvdla] remove extra sources

* [nvdla] bump

* [nvdla + ariane] bump and use insert-includes for pre-processing

* [nvdla] add ci | remove target configs in FireChip | update naming

* [nvdla] bump nvdla | fix ci run-tests error

* [nvdla] re-enable PCWM-L error | fix/update makefile(s)

* [nvdla] bump nvdla fragments in FireChip

* [misc] bump tutorial patches

* [chipyard] remove extra import

* [nvdla] bump nvdla for pbus [ci skip]

* [nvdla] update firemarshal and add nvdla workload

* [nvdla] bump nvdla-workload

* [nvdla] bump hw

* [docs] add basic documentation

* [docs] adjustments to documentation

* [misc] update docs | bump firesim with recipe

* [misc] disable error on warnings in verilator | bump number width to match RC

* [docs] fix doc build error

* [verilator] move no fail on warning to be global

* [ci skip] [nvdla] bump submodule urls

* [misc] move firesim specific configs into nvdla dir [ci skip]

* [nvdla] fix run-tests in ci

* update RC configs | bump marshal | bump nvdla-workload

* [nvdla] bump nvdla-workload [ci skip]

* add topology mixin to nvdla configs

* update tutorial patches
This commit is contained in:
Abraham Gonzalez
2020-05-16 12:22:30 -07:00
committed by GitHub
parent 3f5a204fd0
commit 85b555dbce
25 changed files with 7063 additions and 27 deletions

View File

@@ -44,14 +44,12 @@ class WithPeripheryBusFrequency(freq: BigInt) extends Config((site, here, up) =>
case PeripheryBusKey => up(PeripheryBusKey).copy(dtsFrequency = Some(freq))
})
class WithPerfCounters extends Config((site, here, up) => {
case RocketTilesKey => up(RocketTilesKey) map (tile => tile.copy(
core = tile.core.copy(nPerfCounters = 29)
))
})
// Disables clock-gating; doesn't play nice with our FAME-1 pass
class WithoutClockGating extends Config((site, here, up) => {
case DebugModuleKey => up(DebugModuleKey, site).map(_.copy(clockGate = false))
@@ -63,7 +61,6 @@ class WithScalaTestFeatures extends Config((site, here, up) => {
case TracePortKey => up(TracePortKey, site).map(_.copy(print = true))
})
// FASED Config Aliases. This to enable config generation via "_" concatenation
// which requires that all config classes be defined in the same package
class DDR3FRFCFS extends FRFCFS16GBQuadRank
@@ -71,7 +68,9 @@ class DDR3FRFCFSLLC4MB extends FRFCFS16GBQuadRankLLC4MB
class WithNIC extends icenet.WithIceNIC(inBufFlits = 8192, ctrlQueueDepth = 64)
// Adds a small/large NVDLA to the system
class WithNVDLALarge extends nvidia.blocks.dla.WithNVDLA("large")
class WithNVDLASmall extends nvidia.blocks.dla.WithNVDLA("small")
// Tweaks that are generally applied to all firesim configs