From 89a23faa006b410fff93e3b3d7efa68be735057d Mon Sep 17 00:00:00 2001 From: nayiri-k Date: Fri, 10 Mar 2023 15:09:56 -0800 Subject: [PATCH] updating docs to include correct build path [skip ci] --- docs/VLSI/ASAP7-Tutorial.rst | 4 ++-- docs/VLSI/Sky130-Commercial-Tutorial.rst | 4 ++-- docs/VLSI/Sky130-OpenROAD-Tutorial.rst | 10 +++++----- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/docs/VLSI/ASAP7-Tutorial.rst b/docs/VLSI/ASAP7-Tutorial.rst index ddeda299..5544a4ae 100644 --- a/docs/VLSI/ASAP7-Tutorial.rst +++ b/docs/VLSI/ASAP7-Tutorial.rst @@ -126,9 +126,9 @@ To run DRC & LVS, and view the results in Calibre: .. code-block:: shell make drc CONFIG=TinyRocketConfig - ./build/drc-rundir/generated-scripts/view-drc + ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/drc-rundir/generated-scripts/view-drc make lvs CONFIG=TinyRocketConfig - ./build/lvs-rundir/generated-scripts/view-lvs + ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/lvs-rundir/generated-scripts/view-lvs Some DRC errors are expected from this PDK, as explained in the `ASAP7 plugin readme `__. Furthermore, the dummy SRAMs that are provided in this tutorial and PDK do not have any geometry inside, so will certainly cause DRC errors. diff --git a/docs/VLSI/Sky130-Commercial-Tutorial.rst b/docs/VLSI/Sky130-Commercial-Tutorial.rst index 0b371c26..ccbdc157 100644 --- a/docs/VLSI/Sky130-Commercial-Tutorial.rst +++ b/docs/VLSI/Sky130-Commercial-Tutorial.rst @@ -161,9 +161,9 @@ To run DRC & LVS, and view the results in Calibre: .. code-block:: shell make drc tutorial=sky130-commercial - ./build/drc-rundir/generated-scripts/view_drc + ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/drc-rundir/generated-scripts/view_drc make lvs tutorial=sky130-commercial - ./build/lvs-rundir/generated-scripts/view_lvs + ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/lvs-rundir/generated-scripts/view_lvs Some DRC errors are expected from this PDK, especially with regards to the SRAMs, as explained in the `Sky130 Hammer plugin README `__. diff --git a/docs/VLSI/Sky130-OpenROAD-Tutorial.rst b/docs/VLSI/Sky130-OpenROAD-Tutorial.rst index 7a7a9aa3..e4f5f80a 100644 --- a/docs/VLSI/Sky130-OpenROAD-Tutorial.rst +++ b/docs/VLSI/Sky130-OpenROAD-Tutorial.rst @@ -184,7 +184,7 @@ Hammer generates a convenient script to launch these sessions .. code-block:: shell - cd ./build/par-rundir + cd ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/par-rundir ./generated-scripts/open_chip Note that the conda OpenROAD package was compiled with the GUI disabled, so in order to view the layout, @@ -199,7 +199,7 @@ These databases can be restored using the same ``open_chip`` script for debuggin .. code-block:: shell - cd build/par-rundir + cd build/chipyard.TestHarness.TinyRocketConfig-ChipTop/par-rundir ./generated_scripts/open_chip -h " Usage: ./generated-scripts/open_chip [-t] [openroad_db_name] @@ -215,7 +215,7 @@ These databases can be restored using the same ``open_chip`` script for debuggin # load post-clock tree database with timing inforamtion ./generated_scripts/open_chip -t post_clock_tree -.. Timing reports are found in ``build/par-rundir/timingReports``. They are gzipped text files. +Various reports, including timing reports, are found in ``build/par-rundir/reports``. See the `OpenROAD tool plugin `__ for the full list of OpenROAD tool steps and their implementations. @@ -232,9 +232,9 @@ To run DRC & LVS in Magic & Netgen, respectively: .. code-block:: shell make drc tutorial=sky130-openroad - ./build/drc-rundir/generated-scripts/view_drc + ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/drc-rundir/generated-scripts/view_drc make lvs tutorial=sky130-openroad - ./build/lvs-rundir/generated-scripts/view_lvs + ./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/lvs-rundir/generated-scripts/view_lvs Note that in ``sky130-openroad.yml`` we have set the following YAML keys: