diff --git a/docs/Chipyard-Basics/Building-A-Chip.rst b/docs/Chipyard-Basics/Building-A-Chip.rst
index dc2d37ce..3fbbd9ea 100644
--- a/docs/Chipyard-Basics/Building-A-Chip.rst
+++ b/docs/Chipyard-Basics/Building-A-Chip.rst
@@ -2,4 +2,5 @@
 
 Building A Chip
 ==============================
+
 TODO
diff --git a/docs/Customization/index.rst b/docs/Customization/index.rst
index c8cb9cc3..8d61801e 100644
--- a/docs/Customization/index.rst
+++ b/docs/Customization/index.rst
@@ -12,6 +12,7 @@ Hit next to get started!
 .. toctree::
    :maxdepth: 2
    :caption: Customization:
+
    Heterogeneous-SoCs
    Adding-An-Accelerator
    Memory-Hierarchy
diff --git a/docs/Quick-Start.rst b/docs/Quick-Start.rst
index 26589204..e8ead617 100644
--- a/docs/Quick-Start.rst
+++ b/docs/Quick-Start.rst
@@ -21,7 +21,7 @@ We need to install the RISC-V toolchain in order to be able to run RISC-V progra
 This will take about 20-30 minutes. You can expedite the process by setting a ``make`` environment variable to use parallel cores: ``export MAKEFLAGS=-j8``.
 To build the toolchains, you should run:
 
-::
+.. code-block:: shell
 
     ./scripts/build-toolchains.sh
 
diff --git a/docs/Simulation/FPGA-Accelerated-Simulators.rst b/docs/Simulation/FPGA-Accelerated-Simulators.rst
index ed13d629..29f42880 100644
--- a/docs/Simulation/FPGA-Accelerated-Simulators.rst
+++ b/docs/Simulation/FPGA-Accelerated-Simulators.rst
@@ -48,24 +48,26 @@ Current Limitations:
 ++++++++++++++++++++
 
 FireSim integration in Chipyard is still a work in progress. Presently, you
-cannot build a FireSim simulator from any generator project in Chipyard except ``firechip``, 
+cannot build a FireSim simulator from any generator project in Chipyard except ``firechip``,
 which properly invokes MIDAS on the target RTL.
 
 In the interim, workaround this limitation by importing Config and Module
-classes from other generator projects into FireChip. For example, assuming you Chipyard 
+classes from other generator projects into FireChip. For example, assuming you Chipyard
 config looks as following:
 
 .. code-block:: scala
+
   class CustomConfig extends Config(
     new WithInclusiveCache ++
     new myproject.MyCustomConfig ++
     new DefaultRocketConfig
   )
 
-Then the equivalent FireChip config (in `generators/firechip/src/main/scala/TargetConfigs.scala`) based on `FireSimRocketChipConfig` 
+Then the equivalent FireChip config (in `generators/firechip/src/main/scala/TargetConfigs.scala`) based on `FireSimRocketChipConfig`
 will look as follows:
 
 .. code-block:: scala
+
   class FireSimCustomConfig extends Config(
     new WithBootROM ++
     new WithPeripheryBusFrequency(BigInt(3200000000L)) ++
@@ -80,7 +82,7 @@ will look as follows:
     new WithInclusiveCache ++
     new myproject.MyCustomConfig ++
     new freechips.rocketchip.system.DefaultConfig)
-  
+
 
 You should then be able to refer to those classes or an alias of them in your ``DESIGN`` or ``TARGET_CONFIG``
 variables. Note that if your target machine has I/O not provided in the default
diff --git a/docs/index.rst b/docs/index.rst
index c44f118f..1f41b4ed 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -10,10 +10,8 @@ Chipyard is a a framework for designing and evaluating full-system hardware usin
 It is composed of a collection of tools and libraries designed to provide an intergration between open-source and commercial tools for the development of systems-on-chip.
 New to Chipyard? Jump to the :ref:`Chipyard Basics` page for more info.
 
-
 .. include:: Quick-Start.rst
 
-
 .. toctree::
    :maxdepth: 3
    :caption: Contents: