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Merge pull request #1796 from ksungkeun84/main

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This commit is contained in:
Jerry Zhao
2024-02-23 09:19:32 -08:00
committed by GitHub
parent 53c6e8a996 4c9bcfc123
commit 8da6c5a8c2
3 changed files with 18 additions and 1 deletions
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2
fpga/src/main/scala/vcu118/Configs.scala
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@@ -54,11 +54,11 @@ class WithVCU118Tweaks extends Config(
new WithUART ++ new WithUART ++
new WithSPISDCard ++ new WithSPISDCard ++
new WithDDRMem ++ new WithDDRMem ++
new WithJTAG ++
// other configuration // other configuration
new WithDefaultPeripherals ++ new WithDefaultPeripherals ++
new chipyard.config.WithTLBackingMemory ++ // use TL backing memory new chipyard.config.WithTLBackingMemory ++ // use TL backing memory
new WithSystemModifications ++ // setup busses, use sdboot bootrom, setup ext. mem. size new WithSystemModifications ++ // setup busses, use sdboot bootrom, setup ext. mem. size
new chipyard.config.WithNoDebug ++ // remove debug module
new freechips.rocketchip.subsystem.WithoutTLMonitors ++ new freechips.rocketchip.subsystem.WithoutTLMonitors ++
new freechips.rocketchip.subsystem.WithNMemoryChannels(1) new freechips.rocketchip.subsystem.WithNMemoryChannels(1)
) )

14
fpga/src/main/scala/vcu118/HarnessBinders.scala
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@@ -36,3 +36,17 @@ class WithDDRMem extends HarnessBinder({
ddrClientBundle <> port.io ddrClientBundle <> port.io
} }
}) })
class WithJTAG extends HarnessBinder({
case (th: VCU118FPGATestHarnessImp, port: JTAGPort, chipId: Int) => {
val jtag_io = th.vcu118Outer.jtagPlacedOverlay.overlayOutput.jtag.getWrappedValue
port.io.TCK := jtag_io.TCK
port.io.TMS := jtag_io.TMS
port.io.TDI := jtag_io.TDI
jtag_io.TDO.data := port.io.TDO
jtag_io.TDO.driven := true.B
// ignore srst_n
jtag_io.srst_n := DontCare
}
})

3
fpga/src/main/scala/vcu118/TestHarness.scala
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@@ -85,6 +85,9 @@ class VCU118FPGATestHarness(override implicit val p: Parameters) extends VCU118S
))))) )))))
ddrNode := TLWidthWidget(dp(ExtTLMem).get.master.beatBytes) := ddrClient ddrNode := TLWidthWidget(dp(ExtTLMem).get.master.beatBytes) := ddrClient
/*** JTAG ***/
val jtagPlacedOverlay = dp(JTAGDebugOverlayKey).head.place(JTAGDebugDesignInput())
// module implementation // module implementation
override lazy val module = new VCU118FPGATestHarnessImp(this) override lazy val module = new VCU118FPGATestHarnessImp(this)
} }