From d9d1efd6b3c8cfa4fa2b5d53513ae664d4e9a8a7 Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Thu, 20 Apr 2023 12:03:24 -0700 Subject: [PATCH 01/21] Update FS --- sims/firesim | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sims/firesim b/sims/firesim index 8c85960b..8c301ad5 160000 --- a/sims/firesim +++ b/sims/firesim @@ -1 +1 @@ -Subproject commit 8c85960b939a0090de30a31936981972874d979d +Subproject commit 8c301ad57ba962bf61838308b09121fcda6e190c From 2bf8f258adf175b929a04e0493b665830a681b8b Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Thu, 20 Apr 2023 13:22:19 -0700 Subject: [PATCH 02/21] Bump Gemmini --- generators/gemmini | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/generators/gemmini b/generators/gemmini index 965ea0b3..80e7376c 160000 --- a/generators/gemmini +++ b/generators/gemmini @@ -1 +1 @@ -Subproject commit 965ea0b3c5ffd7b68e6bf5a50ea9ff0750a5b988 +Subproject commit 80e7376cf554ed302975d72ed091ac86a9e553e8 From e2cf26ed9351d5cabfc481e99711dc30af4d0db2 Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Thu, 20 Apr 2023 13:27:36 -0700 Subject: [PATCH 03/21] Bump Changelog --- CHANGELOG.md | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 3644fa29..6867e1d2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -2,6 +2,30 @@ This changelog follows the format defined here: https://keepachangelog.com/en/1.0.0/ +## [1.9.1] - 2023-04-21 + +Various fixes for Linux boot, More Chip/bringup examples, Chisel 3.5.6 bump + +### Added +* QoL improvement to IOBinders + custom ChipTop example by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1399 +* PLL integration example + FlatChipTop/TestHarness by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1427 +* Bump TestChipIp to improve default serial_tl behavior by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1435 +* Bump testchipip to standardize TL serdesser bundle params by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1446 + +### Changed +* New Scala-based Config Finder by @abejgonzalez in https://github.com/ucb-bar/chipyard/pull/1424 +* Bump to latest rocket-chip/chisel3.5.6 by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1411 +* Resolve merge conflicts in chisel3.5.6 bump by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1430 +* bump testchipip by @joey0320 in https://github.com/ucb-bar/chipyard/pull/1434 +* ADD: improve Makefile in tests/, add explicit arch flags by @T-K-233 in https://github.com/ucb-bar/chipyard/pull/1439 +* Various submodule bumps by @abejgonzalez in https://github.com/ucb-bar/chipyard/pull/1448 + +### Fixed +* Various improvements and fixes by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1420 +* Ensure conda cleanup regex properly filters out non-numeric chars by @abejgonzalez in https://github.com/ucb-bar/chipyard/pull/1425 +* Fix ChipLikeQuadRocketConfig crossing by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1436 +* Uniquify module names that are common to Top & Model by @joey0320 in https://github.com/ucb-bar/chipyard/pull/1442 + ## [1.9.0] - 2023-03-23 Faster FIRRTL build support work CIRCT. New software support for RISC-V GCC12 and Linux 6.2. Various bumps and fixes of all submodules. From 3c043ee27f26a831f27cb9b8aa4db7426faeacd7 Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Fri, 21 Apr 2023 14:37:29 -0700 Subject: [PATCH 04/21] Use $RISCV includes for tests --- tests/Makefile | 5 +++-- tests/encoding.h | 1 - tests/hello.c | 2 +- tests/mt-hello.c | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) delete mode 120000 tests/encoding.h diff --git a/tests/Makefile b/tests/Makefile index 28976a6a..b61bfb30 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -2,7 +2,8 @@ # RISCV Toolchain ################################# -PREFIX = riscv64-unknown-elf- +PREFIX_NO_MINUS = riscv64-unknown-elf +PREFIX = $(PREFIX_NO_MINUS)- GCC = $(PREFIX)gcc CXX = $(PREFIX)g++ @@ -21,7 +22,7 @@ ARCH = rv64imafdc ABI = lp64d ARCHFLAGS = -march=$(ARCH) -mabi=$(ABI) -CFLAGS = -std=gnu99 -O2 -fno-common -fno-builtin-printf -Wall +CFLAGS = -std=gnu99 -O2 -fno-common -fno-builtin-printf -Wall -I$(RISCV)/$(PREFIX_NO_MINUS)/include CFLAGS += $(ARCHFLAGS) LDFLAGS = -static diff --git a/tests/encoding.h b/tests/encoding.h deleted file mode 120000 index f398b163..00000000 --- a/tests/encoding.h +++ /dev/null @@ -1 +0,0 @@ -../toolchains/riscv-tools/riscv-tests/env/encoding.h \ No newline at end of file diff --git a/tests/hello.c b/tests/hello.c index dbfbfe56..7709f91a 100644 --- a/tests/hello.c +++ b/tests/hello.c @@ -1,5 +1,5 @@ #include -#include "encoding.h" +#include "riscv-pk/encoding.h" #include "marchid.h" int main(void) { diff --git a/tests/mt-hello.c b/tests/mt-hello.c index 5ab47a56..2ba0e32f 100644 --- a/tests/mt-hello.c +++ b/tests/mt-hello.c @@ -1,4 +1,4 @@ -#include "encoding.h" +#include "riscv-pk/encoding.h" #include #include "marchid.h" From c1667adf3d2220d3f1e19742586984a182721a26 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Thu, 27 Apr 2023 20:39:07 -0700 Subject: [PATCH 05/21] trial 1 --- common.mk | 20 ++-- scripts/split-module-files.py | 111 --------------------- scripts/uniqify-module-names.py | 170 +++++++++++++++++++++++++++----- 3 files changed, 153 insertions(+), 148 deletions(-) delete mode 100755 scripts/split-module-files.py diff --git a/common.mk b/common.mk index 5c1f2461..4aeb44aa 100644 --- a/common.mk +++ b/common.mk @@ -231,26 +231,22 @@ $(SFC_MFC_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(SFC_LEVEL) $(EXTRA_FIR $(SED) -i 's/.*/& /' $(MFC_SMEMS_CONF) # need trailing space for SFC macrocompiler # DOC include end: FirrtlCompiler -$(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILELIST) $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) &: $(MFC_MODEL_HRCHY_JSON) $(MFC_FILELIST) $(MFC_BB_MODS_FILELIST) - $(base_dir)/scripts/split-module-files.py \ +$(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILELIST) $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) &: $(MFC_MODEL_HRCHY_JSON) $(MFC_TOP_HRCHY_JSON) $(MFC_FILELIST) $(MFC_BB_MODS_FILELIST) + $(base_dir)/scripts/uniqify-module-names.py \ --model-hier-json $(MFC_MODEL_HRCHY_JSON) \ + --top-hier-json $(MFC_TOP_HRCHY_JSON) \ + --in-all-filelist $(MFC_FILELIST) \ --dut $(TOP) \ + --model $(MODEL) \ + --target-dir $(GEN_COLLATERAL_DIR) \ --out-dut-filelist $(TOP_MODS_FILELIST) \ --out-model-filelist $(MODEL_MODS_FILELIST) \ - --in-all-filelist $(MFC_FILELIST) \ - --target-dir $(GEN_COLLATERAL_DIR) + --out-model-hier-json $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) \ + --gcpath $(GEN_COLLATERAL_DIR) $(SED) -e 's;^;$(GEN_COLLATERAL_DIR)/;' $(MFC_BB_MODS_FILELIST) > $(BB_MODS_FILELIST) $(SED) -i 's/\.\///' $(TOP_MODS_FILELIST) $(SED) -i 's/\.\///' $(MODEL_MODS_FILELIST) $(SED) -i 's/\.\///' $(BB_MODS_FILELIST) - $(base_dir)/scripts/uniqify-module-names.py \ - --top-filelist $(TOP_MODS_FILELIST) \ - --mod-filelist $(MODEL_MODS_FILELIST) \ - --gen-collateral-path $(GEN_COLLATERAL_DIR) \ - --model-hier-json $(MFC_MODEL_HRCHY_JSON) \ - --out-model-hier-json $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) \ - --dut $(TOP) \ - --model $(MODEL) sort -u $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(BB_MODS_FILELIST) > $(ALL_MODS_FILELIST) $(TOP_BB_MODS_FILELIST) $(MODEL_BB_MODS_FILELIST) &: $(BB_MODS_FILELIST) $(MFC_TOP_HRCHY_JSON) $(FINAL_ANNO_FILE) diff --git a/scripts/split-module-files.py b/scripts/split-module-files.py deleted file mode 100755 index 64fe5707..00000000 --- a/scripts/split-module-files.py +++ /dev/null @@ -1,111 +0,0 @@ -#!/usr/bin/env python3 - -import json -import argparse -from typing import List, Optional - -# Schema of json emitted by circt -""" -{ - "instance_name": "TestHarness", - "module_name": "TestHarness", - "instances": [ - { - "instance_name": "chiptop", - "module_name": "ChipTop", - "instances": [ - { - "instance_name": "system", - "module_name": "DigitalTop", - "instances": [ ] - }, ... - ] - }, - { - "instance_name": "simdram", - "module_name": "SimDRAM", - "instances": [] - }, - ] -} -""" - -def get_modules(js: dict) -> List[str]: - if 'instances' not in js: - return js['module_name'] - else: - mods = [] - for mod in js['instances']: - mods.extend(get_modules(mod)) - return [js['module_name']] + mods - -def find_mod_by_name(js: dict, name: str) -> Optional[List[dict]]: - if 'instances' not in js: - return None - else: - mods = [] - for mod in js['instances']: - if mod['module_name'] == name: - mods.append(mod) - other_mods = find_mod_by_name(mod, name) - if other_mods is not None: - mods.extend(other_mods) - return mods - -if __name__ == "__main__": - parser = argparse.ArgumentParser(description='Convert CIRCT (firtool) hierarchy JSON into DUT and test harness filelists') - parser.add_argument('--model-hier-json', type=str, required=True, help='Path to hierarchy JSON emitted by firtool. Must include DUT as a module.') - parser.add_argument('--dut', type=str, required=True, help='Name of the DUT module.') - parser.add_argument('--out-dut-filelist', type=str, required=True, help='Path to output filelist including all modules under the DUT.') - parser.add_argument('--out-model-filelist', type=str, required=True, help='Path to output filelist including all modules under the top-most module but not modules under the DUT.') - parser.add_argument('--in-all-filelist', type=str, required=True, help='Path to input filelist that has all modules (relative paths).') - parser.add_argument('--target-dir', type=str, required=True, help='Path to where module sources are located (combined with --in-all-filelist gives the absolute path to module sources).') - args = parser.parse_args() - - with open(args.model_hier_json) as f: - j = json.load(f) - - dut_tops = find_mod_by_name(j, args.dut) - assert dut_tops is not None - assert len(dut_tops) == 1 - dut_top = dut_tops[0] - - dut_mods = set(get_modules(dut_top)) - model_mods = set(get_modules(j)) - dut_mods - both_mods = dut_mods.intersection(model_mods) - - assert len(both_mods) == 0 - - with open(args.out_dut_filelist, 'w') as df, \ - open(args.in_all_filelist) as fl: - # add paths that correspond to modules to output file - for path in fl: - writeOut = False - for dm in dut_mods: - if dm in path: - writeOut = True - break - - # prepend the target directory to get filelist with absolute paths - if writeOut: - if not args.target_dir in path: - df.write(f"{args.target_dir}/{path}") - else: - df.write(f"{path}") - - with open(args.out_model_filelist, 'w') as df, \ - open(args.in_all_filelist) as fl: - # add paths that correspond to modules to output file - for path in fl: - writeOut = False - for dm in model_mods: - if dm in path: - writeOut = True - break - - # prepend the target directory to get filelist with absolute paths - if writeOut: - if not args.target_dir in path: - df.write(f"{args.target_dir}/{path}") - else: - df.write(f"{path}") diff --git a/scripts/uniqify-module-names.py b/scripts/uniqify-module-names.py index a6255a8c..87b56b63 100755 --- a/scripts/uniqify-module-names.py +++ b/scripts/uniqify-module-names.py @@ -5,19 +5,21 @@ import argparse import shutil import os import datetime - +import sys parser = argparse.ArgumentParser(description="") -parser.add_argument("--top-filelist", type=str, required=True, help="Abs path to ..top.f") -parser.add_argument("--mod-filelist", type=str, required=True, help="Abs path to ..model.f") -parser.add_argument("--gen-collateral-path", dest="gcpath", type=str, required=True, help="Abs path to the gen-collateral directory") parser.add_argument("--model-hier-json", type=str, required=True, help="Path to hierarchy JSON emitted by firtool. Must include DUT as a module.") -parser.add_argument("--out-model-hier-json", type=str, required=True, help="Path to updated hierarchy JSON emitted by this script.") +parser.add_argument("--top-hier-json", type=str, required=True, help="Path to hierarchy JSON emitted by firtool. Must include DUT as a module.") +parser.add_argument('--in-all-filelist', type=str, required=True, help='Path to input filelist that has all modules (relative paths).') parser.add_argument("--dut", type=str, required=True, help="Name of the DUT module.") parser.add_argument("--model", type=str, required=True, help="Name of the Model module.") +parser.add_argument('--target-dir', type=str, required=True, help='Path to where module sources are located (combined with --in-all-filelist gives the absolute path to module sources).') +parser.add_argument('--out-dut-filelist', type=str, required=True, help='Path to output filelist including all modules under the DUT.') +parser.add_argument('--out-model-filelist', type=str, required=True, help='Path to output filelist including all modules under the MODEL.') +parser.add_argument("--out-model-hier-json", type=str, required=True, help="Path to updated hierarchy JSON emitted by this script.") +parser.add_argument("--gcpath", type=str, required=True, help="Path to gen-collateral") args = parser.parse_args() - MODEL_SFX=args.model + "_UNIQUIFIED" def bash(cmd): @@ -40,9 +42,6 @@ def get_filelist(filelist): print(f"Something is wrong about this line '{line}'") return fnames -def update_filelist(cur_file, new_file): - bash(f"echo \"{args.gcpath}/{new_file}\" >> {os.path.join(args.gcpath, args.mod_filelist)}") - def generate_copy(c, sfx): (cur_name, ext) = os.path.splitext(c) new_name = cur_name + "_" + sfx @@ -55,46 +54,167 @@ def generate_copy(c, sfx): bash(f"sed -i s/\"module {cur_name}\"/\"module {new_name}\"/ {new_file}") return new_file -def dfs_update_modules(tree, common_fnames, visited, top_fnames): +def dfs_update_modules(tree, common_fnames, visited, ext_dict): # List of direct submodules to update childs_to_update = list() for child in tree['instances']: # We don't have to change stuff that are under the dut - if (child['module_name'] == args.dut) or (child['module_name'] in visited): + if (child['module_name'] == args.dut): continue - if dfs_update_modules(child, common_fnames, visited, top_fnames): + if dfs_update_modules(child, common_fnames, visited, ext_dict): childs_to_update.append(child['module_name']) - if (child['module_name'] + ".sv") in common_fnames: + if (child['module_name']) in common_fnames: child['module_name'] = child['module_name'] + "_" + MODEL_SFX cur_module = tree['module_name'] - cur_file = cur_module + ".sv" new_file = None # cur_file is in the common list, or is a ancestor of of them, generate a new file - if (cur_file in common_fnames) or len(childs_to_update) > 0: - new_file = generate_copy(cur_file, MODEL_SFX) - update_filelist(cur_file, os.path.basename(new_file)) - - for submodule_name in childs_to_update: - if (submodule_name + ".sv") in common_fnames: - bash(f"sed -i s/\"{submodule_name}\"/\"{submodule_name}_{MODEL_SFX}\"/ {new_file}") + if (cur_module in common_fnames) or len(childs_to_update) > 0: + new_file = 1 visited.add(cur_module) return (new_file is not None) +def bfs_update(tree, common_fnames, ext_dict, filelist): + q = [(tree['instance_name'], tree['module_name'], tree['instances'], None)] + + updated_submodule = set() + + while len(q) != 0: + front = q[0] + q.pop(0) + (inst, mod, child, parent) = front + + try: + cur_file = mod + "." + ext_dict[mod] + except: + cur_file = mod + ".sv" + + mod_updated = False + + # if the module is common, make a copy & update its instance in its parent + if mod in common_fnames: + mod_updated = True + new_file = generate_copy(cur_file, MODEL_SFX) + filelist.append(new_file) + if parent is not None and ((parent, mod) not in updated_submodule): + print(mod, parent) + parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent]) + bash(f"sed -i s/\"{mod}\"/\"{mod}_{MODEL_SFX}\"/ {parent_file}") + updated_submodule.add((parent, mod)) + else: + filelist.append(cur_file) + + # set the parent module name + new_mod = mod + if mod_updated: + new_mod = mod + "_" + MODEL_SFX + ext_dict[new_mod] = ext_dict[mod] + + # traverse its children + for c in child: + if c['module_name'] != args.dut: + q.append((c['instance_name'], c['module_name'], c['instances'], new_mod)) + +def bfs_collect_modules(tree, child_to_ignore = None): + q = [(tree['instance_name'], tree['module_name'], tree['instances'])] + + modules = list() + while len(q) != 0: + front = q[0] + q.pop(0) + + (inst, mod, child) = front + modules.append(mod) + for c in child: + if c['module_name'] != child_to_ignore: + print(c['module_name']) + q.append((c['instance_name'], c['module_name'], c['instances'])) + return modules + +def write_filelist(modules, out_file): + with open(out_file, "w") as df, \ + open(args.in_all_filelist) as fl: + # add paths that correspond to modules to output file + for path in fl: + writeOut = False + for dm in modules: + if dm in path: + writeOut = True + break + + # prepend the target directory to get filelist with absolute paths + if writeOut: + if not args.target_dir in path: + df.write(f"{args.target_dir}/{path}") + else: + df.write(f"{path}") + +def write_filelist_model(modules, out_file): + with open(out_file, "w") as df: + for m in modules: + if not args.target_dir in m: + df.write(f"{args.target_dir}/{m}\n") + else: + df.write(f"{m}\n") + +def get_file_ext(all_filelist): + ext_dict = dict() + with open(args.in_all_filelist) as fl: + for path in fl: + fname = os.path.basename(path) + (module, ext) = fname.strip().split(".") + ext_dict[module] = ext + return ext_dict + def main(): - top_fnames = set(get_filelist(args.top_filelist)) - mod_fnames = set(get_filelist(args.mod_filelist)) - common_fnames = top_fnames.intersection(mod_fnames) + with open(args.model_hier_json) as imhj: + imhj_data = json.load(imhj) + modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) + + for x in modules_under_model: + print(f"model only {x}") + + with open(args.top_hier_json) as imhj: + imhj_data = json.load(imhj) + modules_under_top = set(bfs_collect_modules(imhj_data)) + + for x in modules_under_top: + print(f"top only {x}") + + common_modules = modules_under_top.intersection(modules_under_model) + + print(f"modules under top {len(modules_under_top)}") + print(f"modules under model {len(modules_under_model)}") + print(f"modules under both {len(common_modules)}") + print(f"total modules {len(modules_under_top) + len(modules_under_model) - len(common_modules)}") + + write_filelist(modules_under_top, args.out_dut_filelist) + + ext_dict = get_file_ext(args.in_all_filelist) + print(f"total modules in filelist {len(ext_dict)}") + + for x in common_modules: + print(f"common {x}") + +# for x in common_fnames: +# print(f"common_fnames {x}") + with open(args.model_hier_json) as imhj: imhj_data = json.load(imhj) with open(args.out_model_hier_json, "w+") as out_file: visited = set() - dfs_update_modules(imhj_data, common_fnames, visited, top_fnames) + filelist = list() + bfs_update(imhj_data, common_modules, ext_dict, filelist) + dfs_update_modules(imhj_data, common_modules, visited, ext_dict) json.dump(imhj_data, out_file, indent=2) + updated_modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) + print(filelist) + write_filelist_model(set(filelist), args.out_model_filelist) + if __name__ == "__main__": main() From 85abce536a4ff7e93e8cfde545d1c3cdffb981d3 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Thu, 27 Apr 2023 20:42:34 -0700 Subject: [PATCH 06/21] cleanup --- scripts/uniqify-module-names.py | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/scripts/uniqify-module-names.py b/scripts/uniqify-module-names.py index 87b56b63..28d5f971 100755 --- a/scripts/uniqify-module-names.py +++ b/scripts/uniqify-module-names.py @@ -129,7 +129,6 @@ def bfs_collect_modules(tree, child_to_ignore = None): modules.append(mod) for c in child: if c['module_name'] != child_to_ignore: - print(c['module_name']) q.append((c['instance_name'], c['module_name'], c['instances'])) return modules @@ -173,34 +172,13 @@ def main(): imhj_data = json.load(imhj) modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) - for x in modules_under_model: - print(f"model only {x}") - with open(args.top_hier_json) as imhj: imhj_data = json.load(imhj) modules_under_top = set(bfs_collect_modules(imhj_data)) - for x in modules_under_top: - print(f"top only {x}") - common_modules = modules_under_top.intersection(modules_under_model) - - print(f"modules under top {len(modules_under_top)}") - print(f"modules under model {len(modules_under_model)}") - print(f"modules under both {len(common_modules)}") - print(f"total modules {len(modules_under_top) + len(modules_under_model) - len(common_modules)}") - write_filelist(modules_under_top, args.out_dut_filelist) - ext_dict = get_file_ext(args.in_all_filelist) - print(f"total modules in filelist {len(ext_dict)}") - - for x in common_modules: - print(f"common {x}") - -# for x in common_fnames: -# print(f"common_fnames {x}") - with open(args.model_hier_json) as imhj: imhj_data = json.load(imhj) @@ -213,7 +191,6 @@ def main(): json.dump(imhj_data, out_file, indent=2) updated_modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) - print(filelist) write_filelist_model(set(filelist), args.out_model_filelist) if __name__ == "__main__": From ab9ec1650e5fc0e24295e165e0625c31c791d2b5 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Fri, 28 Apr 2023 09:15:33 -0700 Subject: [PATCH 07/21] fixes --- common.mk | 2 +- ...dule-names.py => uniquify-module-names.py} | 31 ++++++++++--------- 2 files changed, 17 insertions(+), 16 deletions(-) rename scripts/{uniqify-module-names.py => uniquify-module-names.py} (91%) diff --git a/common.mk b/common.mk index 4aeb44aa..7afdf57b 100644 --- a/common.mk +++ b/common.mk @@ -232,7 +232,7 @@ $(SFC_MFC_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(SFC_LEVEL) $(EXTRA_FIR # DOC include end: FirrtlCompiler $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILELIST) $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) &: $(MFC_MODEL_HRCHY_JSON) $(MFC_TOP_HRCHY_JSON) $(MFC_FILELIST) $(MFC_BB_MODS_FILELIST) - $(base_dir)/scripts/uniqify-module-names.py \ + $(base_dir)/scripts/uniquify-module-names.py \ --model-hier-json $(MFC_MODEL_HRCHY_JSON) \ --top-hier-json $(MFC_TOP_HRCHY_JSON) \ --in-all-filelist $(MFC_FILELIST) \ diff --git a/scripts/uniqify-module-names.py b/scripts/uniquify-module-names.py similarity index 91% rename from scripts/uniqify-module-names.py rename to scripts/uniquify-module-names.py index 28d5f971..7eb03a7c 100755 --- a/scripts/uniqify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -97,14 +97,13 @@ def bfs_update(tree, common_fnames, ext_dict, filelist): if mod in common_fnames: mod_updated = True new_file = generate_copy(cur_file, MODEL_SFX) - filelist.append(new_file) + filelist.append((mod, new_file)) if parent is not None and ((parent, mod) not in updated_submodule): - print(mod, parent) parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent]) - bash(f"sed -i s/\"{mod}\"/\"{mod}_{MODEL_SFX}\"/ {parent_file}") + bash(f"sed -i s/\"{mod} \"/\"{mod}_{MODEL_SFX} \"/ {parent_file}") updated_submodule.add((parent, mod)) else: - filelist.append(cur_file) + filelist.append((mod, cur_file)) # set the parent module name new_mod = mod @@ -150,20 +149,24 @@ def write_filelist(modules, out_file): else: df.write(f"{path}") -def write_filelist_model(modules, out_file): +def write_filelist_model(modules, out_file, ext_dict): with open(out_file, "w") as df: - for m in modules: - if not args.target_dir in m: - df.write(f"{args.target_dir}/{m}\n") - else: - df.write(f"{m}\n") + for (m, fname) in modules: + if m in ext_dict.keys(): + if not args.target_dir in fname: + df.write(f"{args.target_dir}/{fname}\n") + else: + df.write(f"{fname}\n") def get_file_ext(all_filelist): ext_dict = dict() - with open(args.in_all_filelist) as fl: + with open(all_filelist) as fl: for path in fl: fname = os.path.basename(path) - (module, ext) = fname.strip().split(".") + fname_strip = fname.strip().split(".") + ext = fname_strip[-1] + fname_strip.pop() + module = ".".join(fname_strip) ext_dict[module] = ext return ext_dict @@ -189,9 +192,7 @@ def main(): bfs_update(imhj_data, common_modules, ext_dict, filelist) dfs_update_modules(imhj_data, common_modules, visited, ext_dict) json.dump(imhj_data, out_file, indent=2) - - updated_modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) - write_filelist_model(set(filelist), args.out_model_filelist) + write_filelist_model(set(filelist), args.out_model_filelist, ext_dict) if __name__ == "__main__": main() From 27728a70efa3ab7a5acb4133939687d80ea46b8a Mon Sep 17 00:00:00 2001 From: joey0320 Date: Fri, 28 Apr 2023 12:27:54 -0700 Subject: [PATCH 08/21] fix for ext modules --- scripts/uniquify-module-names.py | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/scripts/uniquify-module-names.py b/scripts/uniquify-module-names.py index 7eb03a7c..5b058651 100755 --- a/scripts/uniquify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -95,13 +95,16 @@ def bfs_update(tree, common_fnames, ext_dict, filelist): # if the module is common, make a copy & update its instance in its parent if mod in common_fnames: - mod_updated = True - new_file = generate_copy(cur_file, MODEL_SFX) - filelist.append((mod, new_file)) - if parent is not None and ((parent, mod) not in updated_submodule): - parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent]) - bash(f"sed -i s/\"{mod} \"/\"{mod}_{MODEL_SFX} \"/ {parent_file}") - updated_submodule.add((parent, mod)) + try: + new_file = generate_copy(cur_file, MODEL_SFX) + filelist.append((mod, new_file)) + if parent is not None and ((parent, mod) not in updated_submodule): + parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent]) + bash(f"sed -i s/\"{mod} \"/\"{mod}_{MODEL_SFX} \"/ {parent_file}") + updated_submodule.add((parent, mod)) + mod_updated = True + except: + print(f"No corresponding file for {cur_file}") else: filelist.append((mod, cur_file)) From 30ec9806e03c4d0f72c05f7d5f5754a662f757e1 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Fri, 28 Apr 2023 13:30:34 -0700 Subject: [PATCH 09/21] final fix --- scripts/uniquify-module-names.py | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/scripts/uniquify-module-names.py b/scripts/uniquify-module-names.py index 5b058651..641ef563 100755 --- a/scripts/uniquify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -141,7 +141,11 @@ def write_filelist(modules, out_file): for path in fl: writeOut = False for dm in modules: - if dm in path: + bm_ext = os.path.basename(path).split(".") + bm_ext.pop() + bm = ".".join(bm_ext) + print(bm) + if dm == bm: writeOut = True break From 3f80507ce4a2f8ae659da2d27ab81d0a3be8f564 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Sat, 29 Apr 2023 18:21:48 -0700 Subject: [PATCH 10/21] rm split-bb-files.py --- common.mk | 10 +--- scripts/split-bb-files.py | 82 -------------------------------- scripts/uniquify-module-names.py | 18 ++++--- variables.mk | 4 -- vlsi/Makefile | 4 +- 5 files changed, 15 insertions(+), 103 deletions(-) delete mode 100755 scripts/split-bb-files.py diff --git a/common.mk b/common.mk index 7afdf57b..0868088b 100644 --- a/common.mk +++ b/common.mk @@ -249,14 +249,6 @@ $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILEL $(SED) -i 's/\.\///' $(BB_MODS_FILELIST) sort -u $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(BB_MODS_FILELIST) > $(ALL_MODS_FILELIST) -$(TOP_BB_MODS_FILELIST) $(MODEL_BB_MODS_FILELIST) &: $(BB_MODS_FILELIST) $(MFC_TOP_HRCHY_JSON) $(FINAL_ANNO_FILE) - $(base_dir)/scripts/split-bb-files.py \ - --in-bb-f $(BB_MODS_FILELIST) \ - --in-top-hrchy-json $(MFC_TOP_HRCHY_JSON) \ - --in-anno-json $(FINAL_ANNO_FILE) \ - --out-top-bb-f $(TOP_BB_MODS_FILELIST) \ - --out-model-bb-f $(MODEL_BB_MODS_FILELIST) - $(TOP_SMEMS_CONF) $(MODEL_SMEMS_CONF) &: $(MFC_SMEMS_CONF) $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) $(base_dir)/scripts/split-mems-conf.py \ --in-smems-conf $(MFC_SMEMS_CONF) \ @@ -280,7 +272,7 @@ $(MODEL_SMEMS_FILE) $(MODEL_SMEMS_FIR) &: $(MODEL_SMEMS_CONF) | $(TOP_SMEMS_FILE # note: {MODEL,TOP}_BB_MODS_FILELIST is added as a req. so that the files get generated, # however it is really unneeded since ALL_MODS_FILELIST includes all BB files ######################################################################################## -$(sim_common_files): $(sim_files) $(ALL_MODS_FILELIST) $(TOP_SMEMS_FILE) $(MODEL_SMEMS_FILE) $(TOP_BB_MODS_FILELIST) $(MODEL_BB_MODS_FILELIST) +$(sim_common_files): $(sim_files) $(ALL_MODS_FILELIST) $(TOP_SMEMS_FILE) $(MODEL_SMEMS_FILE) $(BB_MODS_FILELIST) sort -u $(sim_files) $(ALL_MODS_FILELIST) | grep -v '.*\.\(svh\|h\)$$' > $@ echo "$(TOP_SMEMS_FILE)" >> $@ echo "$(MODEL_SMEMS_FILE)" >> $@ diff --git a/scripts/split-bb-files.py b/scripts/split-bb-files.py deleted file mode 100755 index 959a10a2..00000000 --- a/scripts/split-bb-files.py +++ /dev/null @@ -1,82 +0,0 @@ -#!/usr/bin/env python3 - -import json -import argparse -from collections import defaultdict - -# Schema of *.f emitted by circt -""" -//gen-collateral/SimUART.cc -//gen-collateral/AsyncQueueSource.sv -//gen-collateral/AsyncQueueSink.sv -//gen-collateral/AsyncQueueSource_1.sv -//gen-collateral/AsyncQueueSink_1.sv -//gen-collateral/AsyncQueueSource_2.sv -//gen-collateral/AsyncQueueSink_2.sv -//gen-collateral/AsyncResetSynchronizerShiftReg_w4_d3_i0.sv -""" - -def bfs_collect_submodules(tree): - output = set() - q = [(tree['instance_name'], tree['module_name'], tree['instances'])] - - while len(q) != 0: - front = q[0] - q.pop(0) - - (inst, mod, child) = front - output.add(mod) - for c in child: - q.append((c['instance_name'], c['module_name'], c['instances'])) - return output - -def write_lines_to_file(lines, file_path): - with open(file_path, "w") as fp: - for line in lines: - fp.write("%s\n" % line) - -if __name__ == "__main__": - parser = argparse.ArgumentParser(description='Create *.model.bb.f and *.top.bb.f blackbox filelists') - parser.add_argument('--in-bb-f', type=str, required=True, help='All blackbox files filelist (includes both MODEL/TOP files)') - parser.add_argument('--in-top-hrchy-json', type=str, required=True, help='List containing hierarchy of top modules (top-module-hierarchy.json)') - parser.add_argument('--in-anno-json', type=str, required=True, help='Anno. file with blackbox annotations') - parser.add_argument('--out-top-bb-f', type=str, required=True, help='List of blackbox files for TOP') - parser.add_argument('--out-model-bb-f', type=str, required=True, help='List of blackbox files for MODEL') - args = parser.parse_args() - - # module_path -> list of bb paths (not fully resolved paths) - mod_bb_dict = defaultdict(list) - with open(args.in_anno_json, "r") as f: - anno_data = json.load(f) - for anno in anno_data: - if 'BlackBoxInlineAnno' in anno['class']: - mod_bb_dict[anno['target']].append(anno['name']) - if 'BlackBoxPathAnno' in anno['class']: - mod_bb_dict[anno['target']].append(anno['path']) - - with open(args.in_top_hrchy_json) as ihj: - ihj_data = json.load(ihj) - top_inner_modules = bfs_collect_submodules(ihj_data) - - with open(args.in_bb_f) as ibf: - lines = ibf.read().splitlines() - - tbfs = set() - for mod_path, bb_files in mod_bb_dict.items(): - leaf_mod = mod_path.split('.')[-1] - - # if matched, add the fully resolved path to the top bb filelist - if leaf_mod in top_inner_modules: - for line in lines: - for bb_file in bb_files: - if bb_file in line: - tbfs.add(line) - - # now tbfs should be complete (need to remove tbf files from original bb file for model bb) - mbfs = set() - for line in lines: - if not line in tbfs: - mbfs.add(line) - - write_lines_to_file(tbfs, args.out_top_bb_f) - write_lines_to_file(mbfs, args.out_model_bb_f) diff --git a/scripts/uniquify-module-names.py b/scripts/uniquify-module-names.py index 641ef563..768a061e 100755 --- a/scripts/uniquify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -54,14 +54,14 @@ def generate_copy(c, sfx): bash(f"sed -i s/\"module {cur_name}\"/\"module {new_name}\"/ {new_file}") return new_file -def dfs_update_modules(tree, common_fnames, visited, ext_dict): +def dfs_update_modules(tree, common_fnames, visited): # List of direct submodules to update childs_to_update = list() for child in tree['instances']: # We don't have to change stuff that are under the dut if (child['module_name'] == args.dut): continue - if dfs_update_modules(child, common_fnames, visited, ext_dict): + if dfs_update_modules(child, common_fnames, visited): childs_to_update.append(child['module_name']) if (child['module_name']) in common_fnames: child['module_name'] = child['module_name'] + "_" + MODEL_SFX @@ -87,7 +87,7 @@ def bfs_update(tree, common_fnames, ext_dict, filelist): (inst, mod, child, parent) = front try: - cur_file = mod + "." + ext_dict[mod] + cur_file = mod + "." + ext_dict[mod][0] except: cur_file = mod + ".sv" @@ -99,7 +99,7 @@ def bfs_update(tree, common_fnames, ext_dict, filelist): new_file = generate_copy(cur_file, MODEL_SFX) filelist.append((mod, new_file)) if parent is not None and ((parent, mod) not in updated_submodule): - parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent]) + parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent][0]) bash(f"sed -i s/\"{mod} \"/\"{mod}_{MODEL_SFX} \"/ {parent_file}") updated_submodule.add((parent, mod)) mod_updated = True @@ -165,6 +165,10 @@ def write_filelist_model(modules, out_file, ext_dict): else: df.write(f"{fname}\n") + if len(ext_dict[m]) > 1: + assert(len(ext_dict[m]) == 2) + df.write(f"{args.target_dir}/{m}.{ext_dict[m][1]}\n") + def get_file_ext(all_filelist): ext_dict = dict() with open(all_filelist) as fl: @@ -174,7 +178,9 @@ def get_file_ext(all_filelist): ext = fname_strip[-1] fname_strip.pop() module = ".".join(fname_strip) - ext_dict[module] = ext + if module not in ext_dict.keys(): + ext_dict[module] = list() + ext_dict[module].append(ext) return ext_dict def main(): @@ -197,7 +203,7 @@ def main(): visited = set() filelist = list() bfs_update(imhj_data, common_modules, ext_dict, filelist) - dfs_update_modules(imhj_data, common_modules, visited, ext_dict) + dfs_update_modules(imhj_data, common_modules, visited) json.dump(imhj_data, out_file, indent=2) write_filelist_model(set(filelist), args.out_model_filelist, ext_dict) diff --git a/variables.mk b/variables.mk index 1f659ac7..443caa94 100644 --- a/variables.mk +++ b/variables.mk @@ -186,10 +186,6 @@ MODEL_MODS_FILELIST ?= $(build_dir)/$(long_name).model.f # list of all blackbox files (may be included in the top/model.f files) # this has the build_dir appended BB_MODS_FILELIST ?= $(build_dir)/$(long_name).bb.f -# top blackbox module files to include -TOP_BB_MODS_FILELIST ?= $(build_dir)/$(long_name).top.bb.f -# model blackbox module files to include (not including top blackbox modules) -MODEL_BB_MODS_FILELIST ?= $(build_dir)/$(long_name).model.bb.f # all module files to include (top, model, bb included) ALL_MODS_FILELIST ?= $(build_dir)/$(long_name).all.f diff --git a/vlsi/Makefile b/vlsi/Makefile index 8259e7a6..ad51c754 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -72,7 +72,7 @@ VLSI_RTL = $(build_dir)/syn.f ifneq ($(CUSTOM_VLOG), ) RTL_DEPS = $(CUSTOM_VLOG) else - RTL_DEPS = $(TOP_MODS_FILELIST) $(TOP_BB_MODS_FILELIST) $(TOP_SMEMS_FILE) + RTL_DEPS = $(TOP_MODS_FILELIST) $(TOP_SMEMS_FILE) endif $(VLSI_RTL): $(RTL_DEPS) @@ -80,7 +80,7 @@ ifneq ($(CUSTOM_VLOG), ) > $(VLSI_RTL) $(foreach file,$^,echo $(file) >> $(VLSI_RTL)) else - cat $(TOP_MODS_FILELIST) $(TOP_BB_MODS_FILELIST) | sort -u > $(VLSI_RTL) + cat $(TOP_MODS_FILELIST) | sort -u > $(VLSI_RTL) echo $(TOP_SMEMS_FILE) >> $(VLSI_RTL) endif From a5bf60c0f1cdb3376559b887ffcfdda2109e8f38 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Sat, 29 Apr 2023 21:32:00 -0700 Subject: [PATCH 11/21] oops --- vlsi/sim.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vlsi/sim.mk b/vlsi/sim.mk index 13a7fcc3..291c93ad 100644 --- a/vlsi/sim.mk +++ b/vlsi/sim.mk @@ -10,7 +10,7 @@ $(SIM_CONF): $(sim_common_files) echo " top_module: $(VLSI_TOP)" >> $@ echo " tb_name: ''" >> $@ # don't specify -top echo " input_files:" >> $@ - for x in $$(cat $(MODEL_MODS_FILELIST) $(MODEL_BB_MODS_FILELIST) | sort -u) $(MODEL_SMEMS_FILE) $(SIM_FILE_REQS); do \ + for x in $$(cat $(MODEL_MODS_FILELIST) | sort -u) $(MODEL_SMEMS_FILE) $(SIM_FILE_REQS); do \ echo ' - "'$$x'"' >> $@; \ done echo " input_files_meta: 'append'" >> $@ From 884cf3cf6128cbe910a03d8913d10f2448db83e1 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Sun, 30 Apr 2023 13:32:46 -0700 Subject: [PATCH 12/21] deal with bb --- scripts/uniquify-module-names.py | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/scripts/uniquify-module-names.py b/scripts/uniquify-module-names.py index 768a061e..bd7ddcd9 100755 --- a/scripts/uniquify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -134,7 +134,7 @@ def bfs_collect_modules(tree, child_to_ignore = None): q.append((c['instance_name'], c['module_name'], c['instances'])) return modules -def write_filelist(modules, out_file): +def write_filelist(modules, out_file, files_written): with open(out_file, "w") as df, \ open(args.in_all_filelist) as fl: # add paths that correspond to modules to output file @@ -144,19 +144,20 @@ def write_filelist(modules, out_file): bm_ext = os.path.basename(path).split(".") bm_ext.pop() bm = ".".join(bm_ext) - print(bm) - if dm == bm: + print(dm, bm, bm_ext) + if (dm == bm) or (dm == bm_ext[0]): writeOut = True break # prepend the target directory to get filelist with absolute paths if writeOut: + files_written.add(os.path.basename(path)) if not args.target_dir in path: df.write(f"{args.target_dir}/{path}") else: df.write(f"{path}") -def write_filelist_model(modules, out_file, ext_dict): +def write_filelist_model(modules, out_file, ext_dict, files_written): with open(out_file, "w") as df: for (m, fname) in modules: if m in ext_dict.keys(): @@ -164,10 +165,7 @@ def write_filelist_model(modules, out_file, ext_dict): df.write(f"{args.target_dir}/{fname}\n") else: df.write(f"{fname}\n") - - if len(ext_dict[m]) > 1: - assert(len(ext_dict[m]) == 2) - df.write(f"{args.target_dir}/{m}.{ext_dict[m][1]}\n") + files_written.add(os.path.basename(fname)) def get_file_ext(all_filelist): ext_dict = dict() @@ -188,12 +186,15 @@ def main(): imhj_data = json.load(imhj) modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) + + files_written = set() + with open(args.top_hier_json) as imhj: imhj_data = json.load(imhj) modules_under_top = set(bfs_collect_modules(imhj_data)) common_modules = modules_under_top.intersection(modules_under_model) - write_filelist(modules_under_top, args.out_dut_filelist) + write_filelist(modules_under_top, args.out_dut_filelist, files_written) ext_dict = get_file_ext(args.in_all_filelist) with open(args.model_hier_json) as imhj: @@ -205,7 +206,15 @@ def main(): bfs_update(imhj_data, common_modules, ext_dict, filelist) dfs_update_modules(imhj_data, common_modules, visited) json.dump(imhj_data, out_file, indent=2) - write_filelist_model(set(filelist), args.out_model_filelist, ext_dict) + write_filelist_model(set(filelist), args.out_model_filelist, ext_dict, files_written) + + with open(args.out_model_filelist, "a") as of, \ + open(args.in_all_filelist) as fl: + for path in fl: + fname = os.path.basename(path) + ext = fname.strip().split(".")[-1] + if (fname not in files_written) and (ext == "cc"): + of.write(f"{args.target_dir}/{fname}") if __name__ == "__main__": main() From 1cc5ea519200f7d4037d53ee1de0eb6e65997a28 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Wed, 3 May 2023 18:23:16 -0700 Subject: [PATCH 13/21] Fix no-uart configs (#1457) --- generators/chipyard/src/main/scala/Subsystem.scala | 1 + 1 file changed, 1 insertion(+) diff --git a/generators/chipyard/src/main/scala/Subsystem.scala b/generators/chipyard/src/main/scala/Subsystem.scala index 6a07ff64..e98a51bc 100644 --- a/generators/chipyard/src/main/scala/Subsystem.scala +++ b/generators/chipyard/src/main/scala/Subsystem.scala @@ -65,6 +65,7 @@ trait CanHaveChosenInDTS { this: BaseSubsystem => t.uarts.foreach(u => Resource(chosen, "uart").bind(ResourceAlias(u.device.label))) } } + case _ => } } } From b05f36df793c0b1cef24fc27767007db658b92a5 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Wed, 3 May 2023 18:23:36 -0700 Subject: [PATCH 14/21] Fix support for no-bootROM systems (#1458) --- generators/chipyard/src/main/scala/System.scala | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/generators/chipyard/src/main/scala/System.scala b/generators/chipyard/src/main/scala/System.scala index a6c4b6b3..5643e380 100644 --- a/generators/chipyard/src/main/scala/System.scala +++ b/generators/chipyard/src/main/scala/System.scala @@ -31,6 +31,14 @@ class ChipyardSystem(implicit p: Parameters) extends ChipyardSubsystem val bootROM = p(BootROMLocated(location)).map { BootROM.attach(_, this, CBUS) } val maskROMs = p(MaskROMLocated(location)).map { MaskROM.attach(_, this, CBUS) } + + // If there is no bootrom, the tile reset vector bundle will be tied to zero + if (bootROM.isEmpty) { + val fakeResetVectorSourceNode = BundleBridgeSource[UInt]() + InModuleBody { fakeResetVectorSourceNode.bundle := 0.U } + tileResetVectorNexusNode := fakeResetVectorSourceNode + } + override lazy val module = new ChipyardSystemModule(this) } From b8ccb7d4f6affe0bbc33ecb24b30a1b6b1b13b10 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Thu, 4 May 2023 17:15:38 -0700 Subject: [PATCH 15/21] Support not instantiating the TileClockGater/ResetSetter PRCI controllers (#1459) --- .../src/main/scala/clocking/HasChipyardPRCI.scala | 14 ++++++++------ .../src/main/scala/clocking/TileClockGater.scala | 8 ++++---- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala b/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala index d2c4f2e5..d571bc95 100644 --- a/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala +++ b/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala @@ -20,7 +20,8 @@ import chipyard.{DefaultClockFrequencyKey} case class ChipyardPRCIControlParams( slaveWhere: TLBusWrapperLocation = CBUS, baseAddress: BigInt = 0x100000, - enableTileClockGating: Boolean = true + enableTileClockGating: Boolean = true, + enableTileResetSetting: Boolean = true ) @@ -72,12 +73,13 @@ trait HasChipyardPRCI { this: BaseSubsystem with InstantiatesTiles => val frequencySpecifier = ClockGroupFrequencySpecifier(p(ClockFrequencyAssignersKey), p(DefaultClockFrequencyKey)) val clockGroupCombiner = ClockGroupCombiner() val resetSynchronizer = ClockGroupResetSynchronizer() - val tileClockGater = prci_ctrl_domain { - TileClockGater(prciParams.baseAddress + 0x00000, tlbus, prciParams.enableTileClockGating) - } - val tileResetSetter = prci_ctrl_domain { + val tileClockGater = if (prciParams.enableTileClockGating) { prci_ctrl_domain { + TileClockGater(prciParams.baseAddress + 0x00000, tlbus) + } } else { ClockGroupEphemeralNode() } + val tileResetSetter = if (prciParams.enableTileResetSetting) { prci_ctrl_domain { TileResetSetter(prciParams.baseAddress + 0x10000, tlbus, tile_prci_domains.map(_.tile_reset_domain.clockNode.portParams(0).name.get), Nil) - } + } } else { ClockGroupEphemeralNode() } + (aggregator := frequencySpecifier := clockGroupCombiner diff --git a/generators/chipyard/src/main/scala/clocking/TileClockGater.scala b/generators/chipyard/src/main/scala/clocking/TileClockGater.scala index a77b02d5..23d525a6 100644 --- a/generators/chipyard/src/main/scala/clocking/TileClockGater.scala +++ b/generators/chipyard/src/main/scala/clocking/TileClockGater.scala @@ -19,7 +19,7 @@ import freechips.rocketchip.subsystem._ * flag will generate the registers, preserving the same memory map and behavior, but will not * generate any gaters */ -class TileClockGater(address: BigInt, beatBytes: Int, enable: Boolean)(implicit p: Parameters, valName: ValName) extends LazyModule +class TileClockGater(address: BigInt, beatBytes: Int)(implicit p: Parameters, valName: ValName) extends LazyModule { val device = new SimpleDevice(s"clock-gater", Nil) val clockNode = ClockGroupIdentityNode() @@ -31,7 +31,7 @@ class TileClockGater(address: BigInt, beatBytes: Int, enable: Boolean)(implicit val regs = (0 until nSinks).map({i => val sinkName = sinks(i)._1 val reg = withReset(sources(i).reset) { Module(new AsyncResetRegVec(w=1, init=1)) } - if (sinkName.contains("tile") && enable) { + if (sinkName.contains("tile")) { println(s"${(address+i*4).toString(16)}: Tile $sinkName clock gate") sinks(i)._2.clock := ClockGate(sources(i).clock, reg.io.q.asBool) sinks(i)._2.reset := sources(i).reset @@ -47,8 +47,8 @@ class TileClockGater(address: BigInt, beatBytes: Int, enable: Boolean)(implicit } object TileClockGater { - def apply(address: BigInt, tlbus: TLBusWrapper, enable: Boolean)(implicit p: Parameters, v: ValName) = { - val gater = LazyModule(new TileClockGater(address, tlbus.beatBytes, enable)) + def apply(address: BigInt, tlbus: TLBusWrapper)(implicit p: Parameters, v: ValName) = { + val gater = LazyModule(new TileClockGater(address, tlbus.beatBytes)) tlbus.toVariableWidthSlave(Some("clock-gater")) { gater.tlNode := TLBuffer() } gater.clockNode } From 60e80a772ef59af8db7c1ccd8502ce9fd69acdfb Mon Sep 17 00:00:00 2001 From: joey0320 Date: Thu, 4 May 2023 20:15:21 -0700 Subject: [PATCH 16/21] Cleanup + fixes, think it's stable now --- scripts/uniquify-module-names.py | 277 +++++++++++++++---------------- 1 file changed, 132 insertions(+), 145 deletions(-) diff --git a/scripts/uniquify-module-names.py b/scripts/uniquify-module-names.py index bd7ddcd9..12a0843e 100755 --- a/scripts/uniquify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -4,24 +4,25 @@ import json import argparse import shutil import os -import datetime import sys + parser = argparse.ArgumentParser(description="") parser.add_argument("--model-hier-json", type=str, required=True, help="Path to hierarchy JSON emitted by firtool. Must include DUT as a module.") parser.add_argument("--top-hier-json", type=str, required=True, help="Path to hierarchy JSON emitted by firtool. Must include DUT as a module.") parser.add_argument('--in-all-filelist', type=str, required=True, help='Path to input filelist that has all modules (relative paths).') parser.add_argument("--dut", type=str, required=True, help="Name of the DUT module.") parser.add_argument("--model", type=str, required=True, help="Name of the Model module.") -parser.add_argument('--target-dir', type=str, required=True, help='Path to where module sources are located (combined with --in-all-filelist gives the absolute path to module sources).') parser.add_argument('--out-dut-filelist', type=str, required=True, help='Path to output filelist including all modules under the DUT.') parser.add_argument('--out-model-filelist', type=str, required=True, help='Path to output filelist including all modules under the MODEL.') parser.add_argument("--out-model-hier-json", type=str, required=True, help="Path to updated hierarchy JSON emitted by this script.") +parser.add_argument('--target-dir', type=str, required=True, help='Path to where module sources are located (combined with --in-all-filelist gives the absolute path to module sources).') parser.add_argument("--gcpath", type=str, required=True, help="Path to gen-collateral") args = parser.parse_args() MODEL_SFX=args.model + "_UNIQUIFIED" + def bash(cmd): fail = os.system(cmd) if fail: @@ -30,17 +31,74 @@ def bash(cmd): else: print(cmd) -def get_filelist(filelist): - fnames = [] - with open(filelist) as f: +def bfs_collect_modules(tree, child_to_ignore = None): + q = [(tree['instance_name'], tree['module_name'], tree['instances'])] + + modules = list() + while len(q) != 0: + front = q[0] + q.pop(0) + + (inst, mod, child) = front + modules.append(mod) + for c in child: + if c['module_name'] != child_to_ignore: + q.append((c['instance_name'], c['module_name'], c['instances'])) + return modules + +def get_modules_in_verilog_file(file): + module_names = list() + with open(file) as f: lines = f.readlines() for line in lines: - try: - fname = line.split("/")[-1].strip() - fnames.append(fname) - except: - print(f"Something is wrong about this line '{line}'") - return fnames + words = line.split() + if len(words) > 0 and words[0] == "module": + module_names.append(words[1].replace("(", "")) + return module_names + +def get_modules_in_filelist(verilog_module_filename, cc_filelist): + with open(args.in_all_filelist) as fl: + lines = fl.readlines() + for line in lines: + path = line.strip() + basepath = os.path.basename(path) + ext = basepath.split(".")[-1] + + if (ext == "v") or (ext == "sv"): + modules = get_modules_in_verilog_file(os.path.join(args.gcpath, basepath)) + for module in modules: + verilog_module_filename[module] = basepath + else: + cc_filelist.append(basepath) + return (verilog_module_filename, cc_filelist) + +def get_modules_under_hier(hier, child_to_ignore=None): + with open(hier) as hj: + hj_data = json.load(hj) + modules_under_hier = set(bfs_collect_modules(hj_data, child_to_ignore=child_to_ignore)) + return modules_under_hier + +def write_verilog_filelist(modules, verilog_module_filename, out_filelist): + written_files = set() + existing_modules = verilog_module_filename.keys() + + with open(out_filelist, "w") as df: + for module in modules: + if module in existing_modules: + verilog_filename = verilog_module_filename[module] + if verilog_filename not in written_files: + written_files.add(verilog_filename) + if args.target_dir in verilog_filename: + df.write(f"{verilog_filename}\n") + else: + df.write(f"{args.target_dir}/{verilog_filename}\n") + return written_files + +def write_cc_filelist(filelist, out_filelist): + with open(out_filelist, "a") as df: + for path in filelist: + file = os.path.basename(path) + df.write(f"{args.target_dir}/{file}\n") def generate_copy(c, sfx): (cur_name, ext) = os.path.splitext(c) @@ -54,6 +112,44 @@ def generate_copy(c, sfx): bash(f"sed -i s/\"module {cur_name}\"/\"module {new_name}\"/ {new_file}") return new_file +def bfs_uniquify_modules(tree, common_fnames, verilog_module_filename): + q = [(tree['instance_name'], tree['module_name'], tree['instances'], None)] + updated_submodule = set() + existing_modules = verilog_module_filename.keys() + + while len(q) != 0: + front = q[0] + q.pop(0) + (inst, mod, child, parent) = front + + # external module + if mod not in existing_modules: + assert(len(child) == 0) + continue + + cur_file = verilog_module_filename[mod] + + # if the module is common, make a copy & update its instance in its parent + new_mod = mod + if mod in common_fnames: + try: + new_file = generate_copy(cur_file, MODEL_SFX) + if parent is not None and ((parent, mod) not in updated_submodule): + parent_file = os.path.join(args.gcpath, verilog_module_filename[parent]) + bash(f"sed -i s/\"{mod} \"/\"{mod}_{MODEL_SFX} \"/ {parent_file}") + updated_submodule.add((parent, mod)) + + # add the uniquified module to the verilog_modul_filename dict + new_mod = mod + "_" + MODEL_SFX + verilog_module_filename[new_mod] = new_file + except: + print(f"No corresponding file for {cur_file}") + + # traverse its children + for c in child: + if c['module_name'] != args.dut: + q.append((c['instance_name'], c['module_name'], c['instances'], new_mod)) + def dfs_update_modules(tree, common_fnames, visited): # List of direct submodules to update childs_to_update = list() @@ -76,145 +172,36 @@ def dfs_update_modules(tree, common_fnames, visited): visited.add(cur_module) return (new_file is not None) -def bfs_update(tree, common_fnames, ext_dict, filelist): - q = [(tree['instance_name'], tree['module_name'], tree['instances'], None)] - - updated_submodule = set() - - while len(q) != 0: - front = q[0] - q.pop(0) - (inst, mod, child, parent) = front - - try: - cur_file = mod + "." + ext_dict[mod][0] - except: - cur_file = mod + ".sv" - - mod_updated = False - - # if the module is common, make a copy & update its instance in its parent - if mod in common_fnames: - try: - new_file = generate_copy(cur_file, MODEL_SFX) - filelist.append((mod, new_file)) - if parent is not None and ((parent, mod) not in updated_submodule): - parent_file = os.path.join(args.gcpath, parent + "." + ext_dict[parent][0]) - bash(f"sed -i s/\"{mod} \"/\"{mod}_{MODEL_SFX} \"/ {parent_file}") - updated_submodule.add((parent, mod)) - mod_updated = True - except: - print(f"No corresponding file for {cur_file}") - else: - filelist.append((mod, cur_file)) - - # set the parent module name - new_mod = mod - if mod_updated: - new_mod = mod + "_" + MODEL_SFX - ext_dict[new_mod] = ext_dict[mod] - - # traverse its children - for c in child: - if c['module_name'] != args.dut: - q.append((c['instance_name'], c['module_name'], c['instances'], new_mod)) - -def bfs_collect_modules(tree, child_to_ignore = None): - q = [(tree['instance_name'], tree['module_name'], tree['instances'])] - - modules = list() - while len(q) != 0: - front = q[0] - q.pop(0) - - (inst, mod, child) = front - modules.append(mod) - for c in child: - if c['module_name'] != child_to_ignore: - q.append((c['instance_name'], c['module_name'], c['instances'])) - return modules - -def write_filelist(modules, out_file, files_written): - with open(out_file, "w") as df, \ - open(args.in_all_filelist) as fl: - # add paths that correspond to modules to output file - for path in fl: - writeOut = False - for dm in modules: - bm_ext = os.path.basename(path).split(".") - bm_ext.pop() - bm = ".".join(bm_ext) - print(dm, bm, bm_ext) - if (dm == bm) or (dm == bm_ext[0]): - writeOut = True - break - - # prepend the target directory to get filelist with absolute paths - if writeOut: - files_written.add(os.path.basename(path)) - if not args.target_dir in path: - df.write(f"{args.target_dir}/{path}") - else: - df.write(f"{path}") - -def write_filelist_model(modules, out_file, ext_dict, files_written): - with open(out_file, "w") as df: - for (m, fname) in modules: - if m in ext_dict.keys(): - if not args.target_dir in fname: - df.write(f"{args.target_dir}/{fname}\n") - else: - df.write(f"{fname}\n") - files_written.add(os.path.basename(fname)) - -def get_file_ext(all_filelist): - ext_dict = dict() - with open(all_filelist) as fl: - for path in fl: - fname = os.path.basename(path) - fname_strip = fname.strip().split(".") - ext = fname_strip[-1] - fname_strip.pop() - module = ".".join(fname_strip) - if module not in ext_dict.keys(): - ext_dict[module] = list() - ext_dict[module].append(ext) - return ext_dict - -def main(): - with open(args.model_hier_json) as imhj: - imhj_data = json.load(imhj) - modules_under_model = set(bfs_collect_modules(imhj_data, child_to_ignore=args.dut)) - - - files_written = set() - - with open(args.top_hier_json) as imhj: - imhj_data = json.load(imhj) - modules_under_top = set(bfs_collect_modules(imhj_data)) - - common_modules = modules_under_top.intersection(modules_under_model) - write_filelist(modules_under_top, args.out_dut_filelist, files_written) - ext_dict = get_file_ext(args.in_all_filelist) - +def uniquify_modules_under_model(modules_under_model, common_modules, verilog_module_filename): with open(args.model_hier_json) as imhj: imhj_data = json.load(imhj) + visited = set() + bfs_uniquify_modules(imhj_data, common_modules, verilog_module_filename) + dfs_update_modules (imhj_data, common_modules, visited) with open(args.out_model_hier_json, "w+") as out_file: - visited = set() - filelist = list() - bfs_update(imhj_data, common_modules, ext_dict, filelist) - dfs_update_modules(imhj_data, common_modules, visited) json.dump(imhj_data, out_file, indent=2) - write_filelist_model(set(filelist), args.out_model_filelist, ext_dict, files_written) - with open(args.out_model_filelist, "a") as of, \ - open(args.in_all_filelist) as fl: - for path in fl: - fname = os.path.basename(path) - ext = fname.strip().split(".")[-1] - if (fname not in files_written) and (ext == "cc"): - of.write(f"{args.target_dir}/{fname}") +def main(): + verilog_module_filename = dict() + cc_filelist = list() + get_modules_in_filelist(verilog_module_filename, cc_filelist) -if __name__ == "__main__": + modules_under_model = get_modules_under_hier(args.model_hier_json, args.dut) + modules_under_top = get_modules_under_hier(args.top_hier_json) + common_modules = modules_under_top.intersection(modules_under_model) + + # write top filelist + write_verilog_filelist(modules_under_top, verilog_module_filename, args.out_dut_filelist) + + # rename modules that are common + uniquify_modules_under_model(modules_under_model, common_modules, verilog_module_filename) + uniquified_modules_under_model = get_modules_under_hier(args.out_model_hier_json, args.dut) + + # write model filelist + write_verilog_filelist(uniquified_modules_under_model, verilog_module_filename, args.out_model_filelist) + write_cc_filelist (cc_filelist, args.out_model_filelist) + + +if __name__=="__main__": main() From fec43fc14725859ec144c63f7c9a64f1c95cc512 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Thu, 4 May 2023 21:51:00 -0700 Subject: [PATCH 17/21] corner case --- scripts/uniquify-module-names.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/uniquify-module-names.py b/scripts/uniquify-module-names.py index 12a0843e..75fc8c85 100755 --- a/scripts/uniquify-module-names.py +++ b/scripts/uniquify-module-names.py @@ -53,7 +53,7 @@ def get_modules_in_verilog_file(file): for line in lines: words = line.split() if len(words) > 0 and words[0] == "module": - module_names.append(words[1].replace("(", "")) + module_names.append(words[1].replace("(", "").replace(")", "").replace(";", "")) return module_names def get_modules_in_filelist(verilog_module_filename, cc_filelist): From 257e7d7507163a20132dfb28cc88b2635c529638 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Fri, 5 May 2023 17:09:07 -0700 Subject: [PATCH 18/21] Check that HarnessClockInstantiator doesn't receive requests for similarly-named-clocks with different frequencies (#1460) --- .../chipyard/src/main/scala/HarnessClocks.scala | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/generators/chipyard/src/main/scala/HarnessClocks.scala b/generators/chipyard/src/main/scala/HarnessClocks.scala index c256caba..f9665e12 100644 --- a/generators/chipyard/src/main/scala/HarnessClocks.scala +++ b/generators/chipyard/src/main/scala/HarnessClocks.scala @@ -21,9 +21,15 @@ trait HarnessClockInstantiator { // request a clock bundle at a particular frequency def requestClockBundle(name: String, freqRequested: Double): ClockBundle = { - val clockBundle = Wire(new ClockBundle(ClockBundleParameters())) - _clockMap(name) = (freqRequested, clockBundle) - clockBundle + if (_clockMap.contains(name)) { + require(freqRequested == _clockMap(name)._1, + s"Request clock freq = $freqRequested != previously requested ${_clockMap(name)._2} for requested clock $name") + _clockMap(name)._2 + } else { + val clockBundle = Wire(new ClockBundle(ClockBundleParameters())) + _clockMap(name) = (freqRequested, clockBundle) + clockBundle + } } // refClock is the clock generated by TestDriver that is From d61be5cb1ca896c2fa9e88dfa3990cf1972dfc12 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 6 May 2023 19:27:31 -0700 Subject: [PATCH 19/21] Remove unnecessary include from tests/Makefile --- tests/Makefile | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/tests/Makefile b/tests/Makefile index b61bfb30..28976a6a 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -2,8 +2,7 @@ # RISCV Toolchain ################################# -PREFIX_NO_MINUS = riscv64-unknown-elf -PREFIX = $(PREFIX_NO_MINUS)- +PREFIX = riscv64-unknown-elf- GCC = $(PREFIX)gcc CXX = $(PREFIX)g++ @@ -22,7 +21,7 @@ ARCH = rv64imafdc ABI = lp64d ARCHFLAGS = -march=$(ARCH) -mabi=$(ABI) -CFLAGS = -std=gnu99 -O2 -fno-common -fno-builtin-printf -Wall -I$(RISCV)/$(PREFIX_NO_MINUS)/include +CFLAGS = -std=gnu99 -O2 -fno-common -fno-builtin-printf -Wall CFLAGS += $(ARCHFLAGS) LDFLAGS = -static From 49dd3860db90dec2b59e35d8c99a4bc7648a66ae Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 6 May 2023 19:31:15 -0700 Subject: [PATCH 20/21] Update CHANGELOG.md --- CHANGELOG.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6867e1d2..8e7ed003 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ Various fixes for Linux boot, More Chip/bringup examples, Chisel 3.5.6 bump * PLL integration example + FlatChipTop/TestHarness by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1427 * Bump TestChipIp to improve default serial_tl behavior by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1435 * Bump testchipip to standardize TL serdesser bundle params by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1446 +* HarnessBinder asserts to catch bad clock generation by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1460 ### Changed * New Scala-based Config Finder by @abejgonzalez in https://github.com/ucb-bar/chipyard/pull/1424 @@ -19,12 +20,15 @@ Various fixes for Linux boot, More Chip/bringup examples, Chisel 3.5.6 bump * bump testchipip by @joey0320 in https://github.com/ucb-bar/chipyard/pull/1434 * ADD: improve Makefile in tests/, add explicit arch flags by @T-K-233 in https://github.com/ucb-bar/chipyard/pull/1439 * Various submodule bumps by @abejgonzalez in https://github.com/ucb-bar/chipyard/pull/1448 +* Support not instantiating tile reset/clock contorl features by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1459 ### Fixed * Various improvements and fixes by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1420 * Ensure conda cleanup regex properly filters out non-numeric chars by @abejgonzalez in https://github.com/ucb-bar/chipyard/pull/1425 * Fix ChipLikeQuadRocketConfig crossing by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1436 * Uniquify module names that are common to Top & Model by @joey0320 in https://github.com/ucb-bar/chipyard/pull/1442 +* Support for no-bootROM systems by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1458 +* Support for no-UART systems by @jerryz123 in https://github.com/ucb-bar/chipyard/pull/1457 ## [1.9.0] - 2023-03-23 From 20fb8d2556b0fe2aa4ea1e03630b5feb1a4af7f4 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 7 May 2023 11:51:17 -0700 Subject: [PATCH 21/21] Update README.md --- README.md | 3 --- sims/firesim | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/README.md b/README.md index a21b142e..91aa07ef 100644 --- a/README.md +++ b/README.md @@ -2,9 +2,6 @@ # Chipyard Framework [![Test](https://github.com/ucb-bar/chipyard/actions/workflows/chipyard-run-tests.yml/badge.svg)](https://github.com/ucb-bar/chipyard/actions) -| We're running the First FireSim and Chipyard User/Developer Workshop at ASPLOS 2023 on March 26, 2023! This workshop will feature a full-day of submitted talks from users and developers in the FireSim and Chipyard community. Learn more and **submit your work** on the [2023 Workshop Page](https://fires.im/workshop-2023/)! | -|-----| - ## Quick Links * **Stable Documentation**: https://chipyard.readthedocs.io/ diff --git a/sims/firesim b/sims/firesim index 8c301ad5..3ae68ec3 160000 --- a/sims/firesim +++ b/sims/firesim @@ -1 +1 @@ -Subproject commit 8c301ad57ba962bf61838308b09121fcda6e190c +Subproject commit 3ae68ec3076c010c633ded369fd3874ec2e5e557