tutorial tweaks
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@@ -19,7 +19,7 @@ vlsi.inputs.power_spec_type: "cpf"
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# Specify clock signals
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vlsi.inputs.clocks: [
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{name: "clock_clock", period: "130ns", uncertainty: "1ns"}
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{name: "clock_clock", period: "10ns", uncertainty: "1ns"}
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]
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# Generate Make include to aid in flow
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@@ -28,7 +28,7 @@ vlsi.core.build_system: make
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# Power Straps
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par.power_straps_mode: generate
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par.generate_power_straps_method: by_tracks
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par.blockage_spacing: 2.0
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par.blockage_spacing: 40.0
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par.blockage_spacing_top_layer: met4
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par.generate_power_straps_options:
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by_tracks:
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@@ -38,14 +38,16 @@ par.generate_power_straps_options:
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pin_layers:
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- met5
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blockage_spacing_met2: 4.0
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track_width: 6
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track_width_met5: 2
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track_spacing: 1
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blockage_spacing_met4: 2.0
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blockage_spacing_met4: 2.0
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track_width: 3
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track_width_met5: 1
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track_spacing: 5
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track_start: 10
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track_start_met5: 1
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power_utilization: 0.1
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power_utilization_met4: 0.3
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power_utilization_met5: 0.5
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power_utilization_met4: 0.1
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power_utilization_met5: 0.1
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# Placement Constraints
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vlsi.inputs.placement_constraints:
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@@ -53,7 +55,7 @@ vlsi.inputs.placement_constraints:
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type: toplevel
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x: 0
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y: 0
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width: 4500
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width: 3800
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height: 2500
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margins:
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left: 0
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