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Merge branch 'main' into shuttle

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Jerry Zhao
2023-06-12 21:54:23 -07:00
parent 7995f1de64 3dea032271
commit a486194d3d
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docs/Generators/Prefetchers.rst Normal file
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Prefetchers
====================================
The BAR-fetchers library is a collection of Chisel-implemented prefetchers, designed for compatibility with Chipyard and Rocket-Chip SoCs.
This package implements a generic prefetcher API, and example implementations of NextLine, Strided, and AMPM prefetchers.
Prefetchers can be instantiated in front of a L1D HellaCache, or as TileLink nodes in front of some TileLink bus.
An example configuration using prefetchers is found in the ``PrefetchingRocketConfig``

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docs/Generators/index.rst
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Sodor
Shuttle
Mempress
Prefetchers