diff --git a/generators/firechip/src/main/scala/TargetConfigs.scala b/generators/firechip/src/main/scala/TargetConfigs.scala
index 6f2a0291..66c1dc09 100644
--- a/generators/firechip/src/main/scala/TargetConfigs.scala
+++ b/generators/firechip/src/main/scala/TargetConfigs.scala
@@ -121,6 +121,7 @@ class WithFireSimHighPerfClocking extends Config(
   // This frequency selection matches FireSim's legacy selection and is required
   // to support 200Gb NIC performance. You may select a smaller value.
   new chipyard.config.WithPeripheryBusFrequency(3200.0) ++
+  new chipyard.config.WithControlBusFrequency(3200.0) ++
   new chipyard.config.WithSystemBusFrequency(3200.0) ++
   new chipyard.config.WithFrontBusFrequency(3200.0) ++
   // Optional: These three configs put the DRAM memory system in it's own clock domain.
@@ -140,6 +141,7 @@ class WithFireSimConfigTweaks extends Config(
   // to generate faithful DDR3 timing values.
   new chipyard.config.WithSystemBusFrequency(1000.0) ++
   new chipyard.config.WithPeripheryBusFrequency(1000.0) ++
+  new chipyard.config.WithControlBusFrequency(1000.0) ++
   new chipyard.config.WithMemoryBusFrequency(1000.0) ++
   new WithFireSimDesignTweaks
 )
@@ -185,7 +187,8 @@ class WithFireSimTestChipConfigTweaks extends Config(
   new chipyard.config.WithTileFrequency(1000.0) ++       // Realistic tile frequency for a test chip
   new chipyard.config.WithSystemBusFrequency(500.0) ++   // Realistic system bus frequency
   new chipyard.config.WithMemoryBusFrequency(1000.0) ++  // Needs to be 1000 MHz to model DDR performance accurately
-  new chipyard.config.WithPeripheryBusFrequency(500.0) ++  // Match the sbus and pbus frequency
+  new chipyard.config.WithPeripheryBusFrequency(500.0) ++  // Match the sbus/pbus/cbus freqs
+  new chipyard.config.WithControlBusFrequency(500.0) ++
   new chipyard.clocking.WithClockGroupsCombinedByName(("uncore", Seq("sbus", "pbus", "fbus", "cbus", "implicit"), Seq("tile"))) ++
   //  Crossing specifications
   new chipyard.config.WithCbusToPbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossing between PBUS and CBUS
@@ -247,6 +250,7 @@ class FireSimSmallSystemConfig extends Config(
   new WithDefaultMemModel ++
   new WithBootROM ++
   new chipyard.config.WithPeripheryBusFrequency(3200.0) ++
+  new chipyard.config.WithControlBusFrequency(3200.0) ++
   new WithoutClockGating ++
   new WithoutTLMonitors ++
   new freechips.rocketchip.subsystem.WithExtMemSize(1 << 28) ++