From af78c9cadf01e3bd0244d06b6c7fe3735031aa13 Mon Sep 17 00:00:00 2001
From: Abraham Gonzalez <abe.j.gonza@gmail.com>
Date: Wed, 2 Mar 2022 15:45:27 +0100
Subject: [PATCH] Remove extra spaces in FPGA makefile

---
 fpga/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fpga/Makefile b/fpga/Makefile
index b53e4fdf..c6e161ee 100644
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -118,7 +118,7 @@ $(BIT_FILE): $(synth_list_f)
 		-tclargs \
 			-top-module "$(MODEL)" \
 			-F "$(synth_list_f)" \
-			-board "$(BOARD)" \			
+			-board "$(BOARD)" \
 			-ip-vivado-tcls "$(shell find '$(build_dir)' -name '*.vivado.tcl')"
 
 .PHONY: bitstream