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Remove clock tap from firesim designs

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This commit is contained in:
Jerry Zhao
2023-12-15 15:51:04 -08:00
parent 1d05eda438
commit b37b6b0d9b
2 changed files with 7 additions and 0 deletions
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4
generators/chipyard/src/main/scala/config/fragments/ClockingFragments.scala
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@@ -122,3 +122,7 @@ class WithNoTileResetSetters extends Config((site, here, up) => {
class WithNoResetSynchronizers extends Config((site, here, up) => { class WithNoResetSynchronizers extends Config((site, here, up) => {
case ChipyardPRCIControlKey => up(ChipyardPRCIControlKey).copy(enableResetSynchronizers = false) case ChipyardPRCIControlKey => up(ChipyardPRCIControlKey).copy(enableResetSynchronizers = false)
}) })
class WithNoClockTap extends Config((site, here, up) => {
case ClockTapKey => None
})

3
generators/firechip/src/main/scala/TargetConfigs.scala
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@@ -84,6 +84,7 @@ class WithMinimalFireSimDesignTweaks extends Config(
new chipyard.harness.WithHarnessBinderClockFreqMHz(1000.0) ++ new chipyard.harness.WithHarnessBinderClockFreqMHz(1000.0) ++
new chipyard.harness.WithClockFromHarness ++ new chipyard.harness.WithClockFromHarness ++
new chipyard.harness.WithResetFromHarness ++ new chipyard.harness.WithResetFromHarness ++
new chipyard.config.WithNoClockTap ++
new chipyard.clocking.WithPassthroughClockGenerator ++ new chipyard.clocking.WithPassthroughClockGenerator ++
// Required*: When using FireSim-as-top to provide a correct path to the target bootrom source // Required*: When using FireSim-as-top to provide a correct path to the target bootrom source
new WithBootROM ++ new WithBootROM ++
@@ -98,6 +99,8 @@ class WithMinimalFireSimDesignTweaks extends Config(
// Non-frequency tweaks that are generally applied to all firesim configs // Non-frequency tweaks that are generally applied to all firesim configs
class WithFireSimDesignTweaks extends Config( class WithFireSimDesignTweaks extends Config(
new WithMinimalFireSimDesignTweaks ++ new WithMinimalFireSimDesignTweaks ++
// Required: Remove the debug clock tap, this breaks compilation of target-level sim in FireSim
new chipyard.config.WithNoClockTap ++
// Required: Bake in the default FASED memory model // Required: Bake in the default FASED memory model
new WithDefaultMemModel ++ new WithDefaultMemModel ++
// Optional: reduce the width of the Serial TL interface // Optional: reduce the width of the Serial TL interface