From 93c7fef9424a25fc8157c1ad6d504cd5cca126df Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 5 Aug 2020 09:54:07 -0700 Subject: [PATCH 1/5] We need to uppercase hex chars for bc --- common.mk | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/common.mk b/common.mk index 9d322f00..6679457e 100644 --- a/common.mk +++ b/common.mk @@ -157,6 +157,30 @@ run-binary-debug: $(output_dir) $(sim_debug) run-fast: run-asm-tests-fast run-bmark-tests-fast +######################################################################################### +# helper rules to run simulator with fast loadmem via hex files +######################################################################################### +$(binary_hex): $(output_dir) $(BINARY) + hex_bytes=$(shell readelf --segments --wide $(BINARY) | grep LOAD | tail -n 1 | tr -s [:space:] | cut -f4,6 -d' ' | tr -d x | tr [:lower:] [:upper:] | tr ' ' + | sed 's/0000000008/ibase=16;/' | bc);\ + power_2_bytes=`python -c "import math; print int(pow(2,math.ceil(math.log($$hex_bytes)/math.log(2))))"`;\ + elf2hex 64 $$power_2_bytes $(BINARY) $(shell echo "ibase=16;$(LOADMEM_ADDR)" | bc) > $(binary_hex) + +run-binary-hex: $(output_dir) $(sim) $(binary_hex) +run-binary-hex: run-binary +run-binary-hex: override LOADMEM_ADDR = 80000000 +run-binary-hex: override LOADMEM = $(binary_hex) +run-binary-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR) +run-binary-debug-hex: $(output_dir) $(sim) $(binary_hex) +run-binary-debug-hex: run-binary-debug +run-binary-debug-hex: override LOADMEM_ADDR = 80000000 +run-binary-debug-hex: override LOADMEM = $(binary_hex) +run-binary-debug-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR) +run-binary-fast-hex: $(output_dir) $(sim) $(binary_hex) +run-binary-fast-hex: run-binary-fast +run-binary-fast-hex: override LOADMEM_ADDR = 80000000 +run-binary-fast-hex: override LOADMEM = $(binary_hex) +run-binary-fast-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR) + ######################################################################################### # run assembly/benchmarks rules ######################################################################################### From 5bfc289677fcff16c19a71c6b79006a0c31b09c7 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 5 Aug 2020 09:55:31 -0700 Subject: [PATCH 2/5] Bump fesvr for better loadmem impl. Fix verilator loadmem support --- .../utilities/src/main/resources/csrc/emulator.cc | 10 ++-------- toolchains/esp-tools/riscv-isa-sim | 2 +- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/generators/utilities/src/main/resources/csrc/emulator.cc b/generators/utilities/src/main/resources/csrc/emulator.cc index 0a3b46da..27a8aa4a 100644 --- a/generators/utilities/src/main/resources/csrc/emulator.cc +++ b/generators/utilities/src/main/resources/csrc/emulator.cc @@ -116,7 +116,6 @@ int main(int argc, char** argv) FILE * vcdfile = NULL; uint64_t start = 0; #endif - char ** htif_argv = NULL; int verilog_plusargs_legal = 1; opterr = 1; @@ -252,10 +251,6 @@ done_processing: usage(argv[0]); return 1; } - int htif_argc = 1 + argc - optind; - htif_argv = (char **) malloc((htif_argc) * sizeof (char *)); - htif_argv[0] = argv[0]; - for (int i = 1; optind < argc;) htif_argv[i++] = argv[optind++]; if (verbose) fprintf(stderr, "using random seed %u\n", random_seed); @@ -278,8 +273,8 @@ done_processing: #endif jtag = new remote_bitbang_t(rbb_port); - dtm = new dtm_t(htif_argc, htif_argv); - tsi = new tsi_t(htif_argc, htif_argv); + dtm = new dtm_t(argc, argv); + tsi = new tsi_t(argc, argv); signal(SIGTERM, handle_sigterm); @@ -364,6 +359,5 @@ done_processing: if (tsi) delete tsi; if (jtag) delete jtag; if (tile) delete tile; - if (htif_argv) free(htif_argv); return ret; } diff --git a/toolchains/esp-tools/riscv-isa-sim b/toolchains/esp-tools/riscv-isa-sim index 13384cac..2bc65d1b 160000 --- a/toolchains/esp-tools/riscv-isa-sim +++ b/toolchains/esp-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit 13384cac1e54828200067ff890f564a505a4ebb3 +Subproject commit 2bc65d1bf6605077e3740941c086724beb35db05 From edbb86ef982c08859842c923b2d7c46ef5d011c3 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 5 Aug 2020 11:17:48 -0700 Subject: [PATCH 3/5] Move elf2hex preprocessing into separate script --- common.mk | 4 +--- scripts/smartelf2hex.sh | 14 ++++++++++++++ variables.mk | 1 + 3 files changed, 16 insertions(+), 3 deletions(-) create mode 100755 scripts/smartelf2hex.sh diff --git a/common.mk b/common.mk index 6679457e..43615a92 100644 --- a/common.mk +++ b/common.mk @@ -161,9 +161,7 @@ run-fast: run-asm-tests-fast run-bmark-tests-fast # helper rules to run simulator with fast loadmem via hex files ######################################################################################### $(binary_hex): $(output_dir) $(BINARY) - hex_bytes=$(shell readelf --segments --wide $(BINARY) | grep LOAD | tail -n 1 | tr -s [:space:] | cut -f4,6 -d' ' | tr -d x | tr [:lower:] [:upper:] | tr ' ' + | sed 's/0000000008/ibase=16;/' | bc);\ - power_2_bytes=`python -c "import math; print int(pow(2,math.ceil(math.log($$hex_bytes)/math.log(2))))"`;\ - elf2hex 64 $$power_2_bytes $(BINARY) $(shell echo "ibase=16;$(LOADMEM_ADDR)" | bc) > $(binary_hex) + $(base_dir)/scripts/smartelf2hex.sh $(BINARY) > $(binary_hex) run-binary-hex: $(output_dir) $(sim) $(binary_hex) run-binary-hex: run-binary diff --git a/scripts/smartelf2hex.sh b/scripts/smartelf2hex.sh new file mode 100755 index 00000000..782977ff --- /dev/null +++ b/scripts/smartelf2hex.sh @@ -0,0 +1,14 @@ +#!/usr/bin/env bash + +# This script find the appropriate arguments to pass to elf2hex by inspecting the given RISC-V elf binary +# First and only argument is the binary to be converted. +# The output of this script should be redirected to a file (as with normal elf2hex). + +binary=$1 +segments=`readelf --segments --wide $binary` +entry_hex=`echo -e "$segments" | grep "Entry point" | cut -f3 -d' ' | sed 's/0x//' | tr [:lower:] [:upper:]` +entry_dec=`bc <<< "ibase=16;$entry_hex"` +length_hex=`echo "$segments" | grep LOAD | tail -n 1 | tr -s [:space:] | cut -f4,6 -d' '` +length_dec=`echo $length_hex | tr -d x | tr [:lower:] [:upper:] | tr ' ' + | sed 's/^/ibase=16;/' | sed "s/$/-$entry_hex/" | bc` +power_2_length=`echo "x=l($length_dec)/l(2); scale=0; 2^((x+1)/1)" | bc -l` +elf2hex 64 $power_2_length $binary $entry_dec diff --git a/variables.mk b/variables.mk index 61602507..d7eccb49 100644 --- a/variables.mk +++ b/variables.mk @@ -173,6 +173,7 @@ override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR) endif VERBOSE_FLAGS ?= +verbose sim_out_name = $(output_dir)/$(subst $() $(),_,$(notdir $(basename $(BINARY)))) +binary_hex= $(sim_out_name).loadmem_hex ######################################################################################### # build output directory for compilation From caab6fb968c866c24b31c3dc6f5c3c1a3a2a87b8 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 5 Aug 2020 11:27:14 -0700 Subject: [PATCH 4/5] Add run-binary-hex docs --- docs/Simulation/Software-RTL-Simulation.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/docs/Simulation/Software-RTL-Simulation.rst b/docs/Simulation/Software-RTL-Simulation.rst index 93e4dcc6..28ae223e 100644 --- a/docs/Simulation/Software-RTL-Simulation.rst +++ b/docs/Simulation/Software-RTL-Simulation.rst @@ -150,6 +150,12 @@ The ``.hex`` file should be a text file with a hexadecimal number on each line. Each line uses little-endian order, so this file would produce the bytes "ef be ad de 01 23". ``LOADMEM_ADDR`` specifies which address in memory (in hexadecimal) to write the first byte to. The default is 0x81000000. +A special target that facilitates automatically generating a hex file for an entire elf RISC-V exectuable and then running the simulator with the appropriate flags is also available. + +.. code-block:: shell + + make run-binary-hex BINARY=test.riscv + Generating Waveforms ----------------------- From 8499b769410a4d7c16e387cb0a6c200c3bf6f5d3 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 5 Aug 2020 15:36:13 -0700 Subject: [PATCH 5/5] Bump esp-spike to master --- toolchains/esp-tools/riscv-isa-sim | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/toolchains/esp-tools/riscv-isa-sim b/toolchains/esp-tools/riscv-isa-sim index 2bc65d1b..a1ff6b03 160000 --- a/toolchains/esp-tools/riscv-isa-sim +++ b/toolchains/esp-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit 2bc65d1bf6605077e3740941c086724beb35db05 +Subproject commit a1ff6b03f7f630a06327798238256973568e3837