diff --git a/.github/scripts/run-tests.sh b/.github/scripts/run-tests.sh index 93475a19..ffa61db5 100755 --- a/.github/scripts/run-tests.sh +++ b/.github/scripts/run-tests.sh @@ -13,12 +13,14 @@ export RISCV="$GITHUB_WORKSPACE/riscv-tools-install" export LD_LIBRARY_PATH="$RISCV/lib" export PATH="$RISCV/bin:$PATH" +DISABLE_SIM_PREREQ="BREAK_SIM_PREREQ=1" + run_bmark () { - make run-bmark-tests-fast -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $@ + make run-bmark-tests-fast -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ $@ } run_asm () { - make run-asm-tests-fast -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $@ + make run-asm-tests-fast -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ $@ } run_both () { @@ -27,7 +29,7 @@ run_both () { } run_tracegen () { - make tracegen -C $LOCAL_SIM_DIR $@ + make tracegen -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ $@ } case $1 in @@ -53,7 +55,7 @@ case $1 in export RISCV=$LOCAL_ESP_DIR export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib export PATH=$RISCV/bin:$PATH - make run-rv64uv-p-asm-tests -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR ${mapping[$1]} + make run-rv64uv-p-asm-tests -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} ;; chipyard-gemmini) export RISCV=$LOCAL_ESP_DIR @@ -62,32 +64,32 @@ case $1 in GEMMINI_SOFTWARE_DIR=$LOCAL_SIM_DIR/../../generators/gemmini/software/gemmini-rocc-tests rm -rf $GEMMINI_SOFTWARE_DIR/riscv-tests cd $LOCAL_SIM_DIR - make -C $LOCAL_SIM_DIR ${mapping[$1]} run-binary-fast BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/aligned-baremetal - make -C $LOCAL_SIM_DIR ${mapping[$1]} run-binary-fast BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/raw_hazard-baremetal - make -C $LOCAL_SIM_DIR ${mapping[$1]} run-binary-fast BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/mvin_mvout-baremetal + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/aligned-baremetal + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/raw_hazard-baremetal + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/mvin_mvout-baremetal ;; chipyard-sha3) export RISCV=$LOCAL_ESP_DIR export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib export PATH=$RISCV/bin:$PATH (cd $LOCAL_CHIPYARD_DIR/generators/sha3/software && ./build.sh) - make -C $LOCAL_SIM_DIR ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/generators/sha3/software/tests/bare/sha3-rocc.riscv + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/generators/sha3/software/tests/bare/sha3-rocc.riscv ;; chipyard-streaming-passthrough) make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-passthrough.riscv + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-passthrough.riscv ;; chipyard-streaming-fir) make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-fir.riscv + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-fir.riscv ;; chipyard-spiflashread) make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashread.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashread.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast ;; chipyard-spiflashwrite) make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashwrite.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashwrite.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast [[ "`xxd $LOCAL_CHIPYARD_DIR/tests/spiflash.img | grep 1337\ 00ff\ aa55\ face | wc -l`" == "6" ]] || false ;; tracegen) @@ -97,20 +99,20 @@ case $1 in run_tracegen ${mapping[$1]} ;; chipyard-cva6) - make run-binary-fast -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/multiply.riscv + make run-binary-fast -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/multiply.riscv ;; chipyard-sodor) run_asm ${mapping[$1]} ;; chipyard-nvdla) make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/nvdla.riscv run-binary-fast + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/nvdla.riscv run-binary-fast ;; icenet) - make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR ${mapping[$1]} + make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} ;; testchipip) - make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR ${mapping[$1]} + make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} ;; *) echo "No set of tests for $1. Did you spell it right?" diff --git a/common.mk b/common.mk index 634f7767..7adb91d5 100644 --- a/common.mk +++ b/common.mk @@ -31,7 +31,8 @@ EXTRA_SIM_REQS ?= #---------------------------------------------------------------------------- HELP_SIMULATION_VARIABLES += \ " EXTRA_SIM_FLAGS = additional runtime simulation flags (passed within +permissive)" \ -" NUMACTL = set to '1' to wrap simulator in the appropriate numactl command" +" NUMACTL = set to '1' to wrap simulator in the appropriate numactl command" \ +" BREAK_SIM_PREREQ = when running a binary, doesn't rebuild RTL on source changes" EXTRA_SIM_FLAGS ?= NUMACTL ?= 0 @@ -191,16 +192,22 @@ ifeq (,$(BINARY)) $(error BINARY variable is not set. Set it to the simulation binary) endif +# allow you to override sim prereq +ifeq(,$(BREAK_SIM_PREREQ)) +SIM_PREREQ = $(sim) +SIM_DEBUG_PREREQ = $(sim_debug) +else + # run normal binary with hardware-logged insn dissassembly -run-binary: $(output_dir) check-binary +run-binary: $(output_dir) $(SIM_PREREQ) check-binary (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) # run simulator as fast as possible (no insn disassembly) -run-binary-fast: $(output_dir) check-binary +run-binary-fast: $(output_dir) $(SIM_PREREQ) check-binary (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) run-fast: run-asm-tests-fast run-bmark-tests-fast @@ -239,10 +246,10 @@ $(output_dir): $(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% $(output_dir) ln -sf $< $@ -$(output_dir)/%.run: $(output_dir)/% +$(output_dir)/%.run: $(output_dir)/% $(SIM_PREREQ) (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $< >(spike-dasm > $@) | tee $<.log) ######################################################################################### diff --git a/generators/tracegen/tracegen.mk b/generators/tracegen/tracegen.mk index 1766059f..55a544e7 100644 --- a/generators/tracegen/tracegen.mk +++ b/generators/tracegen/tracegen.mk @@ -8,7 +8,7 @@ AXE=$(AXE_DIR)/axe $(AXE): $(wildcard $(AXE_DIR)/*.[ch]) $(AXE_DIR)/make.sh cd $(AXE_DIR) && ./make.sh -$(output_dir)/tracegen.out: +$(output_dir)/tracegen.out: $(SIM_PREREQ) mkdir -p $(output_dir) && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) none $@ $(output_dir)/tracegen.result: $(output_dir)/tracegen.out $(AXE)