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Update doc source references

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This commit is contained in:
Jerry Zhao
2023-02-11 13:00:57 -08:00
parent 1ee45b55da
commit b92928090d
2 changed files with 2 additions and 2 deletions
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2
docs/Advanced-Concepts/Chip-Communication.rst
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@@ -98,7 +98,7 @@ As a reminder, to run a software RTL simulation, run:
If you would like to build and simulate a Chipyard configuration with a DTM configured for DMI communication, If you would like to build and simulate a Chipyard configuration with a DTM configured for DMI communication,
then you must tie-off the serial-link interface, and instantiate the `SimDTM`. then you must tie-off the serial-link interface, and instantiate the `SimDTM`.
.. literalinclude:: ../../generators/chipyard/src/main/scala/config/RocketConfigs.scala .. literalinclude:: ../../generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala
:language: scala :language: scala
:start-after: DOC include start: DmiRocket :start-after: DOC include start: DmiRocket
:end-before: DOC include end: DmiRocket :end-before: DOC include end: DmiRocket

2
docs/Generators/SiFive-Generators.rst
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@@ -31,7 +31,7 @@ This example instantiates a top-level module with include GPIO ports, and then t
Finally, you add the relevant config fragment to the SoC config. For example: Finally, you add the relevant config fragment to the SoC config. For example:
.. literalinclude:: ../../generators/chipyard/src/main/scala/config/RocketConfigs.scala .. literalinclude:: ../../generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala
:language: scala :language: scala
:start-after: DOC include start: GPIORocketConfig :start-after: DOC include start: GPIORocketConfig
:end-before: DOC include end: GPIORocketConfig :end-before: DOC include end: GPIORocketConfig